@@ -652,7 +652,6 @@ aarch64_insert_operand (const aarch64_operand *self,
case 34:
case 121:
case 122:
- case 180:
case 181:
case 182:
case 183:
@@ -666,30 +665,31 @@ aarch64_insert_operand (const aarch64_operand *self,
case 191:
case 192:
case 193:
- case 209:
+ case 194:
case 210:
case 211:
case 212:
- case 221:
+ case 213:
case 222:
case 223:
case 224:
case 225:
- case 235:
- case 239:
- case 243:
- case 250:
+ case 226:
+ case 236:
+ case 240:
+ case 244:
case 251:
- case 258:
+ case 252:
case 259:
case 260:
case 261:
+ case 262:
return aarch64_ins_regno (self, info, code, inst, errors);
case 6:
case 118:
case 119:
- case 293:
- case 295:
+ case 294:
+ case 296:
return aarch64_ins_none (self, info, code, inst, errors);
case 17:
return aarch64_ins_reg_extended (self, info, code, inst, errors);
@@ -703,17 +703,16 @@ aarch64_insert_operand (const aarch64_operand *self,
case 36:
case 37:
case 38:
- case 297:
+ case 298:
return aarch64_ins_reglane (self, info, code, inst, errors);
case 39:
case 40:
case 41:
- case 226:
case 227:
- case 230:
- case 262:
+ case 228:
+ case 231:
case 263:
- case 278:
+ case 264:
case 279:
case 280:
case 281:
@@ -726,6 +725,7 @@ aarch64_insert_operand (const aarch64_operand *self,
case 288:
case 289:
case 290:
+ case 291:
return aarch64_ins_simple_index (self, info, code, inst, errors);
case 42:
return aarch64_ins_reglist (self, info, code, inst, errors);
@@ -763,9 +763,8 @@ aarch64_insert_operand (const aarch64_operand *self,
case 90:
case 91:
case 117:
- case 177:
- case 179:
- case 200:
+ case 178:
+ case 180:
case 201:
case 202:
case 203:
@@ -774,13 +773,14 @@ aarch64_insert_operand (const aarch64_operand *self,
case 206:
case 207:
case 208:
- case 264:
- case 291:
+ case 209:
+ case 265:
case 292:
- case 294:
- case 296:
- case 301:
+ case 293:
+ case 295:
+ case 297:
case 302:
+ case 303:
return aarch64_ins_imm (self, info, code, inst, errors);
case 51:
case 52:
@@ -790,10 +790,10 @@ aarch64_insert_operand (const aarch64_operand *self,
case 55:
return aarch64_ins_advsimd_imm_modified (self, info, code, inst, errors);
case 59:
- case 167:
+ case 168:
return aarch64_ins_fpimm (self, info, code, inst, errors);
case 77:
- case 175:
+ case 176:
return aarch64_ins_limm (self, info, code, inst, errors);
case 78:
return aarch64_ins_aimm (self, info, code, inst, errors);
@@ -803,11 +803,11 @@ aarch64_insert_operand (const aarch64_operand *self,
return aarch64_ins_fbits (self, info, code, inst, errors);
case 82:
case 83:
- case 172:
+ case 173:
return aarch64_ins_imm_rotate2 (self, info, code, inst, errors);
case 84:
- case 171:
- case 173:
+ case 172:
+ case 174:
return aarch64_ins_imm_rotate1 (self, info, code, inst, errors);
case 85:
case 86:
@@ -884,8 +884,8 @@ aarch64_insert_operand (const aarch64_operand *self,
case 147:
case 148:
case 149:
- return aarch64_ins_sve_addr_rr_lsl (self, info, code, inst, errors);
case 150:
+ return aarch64_ins_sve_addr_rr_lsl (self, info, code, inst, errors);
case 151:
case 152:
case 153:
@@ -893,114 +893,112 @@ aarch64_insert_operand (const aarch64_operand *self,
case 155:
case 156:
case 157:
- return aarch64_ins_sve_addr_rz_xtw (self, info, code, inst, errors);
case 158:
+ return aarch64_ins_sve_addr_rz_xtw (self, info, code, inst, errors);
case 159:
case 160:
case 161:
- return aarch64_ins_sve_addr_zi_u5 (self, info, code, inst, errors);
case 162:
- return aarch64_ins_sve_addr_zz_lsl (self, info, code, inst, errors);
+ return aarch64_ins_sve_addr_zi_u5 (self, info, code, inst, errors);
case 163:
- return aarch64_ins_sve_addr_zz_sxtw (self, info, code, inst, errors);
+ return aarch64_ins_sve_addr_zz_lsl (self, info, code, inst, errors);
case 164:
- return aarch64_ins_sve_addr_zz_uxtw (self, info, code, inst, errors);
+ return aarch64_ins_sve_addr_zz_sxtw (self, info, code, inst, errors);
case 165:
- return aarch64_ins_sve_aimm (self, info, code, inst, errors);
+ return aarch64_ins_sve_addr_zz_uxtw (self, info, code, inst, errors);
case 166:
+ return aarch64_ins_sve_aimm (self, info, code, inst, errors);
+ case 167:
return aarch64_ins_sve_asimm (self, info, code, inst, errors);
- case 168:
- return aarch64_ins_sve_float_half_one (self, info, code, inst, errors);
case 169:
- return aarch64_ins_sve_float_half_two (self, info, code, inst, errors);
+ return aarch64_ins_sve_float_half_one (self, info, code, inst, errors);
case 170:
+ return aarch64_ins_sve_float_half_two (self, info, code, inst, errors);
+ case 171:
return aarch64_ins_sve_float_zero_one (self, info, code, inst, errors);
- case 174:
+ case 175:
return aarch64_ins_inv_limm (self, info, code, inst, errors);
- case 176:
+ case 177:
return aarch64_ins_sve_limm_mov (self, info, code, inst, errors);
- case 178:
+ case 179:
return aarch64_ins_sve_scale (self, info, code, inst, errors);
- case 194:
case 195:
case 196:
- return aarch64_ins_sve_shlimm (self, info, code, inst, errors);
case 197:
+ return aarch64_ins_sve_shlimm (self, info, code, inst, errors);
case 198:
case 199:
- case 277:
+ case 200:
+ case 278:
return aarch64_ins_sve_shrimm (self, info, code, inst, errors);
- case 213:
case 214:
case 215:
case 216:
- return aarch64_ins_sme_za_vrs1 (self, info, code, inst, errors);
case 217:
+ return aarch64_ins_sme_za_vrs1 (self, info, code, inst, errors);
case 218:
case 219:
case 220:
+ case 221:
return aarch64_ins_sme_za_vrs2 (self, info, code, inst, errors);
- case 228:
case 229:
- case 231:
+ case 230:
case 232:
case 233:
case 234:
+ case 235:
return aarch64_ins_sve_quad_index (self, info, code, inst, errors);
- case 236:
case 237:
- return aarch64_ins_sve_index (self, info, code, inst, errors);
case 238:
- case 240:
- case 257:
- case 303:
- case 304:
- case 305:
- return aarch64_ins_sve_reglist (self, info, code, inst, errors);
+ return aarch64_ins_sve_index (self, info, code, inst, errors);
+ case 239:
case 241:
+ case 258:
+ return aarch64_ins_sve_reglist (self, info, code, inst, errors);
case 242:
- case 244:
+ case 243:
case 245:
case 246:
case 247:
- case 256:
- return aarch64_ins_sve_aligned_reglist (self, info, code, inst, errors);
case 248:
+ case 257:
+ return aarch64_ins_sve_aligned_reglist (self, info, code, inst, errors);
case 249:
+ case 250:
return aarch64_ins_sve_strided_reglist (self, info, code, inst, errors);
- case 252:
- case 254:
- case 265:
- return aarch64_ins_sme_za_hv_tiles (self, info, code, inst, errors);
case 253:
case 255:
- return aarch64_ins_sme_za_hv_tiles_range (self, info, code, inst, errors);
case 266:
+ return aarch64_ins_sme_za_hv_tiles (self, info, code, inst, errors);
+ case 254:
+ case 256:
+ return aarch64_ins_sme_za_hv_tiles_range (self, info, code, inst, errors);
case 267:
case 268:
case 269:
case 270:
case 271:
case 272:
- return aarch64_ins_sme_za_array (self, info, code, inst, errors);
case 273:
- return aarch64_ins_sme_addr_ri_u4xvl (self, info, code, inst, errors);
+ return aarch64_ins_sme_za_array (self, info, code, inst, errors);
case 274:
- return aarch64_ins_sme_sm_za (self, info, code, inst, errors);
+ return aarch64_ins_sme_addr_ri_u4xvl (self, info, code, inst, errors);
case 275:
- return aarch64_ins_sme_pred_reg_with_index (self, info, code, inst, errors);
+ return aarch64_ins_sme_sm_za (self, info, code, inst, errors);
case 276:
+ return aarch64_ins_sme_pred_reg_with_index (self, info, code, inst, errors);
+ case 277:
return aarch64_ins_plain_shrimm (self, info, code, inst, errors);
- case 298:
case 299:
case 300:
+ case 301:
return aarch64_ins_x0_to_x30 (self, info, code, inst, errors);
+ case 304:
+ case 305:
case 306:
case 307:
- case 308:
- case 309:
return aarch64_ins_rcpc3_addr_opt_offset (self, info, code, inst, errors);
- case 310:
+ case 308:
return aarch64_ins_rcpc3_addr_offset (self, info, code, inst, errors);
default: assert (0); abort ();
}
@@ -33649,7 +33649,6 @@ aarch64_extract_operand (const aarch64_operand *self,
case 34:
case 121:
case 122:
- case 180:
case 181:
case 182:
case 183:
@@ -33663,30 +33662,31 @@ aarch64_extract_operand (const aarch64_operand *self,
case 191:
case 192:
case 193:
- case 209:
+ case 194:
case 210:
case 211:
case 212:
- case 221:
+ case 213:
case 222:
case 223:
case 224:
case 225:
- case 235:
- case 239:
- case 243:
- case 250:
+ case 226:
+ case 236:
+ case 240:
+ case 244:
case 251:
- case 258:
+ case 252:
case 259:
case 260:
case 261:
+ case 262:
return aarch64_ext_regno (self, info, code, inst, errors);
case 6:
case 118:
case 119:
- case 293:
- case 295:
+ case 294:
+ case 296:
return aarch64_ext_none (self, info, code, inst, errors);
case 11:
return aarch64_ext_regrt_sysins (self, info, code, inst, errors);
@@ -33705,17 +33705,16 @@ aarch64_extract_operand (const aarch64_operand *self,
case 36:
case 37:
case 38:
- case 297:
+ case 298:
return aarch64_ext_reglane (self, info, code, inst, errors);
case 39:
case 40:
case 41:
- case 226:
case 227:
- case 230:
- case 262:
+ case 228:
+ case 231:
case 263:
- case 278:
+ case 264:
case 279:
case 280:
case 281:
@@ -33728,6 +33727,7 @@ aarch64_extract_operand (const aarch64_operand *self,
case 288:
case 289:
case 290:
+ case 291:
return aarch64_ext_simple_index (self, info, code, inst, errors);
case 42:
return aarch64_ext_reglist (self, info, code, inst, errors);
@@ -33766,9 +33766,8 @@ aarch64_extract_operand (const aarch64_operand *self,
case 90:
case 91:
case 117:
- case 177:
- case 179:
- case 200:
+ case 178:
+ case 180:
case 201:
case 202:
case 203:
@@ -33777,13 +33776,14 @@ aarch64_extract_operand (const aarch64_operand *self,
case 206:
case 207:
case 208:
- case 264:
- case 291:
+ case 209:
+ case 265:
case 292:
- case 294:
- case 296:
- case 301:
+ case 293:
+ case 295:
+ case 297:
case 302:
+ case 303:
return aarch64_ext_imm (self, info, code, inst, errors);
case 51:
case 52:
@@ -33795,10 +33795,10 @@ aarch64_extract_operand (const aarch64_operand *self,
case 56:
return aarch64_ext_shll_imm (self, info, code, inst, errors);
case 59:
- case 167:
+ case 168:
return aarch64_ext_fpimm (self, info, code, inst, errors);
case 77:
- case 175:
+ case 176:
return aarch64_ext_limm (self, info, code, inst, errors);
case 78:
return aarch64_ext_aimm (self, info, code, inst, errors);
@@ -33808,11 +33808,11 @@ aarch64_extract_operand (const aarch64_operand *self,
return aarch64_ext_fbits (self, info, code, inst, errors);
case 82:
case 83:
- case 172:
+ case 173:
return aarch64_ext_imm_rotate2 (self, info, code, inst, errors);
case 84:
- case 171:
- case 173:
+ case 172:
+ case 174:
return aarch64_ext_imm_rotate1 (self, info, code, inst, errors);
case 85:
case 86:
@@ -33889,8 +33889,8 @@ aarch64_extract_operand (const aarch64_operand *self,
case 147:
case 148:
case 149:
- return aarch64_ext_sve_addr_rr_lsl (self, info, code, inst, errors);
case 150:
+ return aarch64_ext_sve_addr_rr_lsl (self, info, code, inst, errors);
case 151:
case 152:
case 153:
@@ -33898,115 +33898,112 @@ aarch64_extract_operand (const aarch64_operand *self,
case 155:
case 156:
case 157:
- return aarch64_ext_sve_addr_rz_xtw (self, info, code, inst, errors);
case 158:
+ return aarch64_ext_sve_addr_rz_xtw (self, info, code, inst, errors);
case 159:
case 160:
case 161:
- return aarch64_ext_sve_addr_zi_u5 (self, info, code, inst, errors);
case 162:
- return aarch64_ext_sve_addr_zz_lsl (self, info, code, inst, errors);
+ return aarch64_ext_sve_addr_zi_u5 (self, info, code, inst, errors);
case 163:
- return aarch64_ext_sve_addr_zz_sxtw (self, info, code, inst, errors);
+ return aarch64_ext_sve_addr_zz_lsl (self, info, code, inst, errors);
case 164:
- return aarch64_ext_sve_addr_zz_uxtw (self, info, code, inst, errors);
+ return aarch64_ext_sve_addr_zz_sxtw (self, info, code, inst, errors);
case 165:
- return aarch64_ext_sve_aimm (self, info, code, inst, errors);
+ return aarch64_ext_sve_addr_zz_uxtw (self, info, code, inst, errors);
case 166:
+ return aarch64_ext_sve_aimm (self, info, code, inst, errors);
+ case 167:
return aarch64_ext_sve_asimm (self, info, code, inst, errors);
- case 168:
- return aarch64_ext_sve_float_half_one (self, info, code, inst, errors);
case 169:
- return aarch64_ext_sve_float_half_two (self, info, code, inst, errors);
+ return aarch64_ext_sve_float_half_one (self, info, code, inst, errors);
case 170:
+ return aarch64_ext_sve_float_half_two (self, info, code, inst, errors);
+ case 171:
return aarch64_ext_sve_float_zero_one (self, info, code, inst, errors);
- case 174:
+ case 175:
return aarch64_ext_inv_limm (self, info, code, inst, errors);
- case 176:
+ case 177:
return aarch64_ext_sve_limm_mov (self, info, code, inst, errors);
- case 178:
+ case 179:
return aarch64_ext_sve_scale (self, info, code, inst, errors);
- case 194:
case 195:
case 196:
- return aarch64_ext_sve_shlimm (self, info, code, inst, errors);
case 197:
+ return aarch64_ext_sve_shlimm (self, info, code, inst, errors);
case 198:
case 199:
- case 277:
+ case 200:
+ case 278:
return aarch64_ext_sve_shrimm (self, info, code, inst, errors);
- case 213:
case 214:
case 215:
case 216:
- return aarch64_ext_sme_za_vrs1 (self, info, code, inst, errors);
case 217:
+ return aarch64_ext_sme_za_vrs1 (self, info, code, inst, errors);
case 218:
case 219:
case 220:
+ case 221:
return aarch64_ext_sme_za_vrs2 (self, info, code, inst, errors);
- case 228:
case 229:
- case 231:
+ case 230:
case 232:
case 233:
case 234:
+ case 235:
return aarch64_ext_sve_quad_index (self, info, code, inst, errors);
- case 236:
case 237:
- return aarch64_ext_sve_index (self, info, code, inst, errors);
case 238:
- case 240:
- case 257:
- return aarch64_ext_sve_reglist (self, info, code, inst, errors);
+ return aarch64_ext_sve_index (self, info, code, inst, errors);
+ case 239:
case 241:
+ case 258:
+ return aarch64_ext_sve_reglist (self, info, code, inst, errors);
case 242:
- case 244:
+ case 243:
case 245:
case 246:
case 247:
- case 256:
- return aarch64_ext_sve_aligned_reglist (self, info, code, inst, errors);
case 248:
+ case 257:
+ return aarch64_ext_sve_aligned_reglist (self, info, code, inst, errors);
case 249:
+ case 250:
return aarch64_ext_sve_strided_reglist (self, info, code, inst, errors);
- case 252:
- case 254:
- case 265:
- return aarch64_ext_sme_za_hv_tiles (self, info, code, inst, errors);
case 253:
case 255:
- return aarch64_ext_sme_za_hv_tiles_range (self, info, code, inst, errors);
case 266:
+ return aarch64_ext_sme_za_hv_tiles (self, info, code, inst, errors);
+ case 254:
+ case 256:
+ return aarch64_ext_sme_za_hv_tiles_range (self, info, code, inst, errors);
case 267:
case 268:
case 269:
case 270:
case 271:
case 272:
- return aarch64_ext_sme_za_array (self, info, code, inst, errors);
case 273:
- return aarch64_ext_sme_addr_ri_u4xvl (self, info, code, inst, errors);
+ return aarch64_ext_sme_za_array (self, info, code, inst, errors);
case 274:
- return aarch64_ext_sme_sm_za (self, info, code, inst, errors);
+ return aarch64_ext_sme_addr_ri_u4xvl (self, info, code, inst, errors);
case 275:
- return aarch64_ext_sme_pred_reg_with_index (self, info, code, inst, errors);
+ return aarch64_ext_sme_sm_za (self, info, code, inst, errors);
case 276:
+ return aarch64_ext_sme_pred_reg_with_index (self, info, code, inst, errors);
+ case 277:
return aarch64_ext_plain_shrimm (self, info, code, inst, errors);
- case 298:
case 299:
case 300:
+ case 301:
return aarch64_ext_x0_to_x30 (self, info, code, inst, errors);
- case 303:
case 304:
case 305:
- return aarch64_ext_sve_reglist_zt (self, info, code, inst, errors);
case 306:
case 307:
- case 308:
- case 309:
return aarch64_ext_rcpc3_addr_opt_offset (self, info, code, inst, errors);
- case 310:
+ case 308:
return aarch64_ext_rcpc3_addr_offset (self, info, code, inst, errors);
default: assert (0); abort ();
}
@@ -169,6 +169,7 @@ const struct aarch64_operand aarch64_operands[] =
{AARCH64_OPND_CLASS_ADDRESS, "SVE_ADDR_RX_LSL1", (1 << OPD_F_OD_LSB) | OPD_F_NO_ZR | OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_Rn,FLD_Rm}, "an address with a scalar register offset"},
{AARCH64_OPND_CLASS_ADDRESS, "SVE_ADDR_RX_LSL2", (2 << OPD_F_OD_LSB) | OPD_F_NO_ZR | OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_Rn,FLD_Rm}, "an address with a scalar register offset"},
{AARCH64_OPND_CLASS_ADDRESS, "SVE_ADDR_RX_LSL3", (3 << OPD_F_OD_LSB) | OPD_F_NO_ZR | OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_Rn,FLD_Rm}, "an address with a scalar register offset"},
+ {AARCH64_OPND_CLASS_ADDRESS, "SVE_ADDR_RX_LSL4", (4 << OPD_F_OD_LSB) | OPD_F_NO_ZR | OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_Rn,FLD_Rm}, "an address with a scalar register offset"},
{AARCH64_OPND_CLASS_ADDRESS, "SVE_ADDR_ZX", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SVE_Zn,FLD_Rm}, "vector of address with a scalar register offset"},
{AARCH64_OPND_CLASS_ADDRESS, "SVE_ADDR_RZ", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_Rn,FLD_SVE_Zm_16}, "an address with a vector register offset"},
{AARCH64_OPND_CLASS_ADDRESS, "SVE_ADDR_RZ_LSL1", 1 << OPD_F_OD_LSB | OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_Rn,FLD_SVE_Zm_16}, "an address with a vector register offset"},
@@ -327,9 +328,6 @@ const struct aarch64_operand aarch64_operands[] =
{AARCH64_OPND_CLASS_INT_REG, "MOPS_WB_Rd", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_Rn}, "an integer register with writeback"},
{AARCH64_OPND_CLASS_IMMEDIATE, "CSSC_SIMM8", OPD_F_SEXT | OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_CSSC_imm8}, "an 8-bit signed immediate"},
{AARCH64_OPND_CLASS_IMMEDIATE, "CSSC_UIMM8", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_CSSC_imm8}, "an 8-bit unsigned immediate"},
- {AARCH64_OPND_CLASS_SVE_REGLIST, "SME_Zt2", 2 << OPD_F_OD_LSB | OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SVE_Zt}, "a list of 2 SVE vector registers"},
- {AARCH64_OPND_CLASS_SVE_REGLIST, "SME_Zt3", 3 << OPD_F_OD_LSB | OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SVE_Zt}, "a list of 3 SVE vector registers"},
- {AARCH64_OPND_CLASS_SVE_REGLIST, "SME_Zt4", 4 << OPD_F_OD_LSB | OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SVE_Zt}, "a list of 4 SVE vector registers"},
{AARCH64_OPND_CLASS_ADDRESS, "RCPC3_ADDR_OPT_POSTIND", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_opc2}, "an address with post-incrementing by ammount of loaded bytes"},
{AARCH64_OPND_CLASS_ADDRESS, "RCPC3_ADDR_OPT_PREIND_WB", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_opc2}, "an address with pre-incrementing with write-back by ammount of stored bytes"},
{AARCH64_OPND_CLASS_ADDRESS, "RCPC3_ADDR_POSTIND", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {}, "an address with post-incrementing by ammount of loaded bytes"},