diff mbox series

[v1,05/11] aarch64: Fix sve2p1 extq instruction operands (regenerated files).

Message ID 20240612155909.54323-6-srinath.parvathaneni@arm.com
State Superseded
Headers
Series aarch64: Fix the FEAT_SVE2p1 related issues. |

Checks

Context Check Description
linaro-tcwg-bot/tcwg_binutils_build--master-arm fail Patch failed to apply
linaro-tcwg-bot/tcwg_binutils_build--master-aarch64 fail Patch failed to apply

Commit Message

Srinath Parvathaneni June 12, 2024, 3:59 p.m. UTC 
  Hi,

This patch includes the regenerated files for
[Binutils] aarch64: Fix sve2p1 extq instruction operands.

Regards,
Srinath.
---
 opcodes/aarch64-asm-2.c | 91 +++++++++++++++++++++--------------------
 opcodes/aarch64-dis-2.c | 91 +++++++++++++++++++++--------------------
 opcodes/aarch64-opc-2.c |  1 +
 3 files changed, 93 insertions(+), 90 deletions(-)
diff mbox series

Patch

diff --git a/opcodes/aarch64-asm-2.c b/opcodes/aarch64-asm-2.c
index 78798049d34..f7c36d6f262 100644
--- a/opcodes/aarch64-asm-2.c
+++ b/opcodes/aarch64-asm-2.c
@@ -666,30 +666,30 @@  aarch64_insert_operand (const aarch64_operand *self,
     case 191:
     case 192:
     case 193:
-    case 208:
     case 209:
     case 210:
     case 211:
-    case 220:
+    case 212:
     case 221:
     case 222:
     case 223:
     case 224:
-    case 235:
-    case 239:
-    case 243:
-    case 250:
+    case 225:
+    case 236:
+    case 240:
+    case 244:
     case 251:
-    case 258:
+    case 252:
     case 259:
     case 260:
     case 261:
+    case 262:
       return aarch64_ins_regno (self, info, code, inst, errors);
     case 6:
     case 118:
     case 119:
-    case 293:
-    case 295:
+    case 294:
+    case 296:
       return aarch64_ins_none (self, info, code, inst, errors);
     case 17:
       return aarch64_ins_reg_extended (self, info, code, inst, errors);
@@ -703,17 +703,16 @@  aarch64_insert_operand (const aarch64_operand *self,
     case 36:
     case 37:
     case 38:
-    case 297:
+    case 298:
       return aarch64_ins_reglane (self, info, code, inst, errors);
     case 39:
     case 40:
     case 41:
-    case 225:
     case 226:
-    case 229:
-    case 262:
+    case 227:
+    case 230:
     case 263:
-    case 278:
+    case 264:
     case 279:
     case 280:
     case 281:
@@ -726,6 +725,7 @@  aarch64_insert_operand (const aarch64_operand *self,
     case 288:
     case 289:
     case 290:
+    case 291:
       return aarch64_ins_simple_index (self, info, code, inst, errors);
     case 42:
       return aarch64_ins_reglist (self, info, code, inst, errors);
@@ -773,13 +773,14 @@  aarch64_insert_operand (const aarch64_operand *self,
     case 205:
     case 206:
     case 207:
-    case 264:
-    case 291:
+    case 208:
+    case 265:
     case 292:
-    case 294:
-    case 296:
-    case 301:
+    case 293:
+    case 295:
+    case 297:
     case 302:
+    case 303:
       return aarch64_ins_imm (self, info, code, inst, errors);
     case 51:
     case 52:
@@ -927,80 +928,80 @@  aarch64_insert_operand (const aarch64_operand *self,
     case 197:
     case 198:
     case 199:
-    case 277:
+    case 278:
       return aarch64_ins_sve_shrimm (self, info, code, inst, errors);
-    case 212:
     case 213:
     case 214:
     case 215:
-      return aarch64_ins_sme_za_vrs1 (self, info, code, inst, errors);
     case 216:
+      return aarch64_ins_sme_za_vrs1 (self, info, code, inst, errors);
     case 217:
     case 218:
     case 219:
+    case 220:
       return aarch64_ins_sme_za_vrs2 (self, info, code, inst, errors);
-    case 227:
     case 228:
-    case 230:
+    case 229:
     case 231:
     case 232:
     case 233:
     case 234:
+    case 235:
       return aarch64_ins_sve_quad_index (self, info, code, inst, errors);
-    case 236:
     case 237:
-      return aarch64_ins_sve_index (self, info, code, inst, errors);
     case 238:
-    case 240:
-    case 257:
-    case 303:
+      return aarch64_ins_sve_index (self, info, code, inst, errors);
+    case 239:
+    case 241:
+    case 258:
     case 304:
     case 305:
+    case 306:
       return aarch64_ins_sve_reglist (self, info, code, inst, errors);
-    case 241:
     case 242:
-    case 244:
+    case 243:
     case 245:
     case 246:
     case 247:
-    case 256:
-      return aarch64_ins_sve_aligned_reglist (self, info, code, inst, errors);
     case 248:
+    case 257:
+      return aarch64_ins_sve_aligned_reglist (self, info, code, inst, errors);
     case 249:
+    case 250:
       return aarch64_ins_sve_strided_reglist (self, info, code, inst, errors);
-    case 252:
-    case 254:
-    case 265:
-      return aarch64_ins_sme_za_hv_tiles (self, info, code, inst, errors);
     case 253:
     case 255:
-      return aarch64_ins_sme_za_hv_tiles_range (self, info, code, inst, errors);
     case 266:
+      return aarch64_ins_sme_za_hv_tiles (self, info, code, inst, errors);
+    case 254:
+    case 256:
+      return aarch64_ins_sme_za_hv_tiles_range (self, info, code, inst, errors);
     case 267:
     case 268:
     case 269:
     case 270:
     case 271:
     case 272:
-      return aarch64_ins_sme_za_array (self, info, code, inst, errors);
     case 273:
-      return aarch64_ins_sme_addr_ri_u4xvl (self, info, code, inst, errors);
+      return aarch64_ins_sme_za_array (self, info, code, inst, errors);
     case 274:
-      return aarch64_ins_sme_sm_za (self, info, code, inst, errors);
+      return aarch64_ins_sme_addr_ri_u4xvl (self, info, code, inst, errors);
     case 275:
-      return aarch64_ins_sme_pred_reg_with_index (self, info, code, inst, errors);
+      return aarch64_ins_sme_sm_za (self, info, code, inst, errors);
     case 276:
+      return aarch64_ins_sme_pred_reg_with_index (self, info, code, inst, errors);
+    case 277:
       return aarch64_ins_plain_shrimm (self, info, code, inst, errors);
-    case 298:
     case 299:
     case 300:
+    case 301:
       return aarch64_ins_x0_to_x30 (self, info, code, inst, errors);
-    case 306:
     case 307:
     case 308:
     case 309:
-      return aarch64_ins_rcpc3_addr_opt_offset (self, info, code, inst, errors);
     case 310:
+      return aarch64_ins_rcpc3_addr_opt_offset (self, info, code, inst, errors);
+    case 311:
       return aarch64_ins_rcpc3_addr_offset (self, info, code, inst, errors);
     default: assert (0); abort ();
     }
diff --git a/opcodes/aarch64-dis-2.c b/opcodes/aarch64-dis-2.c
index 7819c1091b1..a85b5c434f0 100644
--- a/opcodes/aarch64-dis-2.c
+++ b/opcodes/aarch64-dis-2.c
@@ -33663,30 +33663,30 @@  aarch64_extract_operand (const aarch64_operand *self,
     case 191:
     case 192:
     case 193:
-    case 208:
     case 209:
     case 210:
     case 211:
-    case 220:
+    case 212:
     case 221:
     case 222:
     case 223:
     case 224:
-    case 235:
-    case 239:
-    case 243:
-    case 250:
+    case 225:
+    case 236:
+    case 240:
+    case 244:
     case 251:
-    case 258:
+    case 252:
     case 259:
     case 260:
     case 261:
+    case 262:
       return aarch64_ext_regno (self, info, code, inst, errors);
     case 6:
     case 118:
     case 119:
-    case 293:
-    case 295:
+    case 294:
+    case 296:
       return aarch64_ext_none (self, info, code, inst, errors);
     case 11:
       return aarch64_ext_regrt_sysins (self, info, code, inst, errors);
@@ -33705,17 +33705,16 @@  aarch64_extract_operand (const aarch64_operand *self,
     case 36:
     case 37:
     case 38:
-    case 297:
+    case 298:
       return aarch64_ext_reglane (self, info, code, inst, errors);
     case 39:
     case 40:
     case 41:
-    case 225:
     case 226:
-    case 229:
-    case 262:
+    case 227:
+    case 230:
     case 263:
-    case 278:
+    case 264:
     case 279:
     case 280:
     case 281:
@@ -33728,6 +33727,7 @@  aarch64_extract_operand (const aarch64_operand *self,
     case 288:
     case 289:
     case 290:
+    case 291:
       return aarch64_ext_simple_index (self, info, code, inst, errors);
     case 42:
       return aarch64_ext_reglist (self, info, code, inst, errors);
@@ -33776,13 +33776,14 @@  aarch64_extract_operand (const aarch64_operand *self,
     case 205:
     case 206:
     case 207:
-    case 264:
-    case 291:
+    case 208:
+    case 265:
     case 292:
-    case 294:
-    case 296:
-    case 301:
+    case 293:
+    case 295:
+    case 297:
     case 302:
+    case 303:
       return aarch64_ext_imm (self, info, code, inst, errors);
     case 51:
     case 52:
@@ -33932,81 +33933,81 @@  aarch64_extract_operand (const aarch64_operand *self,
     case 197:
     case 198:
     case 199:
-    case 277:
+    case 278:
       return aarch64_ext_sve_shrimm (self, info, code, inst, errors);
-    case 212:
     case 213:
     case 214:
     case 215:
-      return aarch64_ext_sme_za_vrs1 (self, info, code, inst, errors);
     case 216:
+      return aarch64_ext_sme_za_vrs1 (self, info, code, inst, errors);
     case 217:
     case 218:
     case 219:
+    case 220:
       return aarch64_ext_sme_za_vrs2 (self, info, code, inst, errors);
-    case 227:
     case 228:
-    case 230:
+    case 229:
     case 231:
     case 232:
     case 233:
     case 234:
+    case 235:
       return aarch64_ext_sve_quad_index (self, info, code, inst, errors);
-    case 236:
     case 237:
-      return aarch64_ext_sve_index (self, info, code, inst, errors);
     case 238:
-    case 240:
-    case 257:
-      return aarch64_ext_sve_reglist (self, info, code, inst, errors);
+      return aarch64_ext_sve_index (self, info, code, inst, errors);
+    case 239:
     case 241:
+    case 258:
+      return aarch64_ext_sve_reglist (self, info, code, inst, errors);
     case 242:
-    case 244:
+    case 243:
     case 245:
     case 246:
     case 247:
-    case 256:
-      return aarch64_ext_sve_aligned_reglist (self, info, code, inst, errors);
     case 248:
+    case 257:
+      return aarch64_ext_sve_aligned_reglist (self, info, code, inst, errors);
     case 249:
+    case 250:
       return aarch64_ext_sve_strided_reglist (self, info, code, inst, errors);
-    case 252:
-    case 254:
-    case 265:
-      return aarch64_ext_sme_za_hv_tiles (self, info, code, inst, errors);
     case 253:
     case 255:
-      return aarch64_ext_sme_za_hv_tiles_range (self, info, code, inst, errors);
     case 266:
+      return aarch64_ext_sme_za_hv_tiles (self, info, code, inst, errors);
+    case 254:
+    case 256:
+      return aarch64_ext_sme_za_hv_tiles_range (self, info, code, inst, errors);
     case 267:
     case 268:
     case 269:
     case 270:
     case 271:
     case 272:
-      return aarch64_ext_sme_za_array (self, info, code, inst, errors);
     case 273:
-      return aarch64_ext_sme_addr_ri_u4xvl (self, info, code, inst, errors);
+      return aarch64_ext_sme_za_array (self, info, code, inst, errors);
     case 274:
-      return aarch64_ext_sme_sm_za (self, info, code, inst, errors);
+      return aarch64_ext_sme_addr_ri_u4xvl (self, info, code, inst, errors);
     case 275:
-      return aarch64_ext_sme_pred_reg_with_index (self, info, code, inst, errors);
+      return aarch64_ext_sme_sm_za (self, info, code, inst, errors);
     case 276:
+      return aarch64_ext_sme_pred_reg_with_index (self, info, code, inst, errors);
+    case 277:
       return aarch64_ext_plain_shrimm (self, info, code, inst, errors);
-    case 298:
     case 299:
     case 300:
+    case 301:
       return aarch64_ext_x0_to_x30 (self, info, code, inst, errors);
-    case 303:
     case 304:
     case 305:
-      return aarch64_ext_sve_reglist_zt (self, info, code, inst, errors);
     case 306:
+      return aarch64_ext_sve_reglist_zt (self, info, code, inst, errors);
     case 307:
     case 308:
     case 309:
-      return aarch64_ext_rcpc3_addr_opt_offset (self, info, code, inst, errors);
     case 310:
+      return aarch64_ext_rcpc3_addr_opt_offset (self, info, code, inst, errors);
+    case 311:
       return aarch64_ext_rcpc3_addr_offset (self, info, code, inst, errors);
     default: assert (0); abort ();
     }
diff --git a/opcodes/aarch64-opc-2.c b/opcodes/aarch64-opc-2.c
index ad77a36730c..b0a5ccb4a83 100644
--- a/opcodes/aarch64-opc-2.c
+++ b/opcodes/aarch64-opc-2.c
@@ -232,6 +232,7 @@  const struct aarch64_operand aarch64_operands[] =
   {AARCH64_OPND_CLASS_IMMEDIATE, "SVE_UIMM7", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SVE_imm7}, "a 7-bit unsigned immediate"},
   {AARCH64_OPND_CLASS_IMMEDIATE, "SVE_UIMM8", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SVE_imm8}, "an 8-bit unsigned immediate"},
   {AARCH64_OPND_CLASS_IMMEDIATE, "SVE_UIMM8_53", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_imm5,FLD_imm3_10}, "an 8-bit unsigned immediate"},
+  {AARCH64_OPND_CLASS_IMMEDIATE, "SVE_UIMM4", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SVE_imm4}, "a 4-bit unsigned immediate"},
   {AARCH64_OPND_CLASS_SIMD_REG, "SVE_VZn", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SVE_Zn}, "a SIMD register"},
   {AARCH64_OPND_CLASS_SIMD_REG, "SVE_Vd", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SVE_Vd}, "a SIMD register"},
   {AARCH64_OPND_CLASS_SIMD_REG, "SVE_Vm", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SVE_Vm}, "a SIMD register"},