diff mbox series

aarch64: Fix the hyphenated disassembly comment.

Message ID 20240521105609.119868-1-srinath.parvathaneni@arm.com
State Committed
Headers
Series aarch64: Fix the hyphenated disassembly comment. |

Checks

Context Check Description
linaro-tcwg-bot/tcwg_binutils_build--master-arm success Testing passed
linaro-tcwg-bot/tcwg_binutils_build--master-aarch64 success Testing passed
linaro-tcwg-bot/tcwg_binutils_check--master-aarch64 warning Patch is already merged
linaro-tcwg-bot/tcwg_binutils_check--master-arm warning Patch is already merged

Commit Message

srinath May 21, 2024, 10:56 a.m. UTC 
  From: Srinath Parvathaneni <srinath.parvathaneni@arm.com>

Hi,

This patch fixes the following comment.

-  /* The hyphenated form is preferred for disassembly if there are
-     more than two registers in the list, and the register numbers
      are monotonically increasing in increments of one.  */

+  /* The hyphenated form is preferred for disassembly if there is
+     more than one register in the list, and the register numbers
      are monotonically increasing in increments of one.  */

Ok for binutils-master? and backport to binutils-2_42-branch ?

Regards,
Srinath.
---
 opcodes/aarch64-opc.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

Comments

Nick Clifton May 21, 2024, 12:24 p.m. UTC | #1 
Hi Srinath,

> Ok for binutils-master? 

Approved - please apply.

> and backport to binutils-2_42-branch ?

You really want to backport an update to a comment ?  Well,
far be it from me to stop you - approved, please apply.

Cheers
   Nick
Richard Earnshaw (lists) May 21, 2024, 1:49 p.m. UTC | #2 
On 21/05/2024 13:24, Nick Clifton wrote:
> Hi Srinath,
> 
>> and backport to binutils-2_42-branch ?
> 
> You really want to backport an update to a comment ?  Well,
> far be it from me to stop you - approved, please apply.
> 
> Cheers
>   Nick
> 

Seems like overkill to me.

R.
srinath May 21, 2024, 2:03 p.m. UTC | #3 
Thanks, applied to master.

Please disregard my backport request.
diff mbox series

Patch

diff --git a/opcodes/aarch64-opc.c b/opcodes/aarch64-opc.c
index 4a7a6ae784b..032ab17e250 100644
--- a/opcodes/aarch64-opc.c
+++ b/opcodes/aarch64-opc.c
@@ -3700,8 +3700,8 @@  print_register_list (char *buf, size_t size, const aarch64_opnd_info *opnd,
   else
     tb[0] = '\0';
 
-  /* The hyphenated form is preferred for disassembly if there are
-     more than two registers in the list, and the register numbers
+  /* The hyphenated form is preferred for disassembly if there is
+     more than one register in the list, and the register numbers
      are monotonically increasing in increments of one.  */
   if (stride == 1 && num_regs > 1
       && ((opnd->type != AARCH64_OPND_SME_Zt2)