x86/APX: Add invalid checks for APX EVEX.X4.
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| linaro-tcwg-bot/tcwg_binutils_build--master-arm |
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| linaro-tcwg-bot/tcwg_binutils_build--master-aarch64 |
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| linaro-tcwg-bot/tcwg_binutils_check--master-aarch64 |
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| linaro-tcwg-bot/tcwg_binutils_check--master-arm |
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Commit Message
Hi Maintianer,
APX spec updated EVEX payload description for bit P[10], this patch is
to add invalid checks for APX EVEX.X4.
Regards,
Lili.
APX spec updated EVEX payload description for bit P[10] (now called
EVEX.U) to include usage between APX and AVX10 and how it is related
to EVEX.X4.
EVEX.X4 is defined only when ModRM.Mod != 3. When ModRM.Mod = 3,
the U bit must be 1 for all promoted instructions.
gas/ChangeLog:
* config/tc-i386.c (build_apx_evex_prefix): Added invalid check for APX
X4.
* testsuite/gas/i386/x86-64-apx-evex-promoted-bad.d: Added invalid
testcase.
* testsuite/gas/i386/x86-64-apx-evex-promoted-bad.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (get_valid_dis386): Added invalid check for APX X4.
---
gas/config/tc-i386.c | 6 +++++-
gas/testsuite/gas/i386/x86-64-apx-evex-promoted-bad.d | 4 ++++
gas/testsuite/gas/i386/x86-64-apx-evex-promoted-bad.s | 7 +++++++
opcodes/i386-dis.c | 4 ++++
4 files changed, 20 insertions(+), 1 deletion(-)
Comments
On 19.04.2024 06:24, Cui, Lili wrote:
> APX spec updated EVEX payload description for bit P[10] (now called
> EVEX.U) to include usage between APX and AVX10 and how it is related
> to EVEX.X4.
>
> EVEX.X4 is defined only when ModRM.Mod != 3. When ModRM.Mod = 3,
> the U bit must be 1 for all promoted instructions.
>
> gas/ChangeLog:
>
> * config/tc-i386.c (build_apx_evex_prefix): Added invalid check for APX
> X4.
> * testsuite/gas/i386/x86-64-apx-evex-promoted-bad.d: Added invalid
> testcase.
> * testsuite/gas/i386/x86-64-apx-evex-promoted-bad.s: Ditto.
>
> opcodes/ChangeLog:
>
> * i386-dis.c (get_valid_dis386): Added invalid check for APX X4.
Okay.
Jan
@@ -4276,7 +4276,11 @@ build_apx_evex_prefix (void)
if (i.rex2 & REX_B)
i.vex.bytes[1] |= 0x08;
if (i.rex2 & REX_X)
- i.vex.bytes[2] &= ~0x04;
+ {
+ /* EVEX.X4 is defined only when ModRM.Mod != 3. */
+ gas_assert (i.rm.mode != 3);
+ i.vex.bytes[2] &= ~0x04;
+ }
if (i.vex.register_specifier
&& i.vex.register_specifier->reg_flags & RegRex2)
i.vex.bytes[3] &= ~0x08;
@@ -39,4 +39,8 @@ Disassembly of section .text:
[ ]*[a-f0-9]+:[ ]+62 d4 24 18 8f[ ]+\(bad\)
[ ]*[a-f0-9]+:[ ]+c3[ ]+.*
[ ]*[a-f0-9]+:[ ]+62 fc 7d 0c 60 c7[ ]+movbe \{bad-nf\},%r23w,%ax
+[ ]*[a-f0-9]+:[ ]+62 fc 79 08 60[ ]+\(bad\)
+[ ]*[a-f0-9]+:[ ]+c2 ff ff[ ]+.*
+[ ]*[a-f0-9]+:[ ]+62 ec f8 08 f5[ ]+\(bad\)
+[ ]*[a-f0-9]+:[ ]+c3[ ]+.*
#pass
@@ -53,3 +53,10 @@ _start:
#EVEX_MAP4 movbe %r18w,%ax set EVEX.nf = 1.
.insn EVEX.L0.66.M12.W0 0x60, %di, %ax {%k4}
+
+ # EVEX_MAP4 movbe %r18w,%ax set X4 (EVEX.P[10] = 0).
+ .byte 0x62, 0xfc, 0x79, 0x08, 0x60, 0xc2
+ .byte 0xff, 0xff
+
+ # EVEX from VEX bzhi %rax,%rbx,%r16 set X4 (EVEX.P[10] = 0).
+ .byte 0x62, 0xec, 0xf8, 0x08, 0xf5, 0xc3
@@ -9190,6 +9190,10 @@ get_valid_dis386 (const struct dis386 *dp, instr_info *ins)
if (!fetch_modrm (ins))
return &err_opcode;
+ /* EVEX.X4 is defined only when ModRM.Mod != 3. */
+ if (ins->modrm.mod == 3 && (ins->rex2 & REX_X))
+ return &bad_opcode;
+
/* Set vector length. For EVEX-promoted instructions, evex.ll == 0b00,
which has the same encoding as vex.length == 128 and they can share
the same processing with vex.length in OP_VEX. */