diff mbox series

cpu: cris: drop some unused vars

Message ID 20231219024423.25287-1-vapier@gentoo.org
State New
Headers
Series cpu: cris: drop some unused vars |

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Commit Message

Mike Frysinger Dec. 19, 2023, 2:44 a.m. UTC 
  These fix unused variable warnings in the generated sim.
---
 cpu/cris.cpu                  | 4 ++--
 sim/cris/semcrisv10f-switch.c | 2 --
 sim/cris/semcrisv32f-switch.c | 2 --
 3 files changed, 2 insertions(+), 6 deletions(-)

Comments

Hans-Peter Nilsson Dec. 19, 2023, 3:09 a.m. UTC | #1 
> From: Mike Frysinger <vapier@gentoo.org>
> Date: Mon, 18 Dec 2023 21:44:23 -0500

> These fix unused variable warnings in the generated sim.
> ---
>  cpu/cris.cpu                  | 4 ++--
>  sim/cris/semcrisv10f-switch.c | 2 --
>  sim/cris/semcrisv32f-switch.c | 2 --
>  3 files changed, 2 insertions(+), 6 deletions(-)
> 
> diff --git a/cpu/cris.cpu b/cpu/cris.cpu
> index 97b44581e78b..2e8cb352b2b9 100644
> --- a/cpu/cris.cpu
> +++ b/cpu/cris.cpu
> @@ -2598,7 +2598,7 @@
>       "move ${Ps},${Rd-sfield}"
>       (+ Ps RFIX_MOVE_S_R MODE_REGISTER SIZE_FIXED Rd-sfield)
>       (sequence
> -       ((SI grno) (SI prno) (SI newval))
> +       ((SI prno) (SI newval))
>         (set prno (regno Ps))
>         ; CGEN-FIXME: Can't use the following and then "grno" below because
>         ; CGEN will emit a "tmp_grno" *also* in decodev32.c:crisv32f_decode

'k, but can you please "move" the removed declaration to the
comment?

Something like '; CGEN-FIXME: Can't declare (SI grno) and
then the following and then use "grno" below because'.  Else
it'll look even more odd with there being no "grno" at all.

If it's not obvious: IIRC, this refers to "(regno
Rd-sfield)" which would be more readable "decoded" as
"grno".  ...well, relatively more readable.

> @@ -3837,7 +3837,7 @@
>   "$Rs,$Rd"
>   (+ Rd MODE_REGISTER RFIX_BTST SIZE_FIXED Rs)
>   (sequence
> -   ((SI tmpd) (SI cnt))
> +   ((SI tmpd))

Either that, or add "(set cnt (sub 31 (and Rs 31))" with the
next line replaced by "(set tmpd (sll Rd cnt))".  At your
discretion.

No need to repost if you optionally fix those, commit at
your leisure.  Thanks!

brgds, H-P
Mike Frysinger Dec. 19, 2023, 10:45 a.m. UTC | #2 
thanks, i'm not a lisp person, so not easy for me to put these together.
i applied your suggestions.
-mike
diff mbox series

Patch

diff --git a/cpu/cris.cpu b/cpu/cris.cpu
index 97b44581e78b..2e8cb352b2b9 100644
--- a/cpu/cris.cpu
+++ b/cpu/cris.cpu
@@ -2598,7 +2598,7 @@ 
      "move ${Ps},${Rd-sfield}"
      (+ Ps RFIX_MOVE_S_R MODE_REGISTER SIZE_FIXED Rd-sfield)
      (sequence
-       ((SI grno) (SI prno) (SI newval))
+       ((SI prno) (SI newval))
        (set prno (regno Ps))
        ; CGEN-FIXME: Can't use the following and then "grno" below because
        ; CGEN will emit a "tmp_grno" *also* in decodev32.c:crisv32f_decode
@@ -3837,7 +3837,7 @@ 
  "$Rs,$Rd"
  (+ Rd MODE_REGISTER RFIX_BTST SIZE_FIXED Rs)
  (sequence
-   ((SI tmpd) (SI cnt))
+   ((SI tmpd))
    (set tmpd (sll Rd (sub 31 (and Rs 31))))
    (setf-move SI tmpd))
 )
diff --git a/sim/cris/semcrisv10f-switch.c b/sim/cris/semcrisv10f-switch.c
index a2bf6f1a6305..711d3c049fd5 100644
--- a/sim/cris/semcrisv10f-switch.c
+++ b/sim/cris/semcrisv10f-switch.c
@@ -3181,7 +3181,6 @@  cgen_rtx_error (current_cpu, "move-r-spr: trying to set a read-only special regi
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
 
 {
-  SI tmp_grno;
   SI tmp_prno;
   SI tmp_newval;
   tmp_prno = FLD (f_operand2);
@@ -11777,7 +11776,6 @@  SET_H_VBIT_MOVE (0);
 
 {
   SI tmp_tmpd;
-  SI tmp_cnt;
   tmp_tmpd = SLLSI (GET_H_GR (FLD (f_operand2)), SUBSI (31, ANDSI (GET_H_GR (FLD (f_operand1)), 31)));
 {
   {
diff --git a/sim/cris/semcrisv32f-switch.c b/sim/cris/semcrisv32f-switch.c
index 8dd455c94e9a..0ff3df5ac848 100644
--- a/sim/cris/semcrisv32f-switch.c
+++ b/sim/cris/semcrisv32f-switch.c
@@ -3108,7 +3108,6 @@  cgen_rtx_error (current_cpu, "move-r-spr: trying to set a read-only special regi
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
 
 {
-  SI tmp_grno;
   SI tmp_prno;
   SI tmp_newval;
   tmp_prno = FLD (f_operand2);
@@ -12047,7 +12046,6 @@  SET_H_VBIT_MOVE (0);
 
 {
   SI tmp_tmpd;
-  SI tmp_cnt;
   tmp_tmpd = SLLSI (GET_H_GR (FLD (f_operand2)), SUBSI (31, ANDSI (GET_H_GR (FLD (f_operand1)), 31)));
 {
   {