[1/3] as: Add new atomic instructions in LoongArch v1.1
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Commit Message
New atomic instructions in LoongArch v1.1:
- sc.q
- llacq.w/d
- screl.w/d
- amcas{_db}.b/h/w/d
- amswap{_db}.b/h
- amadd{_db}.b/h
Signed-off-by: Jiajie Chen <c@jia.je>
---
gas/config/tc-loongarch.c | 6 ++--
gas/testsuite/gas/loongarch/load_store_op.d | 37 +++++++++++++++++++++
gas/testsuite/gas/loongarch/load_store_op.s | 37 +++++++++++++++++++++
opcodes/loongarch-opc.c | 37 +++++++++++++++++++++
4 files changed, 115 insertions(+), 2 deletions(-)
Comments
The sc.q, llacq.w/d, screl.w/d may also need to support the formats
"sc.q r4, r5, r6, 0" and "llacq.w/d / screl.w/d r4, r5, 0".
在 2023/10/25 下午9:49, Jiajie Chen 写道:
> New atomic instructions in LoongArch v1.1:
>
> - sc.q
> - llacq.w/d
> - screl.w/d
> - amcas{_db}.b/h/w/d
> - amswap{_db}.b/h
> - amadd{_db}.b/h
>
> Signed-off-by: Jiajie Chen <c@jia.je>
> ---
> gas/config/tc-loongarch.c | 6 ++--
> gas/testsuite/gas/loongarch/load_store_op.d | 37 +++++++++++++++++++++
> gas/testsuite/gas/loongarch/load_store_op.s | 37 +++++++++++++++++++++
> opcodes/loongarch-opc.c | 37 +++++++++++++++++++++
> 4 files changed, 115 insertions(+), 2 deletions(-)
>
> diff --git a/gas/config/tc-loongarch.c b/gas/config/tc-loongarch.c
> index 33f3e71ce2f..49c70bf130b 100644
> --- a/gas/config/tc-loongarch.c
> +++ b/gas/config/tc-loongarch.c
> @@ -898,8 +898,10 @@ check_this_insn_before_appending (struct loongarch_cl_insn *ip)
> ip->reloc_num++;
> }
> else if (ip->insn->mask == 0xffff8000
> - /* amswap.w rd, rk, rj */
> - && ((ip->insn_bin & 0xfff00000) == 0x38600000
> + /* amcas.b rd, rk, rj */
> + && ((ip->insn_bin & 0xfff80000) == 0x38580000
> + /* amswap.w rd, rk, rj */
> + || (ip->insn_bin & 0xfff00000) == 0x38600000
> /* ammax_db.wu rd, rk, rj */
> || (ip->insn_bin & 0xffff0000) == 0x38700000
> /* ammin_db.wu rd, rk, rj */
> diff --git a/gas/testsuite/gas/loongarch/load_store_op.d b/gas/testsuite/gas/loongarch/load_store_op.d
> index e1b4dea1851..02f9d7f035f 100644
> --- a/gas/testsuite/gas/loongarch/load_store_op.d
> +++ b/gas/testsuite/gas/loongarch/load_store_op.d
> @@ -176,3 +176,40 @@ Disassembly of section .text:
> 298:[ ]+387e98a4 [ ]+stle.h[ ]+[ ]+\$a0, \$a1, \$a2
> 29c:[ ]+387f18a4 [ ]+stle.w[ ]+[ ]+\$a0, \$a1, \$a2
> 2a0:[ ]+387f98a4 [ ]+stle.d[ ]+[ ]+\$a0, \$a1, \$a2
> + 2a4:[ ]+385714c4 [ ]+sc.q[ ]+[ ]+\$a0, \$a1, \$a2
> + 2a8:[ ]+385780a4 [ ]+llacq.w[ ]+[ ]+\$a0, \$a1
> + 2ac:[ ]+385784a4 [ ]+screl.w[ ]+[ ]+\$a0, \$a1
> + 2b0:[ ]+385788a4 [ ]+llacq.d[ ]+[ ]+\$a0, \$a1
> + 2b4:[ ]+38578ca4 [ ]+screl.d[ ]+[ ]+\$a0, \$a1
> + 2b8:[ ]+385814c4 [ ]+amcas.b[ ]+[ ]+\$a0, \$a1, \$a2
> + 2bc:[ ]+385818a4 [ ]+amcas.b[ ]+[ ]+\$a0, \$a2, \$a1
> + 2c0:[ ]+385894c4 [ ]+amcas.h[ ]+[ ]+\$a0, \$a1, \$a2
> + 2c4:[ ]+385898a4 [ ]+amcas.h[ ]+[ ]+\$a0, \$a2, \$a1
> + 2c8:[ ]+385914c4 [ ]+amcas.w[ ]+[ ]+\$a0, \$a1, \$a2
> + 2cc:[ ]+385918a4 [ ]+amcas.w[ ]+[ ]+\$a0, \$a2, \$a1
> + 2d0:[ ]+385994c4 [ ]+amcas.d[ ]+[ ]+\$a0, \$a1, \$a2
> + 2d4:[ ]+385998a4 [ ]+amcas.d[ ]+[ ]+\$a0, \$a2, \$a1
> + 2d8:[ ]+385a14c4 [ ]+amcas_db.b[ ]+[ ]+\$a0, \$a1, \$a2
> + 2dc:[ ]+385a18a4 [ ]+amcas_db.b[ ]+[ ]+\$a0, \$a2, \$a1
> + 2e0:[ ]+385a94c4 [ ]+amcas_db.h[ ]+[ ]+\$a0, \$a1, \$a2
> + 2e4:[ ]+385a98a4 [ ]+amcas_db.h[ ]+[ ]+\$a0, \$a2, \$a1
> + 2e8:[ ]+385b14c4 [ ]+amcas_db.w[ ]+[ ]+\$a0, \$a1, \$a2
> + 2ec:[ ]+385b18a4 [ ]+amcas_db.w[ ]+[ ]+\$a0, \$a2, \$a1
> + 2f0:[ ]+385b94c4 [ ]+amcas_db.d[ ]+[ ]+\$a0, \$a1, \$a2
> + 2f4:[ ]+385b98a4 [ ]+amcas_db.d[ ]+[ ]+\$a0, \$a2, \$a1
> + 2f8:[ ]+385c14c4 [ ]+amswap.b[ ]+[ ]+\$a0, \$a1, \$a2
> + 2fc:[ ]+385c18a4 [ ]+amswap.b[ ]+[ ]+\$a0, \$a2, \$a1
> + 300:[ ]+385c94c4 [ ]+amswap.h[ ]+[ ]+\$a0, \$a1, \$a2
> + 304:[ ]+385c98a4 [ ]+amswap.h[ ]+[ ]+\$a0, \$a2, \$a1
> + 308:[ ]+385d14c4 [ ]+amadd.b[ ]+[ ]+\$a0, \$a1, \$a2
> + 30c:[ ]+385d18a4 [ ]+amadd.b[ ]+[ ]+\$a0, \$a2, \$a1
> + 310:[ ]+385d94c4 [ ]+amadd.h[ ]+[ ]+\$a0, \$a1, \$a2
> + 314:[ ]+385d98a4 [ ]+amadd.h[ ]+[ ]+\$a0, \$a2, \$a1
> + 318:[ ]+385e14c4 [ ]+amswap_db.b[ ]+[ ]+\$a0, \$a1, \$a2
> + 31c:[ ]+385e18a4 [ ]+amswap_db.b[ ]+[ ]+\$a0, \$a2, \$a1
> + 320:[ ]+385e94c4 [ ]+amswap_db.h[ ]+[ ]+\$a0, \$a1, \$a2
> + 324:[ ]+385e98a4 [ ]+amswap_db.h[ ]+[ ]+\$a0, \$a2, \$a1
> + 328:[ ]+385f14c4 [ ]+amadd_db.b[ ]+[ ]+\$a0, \$a1, \$a2
> + 32c:[ ]+385f18a4 [ ]+amadd_db.b[ ]+[ ]+\$a0, \$a2, \$a1
> + 330:[ ]+385f94c4 [ ]+amadd_db.h[ ]+[ ]+\$a0, \$a1, \$a2
> + 334:[ ]+385f98a4 [ ]+amadd_db.h[ ]+[ ]+\$a0, \$a2, \$a1
> diff --git a/gas/testsuite/gas/loongarch/load_store_op.s b/gas/testsuite/gas/loongarch/load_store_op.s
> index efbd124a29c..9682d45c970 100644
> --- a/gas/testsuite/gas/loongarch/load_store_op.s
> +++ b/gas/testsuite/gas/loongarch/load_store_op.s
> @@ -167,3 +167,40 @@ stle.b $r4,$r5,$r6
> stle.h $r4,$r5,$r6
> stle.w $r4,$r5,$r6
> stle.d $r4,$r5,$r6
> +sc.q $r4,$r5,$r6
> +llacq.w $r4,$r5
> +screl.w $r4,$r5
> +llacq.d $r4,$r5
> +screl.d $r4,$r5
> +amcas.b $r4,$r5,$r6,0
> +amcas.b $r4,$r6,$r5
> +amcas.h $r4,$r5,$r6,0
> +amcas.h $r4,$r6,$r5
> +amcas.w $r4,$r5,$r6,0
> +amcas.w $r4,$r6,$r5
> +amcas.d $r4,$r5,$r6,0
> +amcas.d $r4,$r6,$r5
> +amcas_db.b $r4,$r5,$r6,0
> +amcas_db.b $r4,$r6,$r5
> +amcas_db.h $r4,$r5,$r6,0
> +amcas_db.h $r4,$r6,$r5
> +amcas_db.w $r4,$r5,$r6,0
> +amcas_db.w $r4,$r6,$r5
> +amcas_db.d $r4,$r5,$r6,0
> +amcas_db.d $r4,$r6,$r5
> +amswap.b $r4,$r5,$r6,0
> +amswap.b $r4,$r6,$r5
> +amswap.h $r4,$r5,$r6,0
> +amswap.h $r4,$r6,$r5
> +amadd.b $r4,$r5,$r6,0
> +amadd.b $r4,$r6,$r5
> +amadd.h $r4,$r5,$r6,0
> +amadd.h $r4,$r6,$r5
> +amswap_db.b $r4,$r5,$r6,0
> +amswap_db.b $r4,$r6,$r5
> +amswap_db.h $r4,$r5,$r6,0
> +amswap_db.h $r4,$r6,$r5
> +amadd_db.b $r4,$r5,$r6,0
> +amadd_db.b $r4,$r6,$r5
> +amadd_db.h $r4,$r5,$r6,0
> +amadd_db.h $r4,$r6,$r5
> diff --git a/opcodes/loongarch-opc.c b/opcodes/loongarch-opc.c
> index 362b6581c76..2857c45f812 100644
> --- a/opcodes/loongarch-opc.c
> +++ b/opcodes/loongarch-opc.c
> @@ -816,6 +816,43 @@ static struct loongarch_opcode loongarch_load_store_opcodes[] =
> { 0x38240000, 0xffff8000, "ldx.hu", "r0:5,r5:5,r10:5", 0, 0, 0, 0 },
> { 0x38280000, 0xffff8000, "ldx.wu", "r0:5,r5:5,r10:5", 0, 0, 0, 0 },
> { 0x382c0000, 0xffff8000, "preldx", "u0:5,r5:5,r10:5", 0, 0, 0, 0 },
> + { 0x38570000, 0xffff8000, "sc.q", "r0:5,r10:5,r5:5", 0, 0, 0, 0 },
> + { 0x38578000, 0xfffffc00, "llacq.w", "r0:5,r5:5", 0, 0, 0, 0 },
> + { 0x38578400, 0xfffffc00, "screl.w", "r0:5,r5:5", 0, 0, 0, 0 },
> + { 0x38578800, 0xfffffc00, "llacq.d", "r0:5,r5:5", 0, 0, 0, 0 },
> + { 0x38578c00, 0xfffffc00, "screl.d", "r0:5,r5:5", 0, 0, 0, 0 },
> + { 0x0, 0x0, "amcas.b", "r,r,r,u0:0", "amcas.b %1,%2,%3", 0, 0, 0 },
> + { 0x38580000, 0xffff8000, "amcas.b", "r0:5,r10:5,r5:5", 0, 0, 0, 0 },
> + { 0x0, 0x0, "amcas.h", "r,r,r,u0:0", "amcas.h %1,%2,%3", 0, 0, 0 },
> + { 0x38588000, 0xffff8000, "amcas.h", "r0:5,r10:5,r5:5", 0, 0, 0, 0 },
> + { 0x0, 0x0, "amcas.w", "r,r,r,u0:0", "amcas.w %1,%2,%3", 0, 0, 0 },
> + { 0x38590000, 0xffff8000, "amcas.w", "r0:5,r10:5,r5:5", 0, 0, 0, 0 },
> + { 0x0, 0x0, "amcas.d", "r,r,r,u0:0", "amcas.d %1,%2,%3", 0, 0, 0 },
> + { 0x38598000, 0xffff8000, "amcas.d", "r0:5,r10:5,r5:5", 0, 0, 0, 0 },
> + { 0x0, 0x0, "amcas_db.b", "r,r,r,u0:0", "amcas_db.b %1,%2,%3", 0, 0, 0 },
> + { 0x385a0000, 0xffff8000, "amcas_db.b", "r0:5,r10:5,r5:5", 0, 0, 0, 0 },
> + { 0x0, 0x0, "amcas_db.h", "r,r,r,u0:0", "amcas_db.h %1,%2,%3", 0, 0, 0 },
> + { 0x385a8000, 0xffff8000, "amcas_db.h", "r0:5,r10:5,r5:5", 0, 0, 0, 0 },
> + { 0x0, 0x0, "amcas_db.w", "r,r,r,u0:0", "amcas_db.w %1,%2,%3", 0, 0, 0 },
> + { 0x385b0000, 0xffff8000, "amcas_db.w", "r0:5,r10:5,r5:5", 0, 0, 0, 0 },
> + { 0x0, 0x0, "amcas_db.d", "r,r,r,u0:0", "amcas_db.d %1,%2,%3", 0, 0, 0 },
> + { 0x385b8000, 0xffff8000, "amcas_db.d", "r0:5,r10:5,r5:5", 0, 0, 0, 0 },
> + { 0x0, 0x0, "amswap.b", "r,r,r,u0:0", "amswap.b %1,%2,%3", 0, 0, 0 },
> + { 0x385c0000, 0xffff8000, "amswap.b", "r0:5,r10:5,r5:5", 0, 0, 0, 0 },
> + { 0x0, 0x0, "amswap.h", "r,r,r,u0:0", "amswap.h %1,%2,%3", 0, 0, 0 },
> + { 0x385c8000, 0xffff8000, "amswap.h", "r0:5,r10:5,r5:5", 0, 0, 0, 0 },
> + { 0x0, 0x0, "amadd.b", "r,r,r,u0:0", "amadd.b %1,%2,%3", 0, 0, 0 },
> + { 0x385d0000, 0xffff8000, "amadd.b", "r0:5,r10:5,r5:5", 0, 0, 0, 0 },
> + { 0x0, 0x0, "amadd.h", "r,r,r,u0:0", "amadd.h %1,%2,%3", 0, 0, 0 },
> + { 0x385d8000, 0xffff8000, "amadd.h", "r0:5,r10:5,r5:5", 0, 0, 0, 0 },
> + { 0x0, 0x0, "amswap_db.b", "r,r,r,u0:0", "amswap_db.b %1,%2,%3", 0, 0, 0 },
> + { 0x385e0000, 0xffff8000, "amswap_db.b", "r0:5,r10:5,r5:5", 0, 0, 0, 0 },
> + { 0x0, 0x0, "amswap_db.h", "r,r,r,u0:0", "amswap_db.h %1,%2,%3", 0, 0, 0 },
> + { 0x385e8000, 0xffff8000, "amswap_db.h", "r0:5,r10:5,r5:5", 0, 0, 0, 0 },
> + { 0x0, 0x0, "amadd_db.b", "r,r,r,u0:0", "amadd_db.b %1,%2,%3", 0, 0, 0 },
> + { 0x385f0000, 0xffff8000, "amadd_db.b", "r0:5,r10:5,r5:5", 0, 0, 0, 0 },
> + { 0x0, 0x0, "amadd_db.h", "r,r,r,u0:0", "amadd_db.h %1,%2,%3", 0, 0, 0 },
> + { 0x385f8000, 0xffff8000, "amadd_db.h", "r0:5,r10:5,r5:5", 0, 0, 0, 0 },
> { 0x0, 0x0, "amswap.w", "r,r,r,u0:0", "amswap.w %1,%2,%3", 0, 0, 0 },
> { 0x38600000, 0xffff8000, "amswap.w", "r0:5,r10:5,r5:5", 0, 0, 0, 0 },
> { 0x0, 0x0, "amswap.d", "r,r,r,u0:0", "amswap.d %1,%2,%3", 0, 0, 0 },
@@ -898,8 +898,10 @@ check_this_insn_before_appending (struct loongarch_cl_insn *ip)
ip->reloc_num++;
}
else if (ip->insn->mask == 0xffff8000
- /* amswap.w rd, rk, rj */
- && ((ip->insn_bin & 0xfff00000) == 0x38600000
+ /* amcas.b rd, rk, rj */
+ && ((ip->insn_bin & 0xfff80000) == 0x38580000
+ /* amswap.w rd, rk, rj */
+ || (ip->insn_bin & 0xfff00000) == 0x38600000
/* ammax_db.wu rd, rk, rj */
|| (ip->insn_bin & 0xffff0000) == 0x38700000
/* ammin_db.wu rd, rk, rj */
@@ -176,3 +176,40 @@ Disassembly of section .text:
298:[ ]+387e98a4 [ ]+stle.h[ ]+[ ]+\$a0, \$a1, \$a2
29c:[ ]+387f18a4 [ ]+stle.w[ ]+[ ]+\$a0, \$a1, \$a2
2a0:[ ]+387f98a4 [ ]+stle.d[ ]+[ ]+\$a0, \$a1, \$a2
+ 2a4:[ ]+385714c4 [ ]+sc.q[ ]+[ ]+\$a0, \$a1, \$a2
+ 2a8:[ ]+385780a4 [ ]+llacq.w[ ]+[ ]+\$a0, \$a1
+ 2ac:[ ]+385784a4 [ ]+screl.w[ ]+[ ]+\$a0, \$a1
+ 2b0:[ ]+385788a4 [ ]+llacq.d[ ]+[ ]+\$a0, \$a1
+ 2b4:[ ]+38578ca4 [ ]+screl.d[ ]+[ ]+\$a0, \$a1
+ 2b8:[ ]+385814c4 [ ]+amcas.b[ ]+[ ]+\$a0, \$a1, \$a2
+ 2bc:[ ]+385818a4 [ ]+amcas.b[ ]+[ ]+\$a0, \$a2, \$a1
+ 2c0:[ ]+385894c4 [ ]+amcas.h[ ]+[ ]+\$a0, \$a1, \$a2
+ 2c4:[ ]+385898a4 [ ]+amcas.h[ ]+[ ]+\$a0, \$a2, \$a1
+ 2c8:[ ]+385914c4 [ ]+amcas.w[ ]+[ ]+\$a0, \$a1, \$a2
+ 2cc:[ ]+385918a4 [ ]+amcas.w[ ]+[ ]+\$a0, \$a2, \$a1
+ 2d0:[ ]+385994c4 [ ]+amcas.d[ ]+[ ]+\$a0, \$a1, \$a2
+ 2d4:[ ]+385998a4 [ ]+amcas.d[ ]+[ ]+\$a0, \$a2, \$a1
+ 2d8:[ ]+385a14c4 [ ]+amcas_db.b[ ]+[ ]+\$a0, \$a1, \$a2
+ 2dc:[ ]+385a18a4 [ ]+amcas_db.b[ ]+[ ]+\$a0, \$a2, \$a1
+ 2e0:[ ]+385a94c4 [ ]+amcas_db.h[ ]+[ ]+\$a0, \$a1, \$a2
+ 2e4:[ ]+385a98a4 [ ]+amcas_db.h[ ]+[ ]+\$a0, \$a2, \$a1
+ 2e8:[ ]+385b14c4 [ ]+amcas_db.w[ ]+[ ]+\$a0, \$a1, \$a2
+ 2ec:[ ]+385b18a4 [ ]+amcas_db.w[ ]+[ ]+\$a0, \$a2, \$a1
+ 2f0:[ ]+385b94c4 [ ]+amcas_db.d[ ]+[ ]+\$a0, \$a1, \$a2
+ 2f4:[ ]+385b98a4 [ ]+amcas_db.d[ ]+[ ]+\$a0, \$a2, \$a1
+ 2f8:[ ]+385c14c4 [ ]+amswap.b[ ]+[ ]+\$a0, \$a1, \$a2
+ 2fc:[ ]+385c18a4 [ ]+amswap.b[ ]+[ ]+\$a0, \$a2, \$a1
+ 300:[ ]+385c94c4 [ ]+amswap.h[ ]+[ ]+\$a0, \$a1, \$a2
+ 304:[ ]+385c98a4 [ ]+amswap.h[ ]+[ ]+\$a0, \$a2, \$a1
+ 308:[ ]+385d14c4 [ ]+amadd.b[ ]+[ ]+\$a0, \$a1, \$a2
+ 30c:[ ]+385d18a4 [ ]+amadd.b[ ]+[ ]+\$a0, \$a2, \$a1
+ 310:[ ]+385d94c4 [ ]+amadd.h[ ]+[ ]+\$a0, \$a1, \$a2
+ 314:[ ]+385d98a4 [ ]+amadd.h[ ]+[ ]+\$a0, \$a2, \$a1
+ 318:[ ]+385e14c4 [ ]+amswap_db.b[ ]+[ ]+\$a0, \$a1, \$a2
+ 31c:[ ]+385e18a4 [ ]+amswap_db.b[ ]+[ ]+\$a0, \$a2, \$a1
+ 320:[ ]+385e94c4 [ ]+amswap_db.h[ ]+[ ]+\$a0, \$a1, \$a2
+ 324:[ ]+385e98a4 [ ]+amswap_db.h[ ]+[ ]+\$a0, \$a2, \$a1
+ 328:[ ]+385f14c4 [ ]+amadd_db.b[ ]+[ ]+\$a0, \$a1, \$a2
+ 32c:[ ]+385f18a4 [ ]+amadd_db.b[ ]+[ ]+\$a0, \$a2, \$a1
+ 330:[ ]+385f94c4 [ ]+amadd_db.h[ ]+[ ]+\$a0, \$a1, \$a2
+ 334:[ ]+385f98a4 [ ]+amadd_db.h[ ]+[ ]+\$a0, \$a2, \$a1
@@ -167,3 +167,40 @@ stle.b $r4,$r5,$r6
stle.h $r4,$r5,$r6
stle.w $r4,$r5,$r6
stle.d $r4,$r5,$r6
+sc.q $r4,$r5,$r6
+llacq.w $r4,$r5
+screl.w $r4,$r5
+llacq.d $r4,$r5
+screl.d $r4,$r5
+amcas.b $r4,$r5,$r6,0
+amcas.b $r4,$r6,$r5
+amcas.h $r4,$r5,$r6,0
+amcas.h $r4,$r6,$r5
+amcas.w $r4,$r5,$r6,0
+amcas.w $r4,$r6,$r5
+amcas.d $r4,$r5,$r6,0
+amcas.d $r4,$r6,$r5
+amcas_db.b $r4,$r5,$r6,0
+amcas_db.b $r4,$r6,$r5
+amcas_db.h $r4,$r5,$r6,0
+amcas_db.h $r4,$r6,$r5
+amcas_db.w $r4,$r5,$r6,0
+amcas_db.w $r4,$r6,$r5
+amcas_db.d $r4,$r5,$r6,0
+amcas_db.d $r4,$r6,$r5
+amswap.b $r4,$r5,$r6,0
+amswap.b $r4,$r6,$r5
+amswap.h $r4,$r5,$r6,0
+amswap.h $r4,$r6,$r5
+amadd.b $r4,$r5,$r6,0
+amadd.b $r4,$r6,$r5
+amadd.h $r4,$r5,$r6,0
+amadd.h $r4,$r6,$r5
+amswap_db.b $r4,$r5,$r6,0
+amswap_db.b $r4,$r6,$r5
+amswap_db.h $r4,$r5,$r6,0
+amswap_db.h $r4,$r6,$r5
+amadd_db.b $r4,$r5,$r6,0
+amadd_db.b $r4,$r6,$r5
+amadd_db.h $r4,$r5,$r6,0
+amadd_db.h $r4,$r6,$r5
@@ -816,6 +816,43 @@ static struct loongarch_opcode loongarch_load_store_opcodes[] =
{ 0x38240000, 0xffff8000, "ldx.hu", "r0:5,r5:5,r10:5", 0, 0, 0, 0 },
{ 0x38280000, 0xffff8000, "ldx.wu", "r0:5,r5:5,r10:5", 0, 0, 0, 0 },
{ 0x382c0000, 0xffff8000, "preldx", "u0:5,r5:5,r10:5", 0, 0, 0, 0 },
+ { 0x38570000, 0xffff8000, "sc.q", "r0:5,r10:5,r5:5", 0, 0, 0, 0 },
+ { 0x38578000, 0xfffffc00, "llacq.w", "r0:5,r5:5", 0, 0, 0, 0 },
+ { 0x38578400, 0xfffffc00, "screl.w", "r0:5,r5:5", 0, 0, 0, 0 },
+ { 0x38578800, 0xfffffc00, "llacq.d", "r0:5,r5:5", 0, 0, 0, 0 },
+ { 0x38578c00, 0xfffffc00, "screl.d", "r0:5,r5:5", 0, 0, 0, 0 },
+ { 0x0, 0x0, "amcas.b", "r,r,r,u0:0", "amcas.b %1,%2,%3", 0, 0, 0 },
+ { 0x38580000, 0xffff8000, "amcas.b", "r0:5,r10:5,r5:5", 0, 0, 0, 0 },
+ { 0x0, 0x0, "amcas.h", "r,r,r,u0:0", "amcas.h %1,%2,%3", 0, 0, 0 },
+ { 0x38588000, 0xffff8000, "amcas.h", "r0:5,r10:5,r5:5", 0, 0, 0, 0 },
+ { 0x0, 0x0, "amcas.w", "r,r,r,u0:0", "amcas.w %1,%2,%3", 0, 0, 0 },
+ { 0x38590000, 0xffff8000, "amcas.w", "r0:5,r10:5,r5:5", 0, 0, 0, 0 },
+ { 0x0, 0x0, "amcas.d", "r,r,r,u0:0", "amcas.d %1,%2,%3", 0, 0, 0 },
+ { 0x38598000, 0xffff8000, "amcas.d", "r0:5,r10:5,r5:5", 0, 0, 0, 0 },
+ { 0x0, 0x0, "amcas_db.b", "r,r,r,u0:0", "amcas_db.b %1,%2,%3", 0, 0, 0 },
+ { 0x385a0000, 0xffff8000, "amcas_db.b", "r0:5,r10:5,r5:5", 0, 0, 0, 0 },
+ { 0x0, 0x0, "amcas_db.h", "r,r,r,u0:0", "amcas_db.h %1,%2,%3", 0, 0, 0 },
+ { 0x385a8000, 0xffff8000, "amcas_db.h", "r0:5,r10:5,r5:5", 0, 0, 0, 0 },
+ { 0x0, 0x0, "amcas_db.w", "r,r,r,u0:0", "amcas_db.w %1,%2,%3", 0, 0, 0 },
+ { 0x385b0000, 0xffff8000, "amcas_db.w", "r0:5,r10:5,r5:5", 0, 0, 0, 0 },
+ { 0x0, 0x0, "amcas_db.d", "r,r,r,u0:0", "amcas_db.d %1,%2,%3", 0, 0, 0 },
+ { 0x385b8000, 0xffff8000, "amcas_db.d", "r0:5,r10:5,r5:5", 0, 0, 0, 0 },
+ { 0x0, 0x0, "amswap.b", "r,r,r,u0:0", "amswap.b %1,%2,%3", 0, 0, 0 },
+ { 0x385c0000, 0xffff8000, "amswap.b", "r0:5,r10:5,r5:5", 0, 0, 0, 0 },
+ { 0x0, 0x0, "amswap.h", "r,r,r,u0:0", "amswap.h %1,%2,%3", 0, 0, 0 },
+ { 0x385c8000, 0xffff8000, "amswap.h", "r0:5,r10:5,r5:5", 0, 0, 0, 0 },
+ { 0x0, 0x0, "amadd.b", "r,r,r,u0:0", "amadd.b %1,%2,%3", 0, 0, 0 },
+ { 0x385d0000, 0xffff8000, "amadd.b", "r0:5,r10:5,r5:5", 0, 0, 0, 0 },
+ { 0x0, 0x0, "amadd.h", "r,r,r,u0:0", "amadd.h %1,%2,%3", 0, 0, 0 },
+ { 0x385d8000, 0xffff8000, "amadd.h", "r0:5,r10:5,r5:5", 0, 0, 0, 0 },
+ { 0x0, 0x0, "amswap_db.b", "r,r,r,u0:0", "amswap_db.b %1,%2,%3", 0, 0, 0 },
+ { 0x385e0000, 0xffff8000, "amswap_db.b", "r0:5,r10:5,r5:5", 0, 0, 0, 0 },
+ { 0x0, 0x0, "amswap_db.h", "r,r,r,u0:0", "amswap_db.h %1,%2,%3", 0, 0, 0 },
+ { 0x385e8000, 0xffff8000, "amswap_db.h", "r0:5,r10:5,r5:5", 0, 0, 0, 0 },
+ { 0x0, 0x0, "amadd_db.b", "r,r,r,u0:0", "amadd_db.b %1,%2,%3", 0, 0, 0 },
+ { 0x385f0000, 0xffff8000, "amadd_db.b", "r0:5,r10:5,r5:5", 0, 0, 0, 0 },
+ { 0x0, 0x0, "amadd_db.h", "r,r,r,u0:0", "amadd_db.h %1,%2,%3", 0, 0, 0 },
+ { 0x385f8000, 0xffff8000, "amadd_db.h", "r0:5,r10:5,r5:5", 0, 0, 0, 0 },
{ 0x0, 0x0, "amswap.w", "r,r,r,u0:0", "amswap.w %1,%2,%3", 0, 0, 0 },
{ 0x38600000, 0xffff8000, "amswap.w", "r0:5,r10:5,r5:5", 0, 0, 0, 0 },
{ 0x0, 0x0, "amswap.d", "r,r,r,u0:0", "amswap.d %1,%2,%3", 0, 0, 0 },