[committed,01/10] arc: Add new GAS tests for ARCv3.
Commit Message
From: Claudiu Zissulescu <claziss@synopsys.com>
Add new assembler tests for ARCv3 ISA. All the new tests are added in
a distinct folder named arc64.
gas/
xxxx-xx-xx Claudiu Zissulescu <claziss@synopsys.com>
* gas/testsuite/gas/arc64/arc64.exp: New file.
* gas/testsuite/gas/arc64/float01.d: Likewise.
* gas/testsuite/gas/arc64/float01.s: Likewise.
* gas/testsuite/gas/arc64/ldd.d: Likewise.
* gas/testsuite/gas/arc64/ldd.s: Likewise.
* gas/testsuite/gas/arc64/lddl.d: Likewise.
* gas/testsuite/gas/arc64/lddl.s: Likewise.
* gas/testsuite/gas/arc64/load.d: Likewise.
* gas/testsuite/gas/arc64/load.s: Likewise.
* gas/testsuite/gas/arc64/st.d: Likewise.
* gas/testsuite/gas/arc64/st.s: Likewise.
* gas/testsuite/gas/arc64/std.d: Likewise.
* gas/testsuite/gas/arc64/std.s: Likewise.
* gas/testsuite/gas/arc64/stdl.d: Likewise.
* gas/testsuite/gas/arc64/stdl.s: Likewise.
* gas/testsuite/gas/arc64/stl.d: Likewise.
* gas/testsuite/gas/arc64/stl.s: Likewise.
Signed-off-by: Claudiu Zissulescu <claziss@synopsys.com>
---
gas/testsuite/gas/arc64/arc64.exp | 24 +++++++++
gas/testsuite/gas/arc64/float01.d | 65 ++++++++++++++++++++++++
gas/testsuite/gas/arc64/float01.s | 64 ++++++++++++++++++++++++
gas/testsuite/gas/arc64/ldd.d | 46 +++++++++++++++++
gas/testsuite/gas/arc64/ldd.s | 55 +++++++++++++++++++++
gas/testsuite/gas/arc64/lddl.d | 48 ++++++++++++++++++
gas/testsuite/gas/arc64/lddl.s | 54 ++++++++++++++++++++
gas/testsuite/gas/arc64/load.d | 70 ++++++++++++++++++++++++++
gas/testsuite/gas/arc64/load.s | 82 +++++++++++++++++++++++++++++++
gas/testsuite/gas/arc64/st.d | 61 +++++++++++++++++++++++
gas/testsuite/gas/arc64/st.s | 68 +++++++++++++++++++++++++
gas/testsuite/gas/arc64/std.d | 55 +++++++++++++++++++++
gas/testsuite/gas/arc64/std.s | 60 ++++++++++++++++++++++
gas/testsuite/gas/arc64/stdl.d | 35 +++++++++++++
gas/testsuite/gas/arc64/stdl.s | 37 ++++++++++++++
gas/testsuite/gas/arc64/stl.d | 46 +++++++++++++++++
gas/testsuite/gas/arc64/stl.s | 50 +++++++++++++++++++
17 files changed, 920 insertions(+)
create mode 100644 gas/testsuite/gas/arc64/arc64.exp
create mode 100644 gas/testsuite/gas/arc64/float01.d
create mode 100644 gas/testsuite/gas/arc64/float01.s
create mode 100644 gas/testsuite/gas/arc64/ldd.d
create mode 100644 gas/testsuite/gas/arc64/ldd.s
create mode 100644 gas/testsuite/gas/arc64/lddl.d
create mode 100644 gas/testsuite/gas/arc64/lddl.s
create mode 100644 gas/testsuite/gas/arc64/load.d
create mode 100644 gas/testsuite/gas/arc64/load.s
create mode 100644 gas/testsuite/gas/arc64/st.d
create mode 100644 gas/testsuite/gas/arc64/st.s
create mode 100644 gas/testsuite/gas/arc64/std.d
create mode 100644 gas/testsuite/gas/arc64/std.s
create mode 100644 gas/testsuite/gas/arc64/stdl.d
create mode 100644 gas/testsuite/gas/arc64/stdl.s
create mode 100644 gas/testsuite/gas/arc64/stl.d
create mode 100644 gas/testsuite/gas/arc64/stl.s
Comments
Hi,
Looks like the builders are not quite happy about these changes.
Could you please check?
https://builder.sourceware.org/buildbot/#/builders?tags=gdb
Luis
On 9/25/23 09:35, Claudiu Zissulescu via Binutils wrote:
> From: Claudiu Zissulescu <claziss@synopsys.com>
>
> Add new assembler tests for ARCv3 ISA. All the new tests are added in
> a distinct folder named arc64.
>
> gas/
> xxxx-xx-xx Claudiu Zissulescu <claziss@synopsys.com>
>
> * gas/testsuite/gas/arc64/arc64.exp: New file.
> * gas/testsuite/gas/arc64/float01.d: Likewise.
> * gas/testsuite/gas/arc64/float01.s: Likewise.
> * gas/testsuite/gas/arc64/ldd.d: Likewise.
> * gas/testsuite/gas/arc64/ldd.s: Likewise.
> * gas/testsuite/gas/arc64/lddl.d: Likewise.
> * gas/testsuite/gas/arc64/lddl.s: Likewise.
> * gas/testsuite/gas/arc64/load.d: Likewise.
> * gas/testsuite/gas/arc64/load.s: Likewise.
> * gas/testsuite/gas/arc64/st.d: Likewise.
> * gas/testsuite/gas/arc64/st.s: Likewise.
> * gas/testsuite/gas/arc64/std.d: Likewise.
> * gas/testsuite/gas/arc64/std.s: Likewise.
> * gas/testsuite/gas/arc64/stdl.d: Likewise.
> * gas/testsuite/gas/arc64/stdl.s: Likewise.
> * gas/testsuite/gas/arc64/stl.d: Likewise.
> * gas/testsuite/gas/arc64/stl.s: Likewise.
>
> Signed-off-by: Claudiu Zissulescu <claziss@synopsys.com>
> ---
> gas/testsuite/gas/arc64/arc64.exp | 24 +++++++++
> gas/testsuite/gas/arc64/float01.d | 65 ++++++++++++++++++++++++
> gas/testsuite/gas/arc64/float01.s | 64 ++++++++++++++++++++++++
> gas/testsuite/gas/arc64/ldd.d | 46 +++++++++++++++++
> gas/testsuite/gas/arc64/ldd.s | 55 +++++++++++++++++++++
> gas/testsuite/gas/arc64/lddl.d | 48 ++++++++++++++++++
> gas/testsuite/gas/arc64/lddl.s | 54 ++++++++++++++++++++
> gas/testsuite/gas/arc64/load.d | 70 ++++++++++++++++++++++++++
> gas/testsuite/gas/arc64/load.s | 82 +++++++++++++++++++++++++++++++
> gas/testsuite/gas/arc64/st.d | 61 +++++++++++++++++++++++
> gas/testsuite/gas/arc64/st.s | 68 +++++++++++++++++++++++++
> gas/testsuite/gas/arc64/std.d | 55 +++++++++++++++++++++
> gas/testsuite/gas/arc64/std.s | 60 ++++++++++++++++++++++
> gas/testsuite/gas/arc64/stdl.d | 35 +++++++++++++
> gas/testsuite/gas/arc64/stdl.s | 37 ++++++++++++++
> gas/testsuite/gas/arc64/stl.d | 46 +++++++++++++++++
> gas/testsuite/gas/arc64/stl.s | 50 +++++++++++++++++++
> 17 files changed, 920 insertions(+)
> create mode 100644 gas/testsuite/gas/arc64/arc64.exp
> create mode 100644 gas/testsuite/gas/arc64/float01.d
> create mode 100644 gas/testsuite/gas/arc64/float01.s
> create mode 100644 gas/testsuite/gas/arc64/ldd.d
> create mode 100644 gas/testsuite/gas/arc64/ldd.s
> create mode 100644 gas/testsuite/gas/arc64/lddl.d
> create mode 100644 gas/testsuite/gas/arc64/lddl.s
> create mode 100644 gas/testsuite/gas/arc64/load.d
> create mode 100644 gas/testsuite/gas/arc64/load.s
> create mode 100644 gas/testsuite/gas/arc64/st.d
> create mode 100644 gas/testsuite/gas/arc64/st.s
> create mode 100644 gas/testsuite/gas/arc64/std.d
> create mode 100644 gas/testsuite/gas/arc64/std.s
> create mode 100644 gas/testsuite/gas/arc64/stdl.d
> create mode 100644 gas/testsuite/gas/arc64/stdl.s
> create mode 100644 gas/testsuite/gas/arc64/stl.d
> create mode 100644 gas/testsuite/gas/arc64/stl.s
>
> diff --git a/gas/testsuite/gas/arc64/arc64.exp b/gas/testsuite/gas/arc64/arc64.exp
> new file mode 100644
> index 00000000000..d70774a76e3
> --- /dev/null
> +++ b/gas/testsuite/gas/arc64/arc64.exp
> @@ -0,0 +1,24 @@
> +# Copyright (C) 2023 Free Software Foundation, Inc.
> +
> +# This program is free software; you can redistribute it and/or modify
> +# it under the terms of the GNU General Public License as published by
> +# the Free Software Foundation; either version 3 of the License, or
> +# (at your option) any later version.
> +#
> +# This program is distributed in the hope that it will be useful,
> +# but WITHOUT ANY WARRANTY; without even the implied warranty of
> +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> +# GNU General Public License for more details.
> +#
> +# You should have received a copy of the GNU General Public License
> +# along with this program; if not, write to the Free Software
> +# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
> +
> +if { ![istarget arc64-*-*] && ![istarget arc32-*-*] } {
> + return
> +}
> +
> +# ARC base instruction set
> +
> +# ARC library extensions
> +run_dump_tests [lsort [glob -nocomplain $srcdir/$subdir/*.d]]
> diff --git a/gas/testsuite/gas/arc64/float01.d b/gas/testsuite/gas/arc64/float01.d
> new file mode 100644
> index 00000000000..d0bb692c0f3
> --- /dev/null
> +++ b/gas/testsuite/gas/arc64/float01.d
> @@ -0,0 +1,65 @@
> +#as: -mcpu=hs6x
> +#source: float01.s
> +#objdump: -d --prefix-addresses --show-raw-insn
> +
> +.*: +file format elf64-.*arc64
> +
> +
> +Disassembly of section .text:
> +0x[0-9a-f]+ e310 0062\s+vfhadd f1,f2,f3
> +0x[0-9a-f]+ e311 0062\s+vfhsub f1,f2,f3
> +0x[0-9a-f]+ e312 0062\s+vfhmul f1,f2,f3
> +0x[0-9a-f]+ e313 0062\s+vfhdiv f1,f2,f3
> +0x[0-9a-f]+ e314 0062\s+vfhadds f1,f2,f3
> +0x[0-9a-f]+ e315 0062\s+vfhsubs f1,f2,f3
> +0x[0-9a-f]+ e316 0062\s+vfhmuls f1,f2,f3
> +0x[0-9a-f]+ e317 0062\s+vfhdivs f1,f2,f3
> +0x[0-9a-f]+ e518 00e4\s+vfhunpkl f3,f4,f5
> +0x[0-9a-f]+ e519 00e4\s+vfhunpkm f3,f4,f5
> +0x[0-9a-f]+ e51a 00e4\s+vfhpackl f3,f4,f5
> +0x[0-9a-f]+ e51b 00e4\s+vfhpackm f3,f4,f5
> +0x[0-9a-f]+ e51c 00e4\s+vfhbflyl f3,f4,f5
> +0x[0-9a-f]+ e51d 00e4\s+vfhbflym f3,f4,f5
> +0x[0-9a-f]+ e51e 00e4\s+vfhaddsub f3,f4,f5
> +0x[0-9a-f]+ e51f 00e4\s+vfhsubadd f3,f4,f5
> +0x[0-9a-f]+ e010 51a7\s+vfsadd f6,f7,f8
> +0x[0-9a-f]+ e011 51a7\s+vfssub f6,f7,f8
> +0x[0-9a-f]+ e012 51a7\s+vfsmul f6,f7,f8
> +0x[0-9a-f]+ e013 51a7\s+vfsdiv f6,f7,f8
> +0x[0-9a-f]+ e014 51a7\s+vfsadds f6,f7,f8
> +0x[0-9a-f]+ e015 51a7\s+vfssubs f6,f7,f8
> +0x[0-9a-f]+ e016 51a7\s+vfsmuls f6,f7,f8
> +0x[0-9a-f]+ e017 51a7\s+vfsdivs f6,f7,f8
> +0x[0-9a-f]+ e218 51e9\s+vfsunpkl f7,f9,f10
> +0x[0-9a-f]+ e219 51e9\s+vfsunpkm f7,f9,f10
> +0x[0-9a-f]+ e21a 51e9\s+vfspackl f7,f9,f10
> +0x[0-9a-f]+ e21b 51e9\s+vfspackm f7,f9,f10
> +0x[0-9a-f]+ e21c 51e9\s+vfsbflyl f7,f9,f10
> +0x[0-9a-f]+ e21d 51e9\s+vfsbflym f7,f9,f10
> +0x[0-9a-f]+ e21e 51e9\s+vfsaddsub f7,f9,f10
> +0x[0-9a-f]+ e21f 51e9\s+vfssubadd f7,f9,f10
> +0x[0-9a-f]+ e610 b2b8\s+vfdadd f10f11,f24f25,f30f31
> +0x[0-9a-f]+ e611 b2b8\s+vfdsub f10f11,f24f25,f30f31
> +0x[0-9a-f]+ e612 b2b8\s+vfdmul f10f11,f24f25,f30f31
> +0x[0-9a-f]+ e613 b2b8\s+vfddiv f10f11,f24f25,f30f31
> +0x[0-9a-f]+ e614 b2b8\s+vfdadds f10f11,f24f25,f30f31
> +0x[0-9a-f]+ e615 b2b8\s+vfdsubs f10f11,f24f25,f30f31
> +0x[0-9a-f]+ e616 b2b8\s+vfdmuls f10f11,f24f25,f30f31
> +0x[0-9a-f]+ e617 b2b8\s+vfddivs f10f11,f24f25,f30f31
> +0x[0-9a-f]+ e218 a42c\s+vfdunpkl\s+f16f17,f12f13,f18f19
> +0x[0-9a-f]+ e219 a42c\s+vfdunpkm\s+f16f17,f12f13,f18f19
> +0x[0-9a-f]+ e21a a42c\s+vfdpackl\s+f16f17,f12f13,f18f19
> +0x[0-9a-f]+ e21b a42c\s+vfdpackm\s+f16f17,f12f13,f18f19
> +0x[0-9a-f]+ e21c a42c\s+vfdbflyl\s+f16f17,f12f13,f18f19
> +0x[0-9a-f]+ e21d a42c\s+vfdbflym\s+f16f17,f12f13,f18f19
> +0x[0-9a-f]+ e21e a42c\s+vfdaddsub\s+f16f17,f12f13,f18f19
> +0x[0-9a-f]+ e21f a42c\s+vfdsubadd\s+f16f17,f12f13,f18f19
> +0x[0-9a-f]+ e040 07ed\s+fhsqrt f31,f13
> +0x[0-9a-f]+ e040 47ed\s+fssqrt f31,f13
> +0x[0-9a-f]+ e040 87ed\s+fdsqrt f31,f13
> +0x[0-9a-f]+ e041 0461\s+vfhsqrt f17,f1
> +0x[0-9a-f]+ e041 4461\s+vfssqrt f17,f1
> +0x[0-9a-f]+ e041 82bc\s+vfdsqrt f10f11,f28f29
> +0x[0-9a-f]+ e042 02ef\s+vfhexch f11,f15
> +0x[0-9a-f]+ e042 42ef\s+vfsexch f11,f15
> +0x[0-9a-f]+ e042 823a\s+vfdexch f8f9,f26f27
> diff --git a/gas/testsuite/gas/arc64/float01.s b/gas/testsuite/gas/arc64/float01.s
> new file mode 100644
> index 00000000000..833fbb270e6
> --- /dev/null
> +++ b/gas/testsuite/gas/arc64/float01.s
> @@ -0,0 +1,64 @@
> + vfhadd f1,f2,f3
> + vfhsub f1,f2,f3
> + vfhmul f1,f2,f3
> + vfhdiv f1,f2,f3
> + vfhadds f1,f2,f3
> + vfhsubs f1,f2,f3
> + vfhmuls f1,f2,f3
> + vfhdivs f1,f2,f3
> +
> + vfhunpkl f3,f4,f5
> + vfhunpkm f3,f4,f5
> + vfhpackl f3,f4,f5
> + vfhpackm f3,f4,f5
> + vfhbflyl f3,f4,f5
> + vfhbflym f3,f4,f5
> + vfhaddsub f3,f4,f5
> + vfhsubadd f3,f4,f5
> +
> + vfsadd f6,f7,f8
> + vfssub f6,f7,f8
> + vfsmul f6,f7,f8
> + vfsdiv f6,f7,f8
> + vfsadds f6,f7,f8
> + vfssubs f6,f7,f8
> + vfsmuls f6,f7,f8
> + vfsdivs f6,f7,f8
> +
> + vfsunpkl f7,f9,f10
> + vfsunpkm f7,f9,f10
> + vfspackl f7,f9,f10
> + vfspackm f7,f9,f10
> + vfsbflyl f7,f9,f10
> + vfsbflym f7,f9,f10
> + vfsaddsub f7,f9,f10
> + vfssubadd f7,f9,f10
> +
> + vfdadd f10,f24,f30
> + vfdsub f10,f24,f30
> + vfdmul f10,f24,f30
> + vfddiv f10,f24,f30
> + vfdadds f10,f24,f30
> + vfdsubs f10,f24,f30
> + vfdmuls f10,f24,f30
> + vfddivs f10,f24,f30
> +
> + vfdunpkl f16,f12,f18
> + vfdunpkm f16,f12,f18
> + vfdpackl f16,f12,f18
> + vfdpackm f16,f12,f18
> + vfdbflyl f16,f12,f18
> + vfdbflym f16,f12,f18
> + vfdaddsub f16,f12,f18
> + vfdsubadd f16,f12,f18
> +
> + fhsqrt f31,f13
> + fssqrt f31,f13
> + fdsqrt f31,f13
> + vfhsqrt f17,f1
> + vfssqrt f17,f1
> + vfdsqrt f10,f28
> +
> + vfhexch f11,f15
> + vfsexch f11,f15
> + vfdexch f8,f26
> diff --git a/gas/testsuite/gas/arc64/ldd.d b/gas/testsuite/gas/arc64/ldd.d
> new file mode 100644
> index 00000000000..1a73169aa31
> --- /dev/null
> +++ b/gas/testsuite/gas/arc64/ldd.d
> @@ -0,0 +1,46 @@
> +#as: -mcpu=hs5x
> +#source: ldd.s
> +#objdump: -dr --prefix-addresses --show-raw-insn
> +
> +.*: +file format elf32-.*arc64
> +
> +Disassembly of section .text:
> +0x[0-9a-f]+ 1100 0180 ldd r0r1,\[r1\]
> +0x[0-9a-f]+ 1100 0980 ldd.di r0r1,\[r1\]
> +0x[0-9a-f]+ 1100 0380 ldd.aw r0r1,\[r1\]
> +0x[0-9a-f]+ 1100 0b80 ldd.di.aw r0r1,\[r1]
> +0x[0-9a-f]+ 1100 0580 ldd.ab r0r1,\[r1\]
> +0x[0-9a-f]+ 1100 0d80 ldd.di.ab r0r1,\[r1]
> +0x[0-9a-f]+ 1100 0780 ldd.as r0r1,\[r1\]
> +0x[0-9a-f]+ 1100 0f80 ldd.di.as r0r1,\[r1]
> +0x[0-9a-f]+ 13ff 0184 ldd r4r5,\[r3,255\]
> +0x[0-9a-f]+ 1100 8986 ldd.di r6r7,\[r1,-256]
> +0x[0-9a-f]+ 177b 0380 ldd.aw r0r1,\[r7,123]
> +0x[0-9a-f]+ 1185 8b84 ldd.di.aw r4r5,\[r1,-123]
> +0x[0-9a-f]+ 110a 0582 ldd.ab r2r3,\[r1,10\]
> +0x[0-9a-f]+ 11ff 8d80 ldd.di.ab r0r1,\[r1,-1]
> +0x[0-9a-f]+ 11ff 0784 ldd.as r4r5,\[r1,255]
> +0x[0-9a-f]+ 110a 8f84 ldd.di.as r4r5,\[r1,-246]
> +0x[0-9a-f]+ 1600 7780 0000 0000 ldd.as r0r1,\[0\]
> +0x[0-9a-f]+ 1600 7980 0000 0255 ldd.di r0r1,\[0x255\]
> +0x[0-9a-f]+ 1600 7180 ffff ff00 ldd r0r1,\[0xffffff00]
> +0x[0-9a-f]+ 1600 7184 8765 4321 ldd r4r5,\[0x87654321]
> +0x[0-9a-f]+ 2136 0080 ldd r0r1,\[r1,r2\]
> +0x[0-9a-f]+ 2336 8102 ldd.di r2r3,\[r3,r4\]
> +0x[0-9a-f]+ 2576 0184 ldd.aw r4r5,\[r5,r6\]
> +0x[0-9a-f]+ 2676 8106 ldd.di.aw r6r7,\[r6,r4]
> +0x[0-9a-f]+ 24b6 0080 ldd.ab r0r1,\[r4,r2\]
> +0x[0-9a-f]+ 21b6 80c2 ldd.di.ab r2r3,\[r1,r3]
> +0x[0-9a-f]+ 23f6 0144 ldd.as r4r5,\[r3,r5\]
> +0x[0-9a-f]+ 25f6 8046 ldd.di.as r6r7,\[r5,r1]
> +0x[0-9a-f]+ 2536 0f84 0000 0102 ldd r4r5,\[r5,0x102\]
> +0x[0-9a-f]+ 21f6 0f84 0000 0100 ldd.as r4r5,\[r1,0x100]
> +0x[0-9a-f]+ 2376 0f80 1234 5678 ldd.aw r0r1,\[r3,0x12345678]
> +0x[0-9a-f]+ 24b6 8f82 edcb a988 ldd.di.ab r2r3,\[r4,0xedcba988]
> +0x[0-9a-f]+ 2636 7084 0000 0104 ldd r4r5,\[0x104,r2\]
> +0x[0-9a-f]+ 26f6 7044 0000 0100 ldd.as r4r5,\[0x100,r1]
> +0x[0-9a-f]+ 2636 7044 0000 00ff ldd r4r5,\[0xff,r1\]
> +0x[0-9a-f]+ 2636 f140 1234 5678 ldd.di r0r1,\[0x12345678,r5]
> +0x[0-9a-f]+ 26f6 f102 edcb a988 ldd.di.as r2r3,\[0xedcba988,r4]
> +0x[0-9a-f]+ 2136 0f80 0000 0100 ldd r0r1,\[r1,0x100\]
> +0x[0-9a-f]+ 2336 0f82 0000 0104 ldd r2r3,\[r3,0x104\]
> diff --git a/gas/testsuite/gas/arc64/ldd.s b/gas/testsuite/gas/arc64/ldd.s
> new file mode 100644
> index 00000000000..514f49378e3
> --- /dev/null
> +++ b/gas/testsuite/gas/arc64/ldd.s
> @@ -0,0 +1,55 @@
> +; 64-bit double loads
> +
> +; ldd a, [b]
> +ldd r0, [r1]
> +ldd.di r0, [r1]
> +ldd.aw r0, [r1]
> +ldd.aw.di r0, [r1]
> +ldd.ab r0, [r1]
> +ldd.ab.di r0, [r1]
> +ldd.as r0, [r1]
> +ldd.as.di r0, [r1]
> +
> +; ldd a, [b, s9]
> +ldd r4, [r3, 255]
> +ldd.di r6, [r1, -256]
> +ldd.aw r0, [r7, 123]
> +ldd.aw.di r4, [r1, -123]
> +ldd.ab r2, [r1, 10]
> +ldd.ab.di r0, [r1, -1]
> +ldd.as r4, [r1, 255]
> +ldd.as.di r4, [r1, -246]
> +
> +; ldd a, [limm] -> no writeback (.aw, .ab) can be used
> +ldd.as r0, [0x0]
> +ldd.di r0, [0x255]
> +ldd r0, [-256]
> +ldd r4, [0x87654321]
> +
> +; ldd a, [b, c]
> +ldd r0, [r1, r2]
> +ldd.di r2, [r3, r4]
> +ldd.aw r4, [r5, r6]
> +ldd.aw.di r6, [r6, r4]
> +ldd.ab r0, [r4, r2]
> +ldd.ab.di r2, [r1, r3]
> +ldd.as r4, [r3, r5]
> +ldd.as.di r6, [r5, r1]
> +
> +; ldd a, [b, limm]
> +ldd r4, [r5, 258]
> +ldd.as r4, [r1, 256]
> +ldd.aw r0, [r3, 0x12345678]
> +ldd.ab.di r2, [r4, -0x12345678]
> +
> +; ldd a, [limm, c] -> no writeback (.aw, .ab) can be used
> +ldd r4, [260, r2]
> +ldd.as r4, [256, r1]
> +ldd r4, [255, r1]
> +ldd.di r0, [ 0x12345678, r5]
> +ldd.as.di r2, [-0x12345678, r4]
> +
> +; ldd a, [b, s9]
> +; use adress-scaling to fit numbers into 4-byte instructions
> +ldd r0, [r1, 256]
> +ldd r2, [r3, 260]
> diff --git a/gas/testsuite/gas/arc64/lddl.d b/gas/testsuite/gas/arc64/lddl.d
> new file mode 100644
> index 00000000000..03a6dca3fc3
> --- /dev/null
> +++ b/gas/testsuite/gas/arc64/lddl.d
> @@ -0,0 +1,48 @@
> +#as: -mcpu=hs6x
> +#source: lddl.s
> +#objdump: -dr --prefix-addresses --show-raw-insn
> +
> +.*: +file format elf64-.*arc64
> +
> +Disassembly of section .text:
> +0x[0-9a-f]+ 21f2 0080 lddl r0r1,\[r1,r2\]
> +0x[0-9a-f]+ 22f2 0f06 0000 0100 lddl r6r7,\[r2,256@s32\]
> +0x[0-9a-f]+ 22f2 0f02 ffff feff lddl r2r3,\[r2,-257@s32\]
> +0x[0-9a-f]+ 26f2 7144 8000 0000 lddl r4r5,\[0x80000000,r5\]
> +0x[0-9a-f]+ 24f2 7144 ffff ff9c lddl r4r5,\[-100@s32,r5\]
> +0x[0-9a-f]+ 1000 0682 lddl r2r3,\[r0\]
> +0x[0-9a-f]+ 17ff 0686 lddl r6r7,\[r7,255\]
> +0x[0-9a-f]+ 1700 8686 lddl r6r7,\[r7,-256\]
> +0x[0-9a-f]+ 1400 7680 1337 1338 lddl r0r1,\[322376504@s32\]
> +0x[0-9a-f]+ 1600 7682 8000 0000 lddl r2r3,\[0x80000000\]
> +0x[0-9a-f]+ 1400 7682 8000 0000 lddl r2r3,\[-2147483648@s32\]
> +0x[0-9a-f]+ 21f3 0080 lddl.aw r0r1,\[r1,r2\]
> +0x[0-9a-f]+ 22f3 0f06 0000 0100 lddl.aw r6r7,\[r2,256@s32\]
> +0x[0-9a-f]+ 22f3 0f02 ffff feff lddl.aw r2r3,\[r2,-257@s32\]
> +0x[0-9a-f]+ 1000 06c2 lddl.aw r2r3,\[r0\]
> +0x[0-9a-f]+ 17ff 06c6 lddl.aw r6r7,\[r7,255\]
> +0x[0-9a-f]+ 1700 86c6 lddl.aw r6r7,\[r7,-256\]
> +0x[0-9a-f]+ 21f3 0080 lddl.aw r0r1,\[r1,r2\]
> +0x[0-9a-f]+ 22f3 0f06 0000 0100 lddl.aw r6r7,\[r2,256@s32\]
> +0x[0-9a-f]+ 22f3 0f02 ffff feff lddl.aw r2r3,\[r2,-257@s32\]
> +0x[0-9a-f]+ 1000 06c2 lddl.aw r2r3,\[r0\]
> +0x[0-9a-f]+ 17ff 06c6 lddl.aw r6r7,\[r7,255\]
> +0x[0-9a-f]+ 1700 86c6 lddl.aw r6r7,\[r7,-256\]
> +0x[0-9a-f]+ 21f3 8080 lddl.ab r0r1,\[r1,r2\]
> +0x[0-9a-f]+ 22f3 8f06 0000 0100 lddl.ab r6r7,\[r2,256@s32\]
> +0x[0-9a-f]+ 22f3 8f02 ffff feff lddl.ab r2r3,\[r2,-257@s32\]
> +0x[0-9a-f]+ 1000 0ec2 lddl.ab r2r3,\[r0\]
> +0x[0-9a-f]+ 17ff 0ec6 lddl.ab r6r7,\[r7,255\]
> +0x[0-9a-f]+ 1700 8ec6 lddl.ab r6r7,\[r7,-256\]
> +0x[0-9a-f]+ 21f2 8080 lddl.as r0r1,\[r1,r2\]
> +0x[0-9a-f]+ 22f2 8f06 0000 0100 lddl.as r6r7,\[r2,256@s32\]
> +0x[0-9a-f]+ 22f2 8f02 ffff feff lddl.as r2r3,\[r2,-257@s32\]
> +0x[0-9a-f]+ 26f2 f144 8000 0000 lddl.as r4r5,\[0x80000000,r5\]
> +0x[0-9a-f]+ 24f2 f144 ffff ff9c lddl.as r4r5,\[-100@s32,r5\]
> +0x[0-9a-f]+ 1000 0e82 lddl.as r2r3,\[r0\]
> +0x[0-9a-f]+ 17ff 0e86 lddl.as r6r7,\[r7,255\]
> +0x[0-9a-f]+ 1700 8e86 lddl.as r6r7,\[r7,-256\]
> +0x[0-9a-f]+ 24f2 f144 ffff ff00 lddl.as r4r5,\[-256@s32,r5\]
> +0x[0-9a-f]+ 1400 7e80 1337 1338 lddl.as r0r1,\[322376504@s32]
> +0x[0-9a-f]+ 1600 7e82 8000 0000 lddl.as r2r3,\[0x80000000]
> +0x[0-9a-f]+ 1400 7e82 8000 0000 lddl.as r2r3,\[-2147483648@s32]
> diff --git a/gas/testsuite/gas/arc64/lddl.s b/gas/testsuite/gas/arc64/lddl.s
> new file mode 100644
> index 00000000000..77d6c58b6d1
> --- /dev/null
> +++ b/gas/testsuite/gas/arc64/lddl.s
> @@ -0,0 +1,54 @@
> +; 128-bit double loads
> +
> + lddl r0, [r1,r2] ; lddl a, [b, c]
> + lddl r6, [r2,256] ; lddl a, [b, limm] (limm > s9)
> + lddl r2, [r2,-257] ; lddl a, [b, ximm]
> + lddl r4, [0x80000000,r5] ; lddl a, [limm, c]
> + lddl r4, [-100,r5] ; lddl a, [ximm, c]
> +
> + lddl r2, [r0] ; lddl a, [b, s9=0]
> + lddl r6, [r7,255] ; lddl a, [b, s9] biggest s9
> + lddl r6, [r7,-256] ; lddl a, [b, s9] smallest s9
> + lddl r0, [0x13371338] ; lddl a, [limm,s9=0]
> + lddl r2, [0x80000000] ; lddl a, [limm,s9=0]
> + lddl r2, [-2147483648] ; lddl a, [ximm,s9=0]
> +
> + ; Now, repetition of instructions above with suffices (*.a/aw/ab/as)
> +
> + lddl.a r0, [r1,r2]
> + lddl.a r6, [r2,256]
> + lddl.a r2, [r2,-257]
> +
> + lddl.a r2, [r0]
> + lddl.a r6, [r7,255]
> + lddl.a r6, [r7,-256]
> +
> + lddl.aw r0, [r1,r2]
> + lddl.aw r6, [r2,256]
> + lddl.aw r2, [r2,-257]
> +
> + lddl.aw r2, [r0]
> + lddl.aw r6, [r7,255]
> + lddl.aw r6, [r7,-256]
> +
> + lddl.ab r0, [r1,r2]
> + lddl.ab r6, [r2,256]
> + lddl.ab r2, [r2,-257]
> +
> + lddl.ab r2, [r0]
> + lddl.ab r6, [r7,255]
> + lddl.ab r6, [r7,-256]
> +
> + lddl.as r0, [r1,r2]
> + lddl.as r6, [r2,256]
> + lddl.as r2, [r2,-257]
> + lddl.as r4, [0x80000000,r5]
> + lddl.as r4, [-100,r5]
> +
> + lddl.as r2, [r0]
> + lddl.as r6, [r7,255]
> + lddl.as r6, [r7,-256]
> + lddl.as r4, [-256,r5]
> + lddl.as r0, [0x13371338]
> + lddl.as r2, [0x80000000]
> + lddl.as r2, [-2147483648]
> diff --git a/gas/testsuite/gas/arc64/load.d b/gas/testsuite/gas/arc64/load.d
> new file mode 100644
> index 00000000000..a387f923c8a
> --- /dev/null
> +++ b/gas/testsuite/gas/arc64/load.d
> @@ -0,0 +1,70 @@
> +#as: -mcpu=hs6x
> +#source: load.s
> +#objdump: -d --prefix-addresses --show-raw-insn
> +
> +.*: +file format elf64-.*arc64
> +
> +
> +Disassembly of section .text:
> +0x[0-9a-f]+ 2031 8f01 ffff f020 ldl r1,\[r0,-4064@s32\]
> +0x[0-9a-f]+ 2030 0f01 ffff f020 ld r1,\[r0,-4064@s32\]
> +0x[0-9a-f]+ 2032 0f01 ffff f020 ldb r1,\[r0,-4064@s32\]
> +0x[0-9a-f]+ 20f2 0f02 ffff f020 lddl r2r3,\[r0,-4064@s32\]
> +0x[0-9a-f]+ 2034 0f01 ffff f020 ldh r1,\[r0,-4064@s32\]
> +0x[0-9a-f]+ 2431 f001 ffff f020 ldl r1,\[-4064@s32,r0\]
> +0x[0-9a-f]+ 2430 7001 ffff f020 ld r1,\[-4064@s32,r0\]
> +0x[0-9a-f]+ 2432 7001 ffff f020 ldb r1,\[-4064@s32,r0\]
> +0x[0-9a-f]+ 24f2 7002 ffff f020 lddl r2r3,\[-4064@s32,r0\]
> +0x[0-9a-f]+ 2434 7001 ffff f020 ldh r1,\[-4064@s32,r0\]
> +0x[0-9a-f]+ 2631 f001 ffff f020 ldl r1,\[0xfffff020,r0\]
> +0x[0-9a-f]+ 2630 7001 ffff f020 ld r1,\[0xfffff020,r0\]
> +0x[0-9a-f]+ 2632 7001 ffff f020 ldb r1,\[0xfffff020,r0\]
> +0x[0-9a-f]+ 26f2 7002 ffff f020 lddl r2r3,\[0xfffff020,r0\]
> +0x[0-9a-f]+ 2634 7001 ffff f020 ldh r1,\[0xfffff020,r0\]
> +0x[0-9a-f]+ 2031 8f81 ffff f020 ldl r1,\[r0,0xfffff020\]
> +0x[0-9a-f]+ 2030 0f81 ffff f020 ld r1,\[r0,0xfffff020\]
> +0x[0-9a-f]+ 2032 0f81 ffff f020 ldb r1,\[r0,0xfffff020\]
> +0x[0-9a-f]+ 20f2 0f82 ffff f020 lddl r2r3,\[r0,0xfffff020\]
> +0x[0-9a-f]+ 2034 0f81 ffff f020 ldh r1,\[r0,0xfffff020\]
> +0x[0-9a-f]+ 2071 8f01 ffff f020 ldl.aw r1,\[r0,-4064@s32\]
> +0x[0-9a-f]+ 2070 0f01 ffff f020 ld.aw r1,\[r0,-4064@s32\]
> +0x[0-9a-f]+ 2072 0f01 ffff f020 ldb.aw r1,\[r0,-4064@s32\]
> +0x[0-9a-f]+ 20f3 0f02 ffff f020 lddl.aw r2r3,\[r0,-4064@s32\]
> +0x[0-9a-f]+ 2074 0f01 ffff f020 ldh.aw r1,\[r0,-4064@s32\]
> +0x[0-9a-f]+ 2471 f001 ffff f020 ldl.aw r1,\[-4064@s32,r0\]
> +0x[0-9a-f]+ 2470 7001 ffff f020 ld.aw r1,\[-4064@s32,r0\]
> +0x[0-9a-f]+ 2472 7001 ffff f020 ldb.aw r1,\[-4064@s32,r0\]
> +0x[0-9a-f]+ 2474 7001 ffff f020 ldh.aw r1,\[-4064@s32,r0\]
> +0x[0-9a-f]+ 2671 f001 ffff f020 ldl.aw r1,\[0xfffff020,r0\]
> +0x[0-9a-f]+ 2670 7001 ffff f020 ld.aw r1,\[0xfffff020,r0\]
> +0x[0-9a-f]+ 2672 7001 ffff f020 ldb.aw r1,\[0xfffff020,r0\]
> +0x[0-9a-f]+ 2674 7001 ffff f020 ldh.aw r1,\[0xfffff020,r0\]
> +0x[0-9a-f]+ 2071 8f81 ffff f020 ldl.aw r1,\[r0,0xfffff020\]
> +0x[0-9a-f]+ 2070 0f81 ffff f020 ld.aw r1,\[r0,0xfffff020\]
> +0x[0-9a-f]+ 2072 0f81 ffff f020 ldb.aw r1,\[r0,0xfffff020\]
> +0x[0-9a-f]+ 20f3 0f82 ffff f020 lddl.aw r2r3,\[r0,0xfffff020\]
> +0x[0-9a-f]+ 2074 0f81 ffff f020 ldh.aw r1,\[r0,0xfffff020\]
> +0x[0-9a-f]+ 2030 8f01 ffff f020 ld.di r1,\[r0,-4064@s32\]
> +0x[0-9a-f]+ 2032 8f01 ffff f020 ldb.di r1,\[r0,-4064@s32\]
> +0x[0-9a-f]+ 2034 8f01 ffff f020 ldh.di r1,\[r0,-4064@s32\]
> +0x[0-9a-f]+ 2430 f001 ffff f020 ld.di r1,\[-4064@s32,r0\]
> +0x[0-9a-f]+ 2432 f001 ffff f020 ldb.di r1,\[-4064@s32,r0\]
> +0x[0-9a-f]+ 2434 f001 ffff f020 ldh.di r1,\[-4064@s32,r0\]
> +0x[0-9a-f]+ 2630 f001 ffff f020 ld.di r1,\[0xfffff020,r0\]
> +0x[0-9a-f]+ 2632 f001 ffff f020 ldb.di r1,\[0xfffff020,r0\]
> +0x[0-9a-f]+ 2634 f001 ffff f020 ldh.di r1,\[0xfffff020,r0\]
> +0x[0-9a-f]+ 2030 8f81 ffff f020 ld.di r1,\[r0,0xfffff020\]
> +0x[0-9a-f]+ 2032 8f81 ffff f020 ldb.di r1,\[r0,0xfffff020\]
> +0x[0-9a-f]+ 2034 8f81 ffff f020 ldh.di r1,\[r0,0xfffff020\]
> +0x[0-9a-f]+ 2031 0f01 ffff f020 ld.x r1,\[r0,-4064@s32\]
> +0x[0-9a-f]+ 2033 0f01 ffff f020 ldb.x r1,\[r0,-4064@s32\]
> +0x[0-9a-f]+ 2035 0f01 ffff f020 ldh.x r1,\[r0,-4064@s32\]
> +0x[0-9a-f]+ 2431 7001 ffff f020 ld.x r1,\[-4064@s32,r0\]
> +0x[0-9a-f]+ 2433 7001 ffff f020 ldb.x r1,\[-4064@s32,r0\]
> +0x[0-9a-f]+ 2435 7001 ffff f020 ldh.x r1,\[-4064@s32,r0\]
> +0x[0-9a-f]+ 2631 7001 ffff f020 ld.x r1,\[0xfffff020,r0\]
> +0x[0-9a-f]+ 2633 7001 ffff f020 ldb.x r1,\[0xfffff020,r0\]
> +0x[0-9a-f]+ 2635 7001 ffff f020 ldh.x r1,\[0xfffff020,r0\]
> +0x[0-9a-f]+ 2031 0f81 ffff f020 ld.x r1,\[r0,0xfffff020\]
> +0x[0-9a-f]+ 2033 0f81 ffff f020 ldb.x r1,\[r0,0xfffff020\]
> +0x[0-9a-f]+ 2035 0f81 ffff f020 ldh.x r1,\[r0,0xfffff020\]
> diff --git a/gas/testsuite/gas/arc64/load.s b/gas/testsuite/gas/arc64/load.s
> new file mode 100644
> index 00000000000..f142f8a6f41
> --- /dev/null
> +++ b/gas/testsuite/gas/arc64/load.s
> @@ -0,0 +1,82 @@
> + ldl r1,[r0,-4064]
> + ld r1,[r0,-4064]
> + ldb r1,[r0,-4064]
> + lddl r2,[r0,-4064]
> + ldh r1,[r0,-4064]
> +
> + ldl r1,[-4064,r0]
> + ld r1,[-4064,r0]
> + ldb r1,[-4064,r0]
> + lddl r2,[-4064,r0]
> + ldh r1,[-4064,r0]
> +
> + ldl r1,[0xfffff020,r0]
> + ld r1,[0xfffff020,r0]
> + ldb r1,[0xfffff020,r0]
> + lddl r2,[0xfffff020,r0]
> + ldh r1,[0xfffff020,r0]
> +
> + ldl r1,[r0,0xfffff020]
> + ld r1,[r0,0xfffff020]
> + ldb r1,[r0,0xfffff020]
> + lddl r2,[r0,0xfffff020]
> + ldh r1,[r0,0xfffff020]
> +
> +
> + ldl.aw r1,[r0,-4064]
> + ld.aw r1,[r0,-4064]
> + ldb.aw r1,[r0,-4064]
> + lddl.aw r2,[r0,-4064]
> + ldh.aw r1,[r0,-4064]
> +
> + ldl.aw r1,[-4064,r0]
> + ld.aw r1,[-4064,r0]
> + ldb.aw r1,[-4064,r0]
> + ;; lddl.aw r2,[-4064,r0]
> + ldh.aw r1,[-4064,r0]
> +
> + ldl.aw r1,[0xfffff020,r0]
> + ld.aw r1,[0xfffff020,r0]
> + ldb.aw r1,[0xfffff020,r0]
> + ;; lddl.aw r2,[0xfffff020,r0]
> + ldh.aw r1,[0xfffff020,r0]
> +
> + ldl.aw r1,[r0,0xfffff020]
> + ld.aw r1,[r0,0xfffff020]
> + ldb.aw r1,[r0,0xfffff020]
> + lddl.aw r2,[r0,0xfffff020]
> + ldh.aw r1,[r0,0xfffff020]
> +
> +
> + ld.di r1,[r0,-4064]
> + ldb.di r1,[r0,-4064]
> + ldh.di r1,[r0,-4064]
> +
> + ld.di r1,[-4064,r0]
> + ldb.di r1,[-4064,r0]
> + ldh.di r1,[-4064,r0]
> +
> + ld.di r1,[0xfffff020,r0]
> + ldb.di r1,[0xfffff020,r0]
> + ldh.di r1,[0xfffff020,r0]
> +
> + ld.di r1,[r0,0xfffff020]
> + ldb.di r1,[r0,0xfffff020]
> + ldh.di r1,[r0,0xfffff020]
> +
> +
> + ld.x r1,[r0,-4064]
> + ldb.x r1,[r0,-4064]
> + ldh.x r1,[r0,-4064]
> +
> + ld.x r1,[-4064,r0]
> + ldb.x r1,[-4064,r0]
> + ldh.x r1,[-4064,r0]
> +
> + ld.x r1,[0xfffff020,r0]
> + ldb.x r1,[0xfffff020,r0]
> + ldh.x r1,[0xfffff020,r0]
> +
> + ld.x r1,[r0,0xfffff020]
> + ldb.x r1,[r0,0xfffff020]
> + ldh.x r1,[r0,0xfffff020]
> diff --git a/gas/testsuite/gas/arc64/st.d b/gas/testsuite/gas/arc64/st.d
> new file mode 100644
> index 00000000000..66cbbb76b92
> --- /dev/null
> +++ b/gas/testsuite/gas/arc64/st.d
> @@ -0,0 +1,61 @@
> +#source: st.s
> +#objdump: -dr --prefix-addresses --show-raw-insn
> +
> +.*: +file format elf.*-.*arc64
> +
> +Disassembly of section .text:
> +0x[0-9a-f]+ 1900 0100 st r4,\[r1,0\]
> +0x[0-9a-f]+ 1e00 7100 0000 1338 st r4,\[0x1338,0\]
> +0x[0-9a-f]+ 1e00 7180 7fff ffff st r6,\[0x7fffffff,0\]
> +0x[0-9a-f]+ 1b00 0f80 0800 0000 st 0x8000000,\[r3,0\]
> +0x[0-9a-f]+ 1e00 7f80 0000 1234 st 0x1234,\[0x1234,0\]
> +0x[0-9a-f]+ 19ff 0000 st r0,\[r1,255\]
> +0x[0-9a-f]+ 1c00 8080 st r2,\[r4,-256\]
> +0x[0-9a-f]+ 1e0c 7180 7fff ffff st r6,\[0x7fffffff,12\]
> +0x[0-9a-f]+ 1e0d 7f80 0000 4321 st 0x4321,\[0x4321,13\]
> +0x[0-9a-f]+ 1e00 7200 ffff fc00 st r8,\[0xfffffc00,0\]
> +0x[0-9a-f]+ 1a14 8f80 0000 0020 st 0x20,\[r2,-236\]
> +0x[0-9a-f]+ 1a0a 8f80 ffff ffdf st 0xffffffdf,\[r2,-246\]
> +0x[0-9a-f]+ 1a00 8f80 1234 5678 st 0x12345678,\[r2,-256\]
> +0x[0-9a-f]+ 19ff 0f80 ffff 5bf0 st 0xffff5bf0,\[r1,255\]
> +0x[0-9a-f]+ 19ff 0008 st.aw r0,\[r1,255\]
> +0x[0-9a-f]+ 1c00 8088 st.aw r2,\[r4,-256\]
> +0x[0-9a-f]+ 1a00 8f88 1234 5678 st.aw 0x12345678,\[r2,-256\]
> +0x[0-9a-f]+ 19ff 0f88 ffff 5bf0 st.aw 0xffff5bf0,\[r1,255\]
> +0x[0-9a-f]+ 19ff 0008 st.aw r0,\[r1,255\]
> +0x[0-9a-f]+ 1c00 8088 st.aw r2,\[r4,-256\]
> +0x[0-9a-f]+ 1a00 8f88 1234 5678 st.aw 0x12345678,\[r2,-256\]
> +0x[0-9a-f]+ 19ff 0f88 ffff 5bf0 st.aw 0xffff5bf0,\[r1,255\]
> +0x[0-9a-f]+ 19ff 0010 st.ab r0,\[r1,255\]
> +0x[0-9a-f]+ 1c00 8090 st.ab r2,\[r4,-256\]
> +0x[0-9a-f]+ 1a00 8f90 1234 5678 st.ab 0x12345678,\[r2,-256\]
> +0x[0-9a-f]+ 19ff 0f90 ffff 5bf0 st.ab 0xffff5bf0,\[r1,255\]
> +0x[0-9a-f]+ 19ff 0018 st.as r0,\[r1,255\]
> +0x[0-9a-f]+ 1c00 8098 st.as r2,\[r4,-256\]
> +0x[0-9a-f]+ 1e00 7100 0000 1338 st r4,\[0x1338,0\]
> +0x[0-9a-f]+ 1e00 7180 7fff ffff st r6,\[0x7fffffff,0\]
> +0x[0-9a-f]+ 1e00 7200 ffff fc00 st r8,\[0xfffffc00,0\]
> +0x[0-9a-f]+ 1a00 8f98 1234 5678 st.as 0x12345678,\[r2,-256\]
> +0x[0-9a-f]+ 19ff 0f98 ffff 5bf0 st.as 0xffff5bf0,\[r1,255\]
> +0x[0-9a-f]+ 1900 07c1 st 31,\[r1,0\]
> +0x[0-9a-f]+ 1900 0801 st -32,\[r1,0\]
> +0x[0-9a-f]+ 19ff 0801 st -32,\[r1,255\]
> +0x[0-9a-f]+ 1c00 8141 st 5,\[r4,-256\]
> +0x[0-9a-f]+ 1e00 7001 0000 1338 st 0,\[0x1338,0\]
> +0x[0-9a-f]+ 1e00 7041 7fff ffff st 1,\[0x7fffffff,0\]
> +0x[0-9a-f]+ 1e00 7fc1 ffff fc00 st -1,\[0xfffffc00,0\]
> +0x[0-9a-f]+ 1900 07e1 st.di 31,\[r1,0\]
> +0x[0-9a-f]+ 19ff 0839 st.di.as -32,\[r1,255\]
> +0x[0-9a-f]+ 1c00 8169 st.di.aw 5,\[r4,-256\]
> +0x[0-9a-f]+ 1b9b 0db1 st.di.ab -10,\[r3,155\]
> +0x[0-9a-f]+ 1c9c 0289 st.aw 10,\[r4,156\]
> +0x[0-9a-f]+ 1e00 7001 0000 1338 st 0,\[0x1338,0\]
> +0x[0-9a-f]+ 1e00 7061 7fff ffff st.di 1,\[0x7fffffff,0\]
> +0x[0-9a-f]+ 1c00 0fa4 0000 0004\s+sth.di\s+0x4,\[r4,0\]
> +0x[0-9a-f]+ 1d09 0fbc 0000 0005\s+sth.di.as\s+0x5,\[r5,9\]
> +0x[0-9a-f]+ 1e00 0001\s+st\s+0,\[r6,0\]
> +0x[0-9a-f]+ 1900 0043\s+stb\s+1,\[r1,0\]
> +0x[0-9a-f]+ 1e02 0009\s+st.aw\s+0,\[r6,2\]
> +0x[0-9a-f]+ 1901 0053\s+stb.ab\s+1,\[r1,1\]
> +0x[0-9a-f]+ 1e00 7105 0000 0000\s+sth\s+4,\[0,0\]
> +\s+[0-9a-f]+: R_ARC_32_ME\s+symb
> diff --git a/gas/testsuite/gas/arc64/st.s b/gas/testsuite/gas/arc64/st.s
> new file mode 100644
> index 00000000000..2089de3ff03
> --- /dev/null
> +++ b/gas/testsuite/gas/arc64/st.s
> @@ -0,0 +1,68 @@
> +; common stores
> +
> + st r4, [r1] ; st c, [b]
> + st r4, [0x1338] ; st c, [limm] limm: small
> + st r6, [0x7fffffff] ; st c, [limm] limm: big
> + st 0x8000000, [r3] ; st limm, [b] limm: big
> + st 0x1234, [0x1234] ; st limm, [limm] limm: equal
> +
> + st r0, [r1,255] ; st c, [b, s9] s9: biggest
> + st r2, [r4,-256] ; st c, [b, s9] s9: smallest
> + st r6, [0x7fffffff,12] ; st c, [limm,s9] limm: positive
> + st 0x4321, [0x4321,13] ; st limm, [limm,s9] limm: equal
> + st r8, [-1024] ; st c, [limm] limm: negative
> + st 32, [r2, -236] ; st limm, [b, s9] limm: smallest positive
> + st -33, [r2, -246] ; st limm, [b, s9] limm: biggest negative
> + st 0x12345678, [r2, -256] ; st limm, [b, s9] limm: positive
> + st -42000, [r1, 255] ; st limm, [b, s9] limm: negative
> +
> + ; Now, repetition of instructions above with suffices (*.a/aw/ab/as)
> +
> + st.a r0, [r1,255]
> + st.a r2, [r4,-256]
> + st.a 0x12345678, [r2, -256]
> + st.a -42000, [r1, 255]
> +
> + st.aw r0, [r1,255]
> + st.aw r2, [r4,-256]
> + st.aw 0x12345678, [r2, -256]
> + st.aw -42000, [r1, 255]
> +
> + st.ab r0, [r1,255]
> + st.ab r2, [r4,-256]
> + st.ab 0x12345678, [r2, -256]
> + st.ab -42000, [r1, 255]
> +
> + st.as r0, [r1,255]
> + st.as r2, [r4,-256]
> + st r4, [0x1338]
> + st r6, [0x7fffffff]
> + st r8, [-1024]
> + st.as 0x12345678, [r2, -256]
> + st.as -42000, [r1, 255]
> +
> + ; st w6, ...
> + st 31, [r1] ; st w6, [b, s9=0] w6: biggest
> + st -32, [r1] ; st w6, [b, s9=0] w6: smallest
> + st -32, [r1,255] ; st w6, [b, s9] s9: biggest
> + st 5, [r4,-256] ; st w6, [b, s9] s9: smallest
> + st 0, [0x1338] ; st w6, [limm] limm: small positive
> + st 1, [0x7fffffff] ; st w6, [limm] limm: positive
> + st -1, [-1024] ; st w6, [limm] limm: negative
> +
> + st.di 31, [r1] ; st w6, [b, s9=0] w6: biggest
> + st.as.di -32, [r1,255] ; st w6, [b, s9] s9: biggest
> + st.aw.di 5, [r4,-256] ; st w6, [b, s9] s9: smallest
> + st.ab.di -10, [r3,155] ; st w6, [b, s9]
> + st.aw 10, [r4,156] ; st w6, [b, s9]
> + st 0, [0x1338] ; st w6, [limm] limm: small positive
> + st.di 1, [0x7fffffff] ; st w6, [limm] limm: positive
> +
> + ;; sth w6 ...
> + sth.di 4,[r4]
> + sth.di.as 5,[r5,9]
> + st 0,[r6]
> + stb 1,[r1,0]
> + st.aw 0,[r6,2]
> + stb.ab 1,[r1,1]
> + sth 4,[@symb]
> diff --git a/gas/testsuite/gas/arc64/std.d b/gas/testsuite/gas/arc64/std.d
> new file mode 100644
> index 00000000000..9958b59f01c
> --- /dev/null
> +++ b/gas/testsuite/gas/arc64/std.d
> @@ -0,0 +1,55 @@
> +#as: -mcpu=hs5x
> +#source: std.s
> +#objdump: -dr --prefix-addresses --show-raw-insn
> +
> +.*: +file format elf32-.*arc64
> +
> +Disassembly of section .text:
> +0x[0-9a-f]+ 1900 0106 std r4r5,\[r1\]
> +0x[0-9a-f]+ 1e00 7106 0000 1338 std r4r5,\[0x1338\]
> +0x[0-9a-f]+ 1e00 7186 7fff ffff std r6r7,\[0x7fffffff\]
> +0x[0-9a-f]+ 1b00 0f86 0800 0000 std 0x8000000,\[r3\]
> +0x[0-9a-f]+ 1e00 7f86 0000 1234 std 0x1234,\[0x1234\]
> +0x[0-9a-f]+ 19ff 0006 std r0r1,\[r1,255\]
> +0x[0-9a-f]+ 1c00 8086 std r2r3,\[r4,-256\]
> +0x[0-9a-f]+ 1e0c 7186 7fff ffff std r6r7,\[0x7fffffff,12\]
> +0x[0-9a-f]+ 1e0d 7f86 0000 4321 std 0x4321,\[0x4321,13\]
> +0x[0-9a-f]+ 1e00 7206 ffff fc00 std r8r9,\[0xfffffc00\]
> +0x[0-9a-f]+ 1a14 8f86 0000 0020 std 0x20,\[r2,-236\]
> +0x[0-9a-f]+ 1a0a 8f86 ffff ffdf std 0xffffffdf,\[r2,-246\]
> +0x[0-9a-f]+ 1a00 8f86 1234 5678 std 0x12345678,\[r2,-256\]
> +0x[0-9a-f]+ 19ff 0f86 ffff 5bf0 std 0xffff5bf0,\[r1,255\]
> +0x[0-9a-f]+ 19ff 000e std.aw r0r1,\[r1,255\]
> +0x[0-9a-f]+ 1c00 808e std.aw r2r3,\[r4,-256\]
> +0x[0-9a-f]+ 1a00 8f8e 1234 5678 std.aw 0x12345678,\[r2,-256\]
> +0x[0-9a-f]+ 19ff 0f8e ffff 5bf0 std.aw 0xffff5bf0,\[r1,255\]
> +0x[0-9a-f]+ 19ff 000e std.aw r0r1,\[r1,255\]
> +0x[0-9a-f]+ 1c00 808e std.aw r2r3,\[r4,-256\]
> +0x[0-9a-f]+ 1a00 8f8e 1234 5678 std.aw 0x12345678,\[r2,-256\]
> +0x[0-9a-f]+ 19ff 0f8e ffff 5bf0 std.aw 0xffff5bf0,\[r1,255\]
> +0x[0-9a-f]+ 19ff 0016 std.ab r0r1,\[r1,255\]
> +0x[0-9a-f]+ 1c00 8096 std.ab r2r3,\[r4,-256\]
> +0x[0-9a-f]+ 1a00 8f96 1234 5678 std.ab 0x12345678,\[r2,-256\]
> +0x[0-9a-f]+ 19ff 0f96 ffff 5bf0 std.ab 0xffff5bf0,\[r1,255\]
> +0x[0-9a-f]+ 19ff 001e std.as r0r1,\[r1,255\]
> +0x[0-9a-f]+ 1c00 809e std.as r2r3,\[r4,-256\]
> +0x[0-9a-f]+ 1e00 711e 0000 1338 std.as r4r5,\[0x1338\]
> +0x[0-9a-f]+ 1e00 719e 7fff ffff std.as r6r7,\[0x7fffffff]
> +0x[0-9a-f]+ 1e00 721e ffff fc00 std.as r8r9,\[0xfffffc00]
> +0x[0-9a-f]+ 1a00 8f9e 1234 5678 std.as 0x12345678,\[r2,-256\]
> +0x[0-9a-f]+ 19ff 0f9e ffff 5bf0 std.as 0xffff5bf0,\[r1,255\]
> +0x[0-9a-f]+ 1e0f 7fbe 0000 4321 std.di.as 0x4321,\[0x4321,15\]
> +0x[0-9a-f]+ 1900 07c7 std 31,\[r1\]
> +0x[0-9a-f]+ 1900 0807 std -32,\[r1\]
> +0x[0-9a-f]+ 19ff 0807 std -32,\[r1,255\]
> +0x[0-9a-f]+ 1c00 8147 std 5,\[r4,-256\]
> +0x[0-9a-f]+ 1e00 7007 0000 1338 std 0,\[0x1338\]
> +0x[0-9a-f]+ 1e00 7047 7fff ffff std 1,\[0x7fffffff\]
> +0x[0-9a-f]+ 1e00 7fc7 ffff fc00 std -1,\[0xfffffc00\]
> +0x[0-9a-f]+ 1900 07e7 std.di 31,\[r1\]
> +0x[0-9a-f]+ 19ff 083f std.di.as -32,\[r1,255\]
> +0x[0-9a-f]+ 1c00 816f std.di.aw 5,\[r4,-256\]
> +0x[0-9a-f]+ 1b9b 0db7 std.di.ab -10,\[r3,155\]
> +0x[0-9a-f]+ 1c9c 028f std.aw 10,\[r4,156\]
> +0x[0-9a-f]+ 1e00 7007 0000 1338 std 0,\[0x1338\]
> +0x[0-9a-f]+ 1e00 7067 7fff ffff std.di 1,\[0x7fffffff\]
> diff --git a/gas/testsuite/gas/arc64/std.s b/gas/testsuite/gas/arc64/std.s
> new file mode 100644
> index 00000000000..75c5a7cb4f3
> --- /dev/null
> +++ b/gas/testsuite/gas/arc64/std.s
> @@ -0,0 +1,60 @@
> +; 64-bit double stores
> +
> + std r4, [r1] ; std c, [b]
> + std r4, [0x1338] ; std c, [limm] limm: small
> + std r6, [0x7fffffff] ; std c, [limm] limm: big
> + std 0x8000000, [r3] ; std limm, [b] limm: big
> + std 0x1234, [0x1234] ; std limm, [limm] limm: equal
> +
> + std r0, [r1,255] ; std c, [b, s9] s9: biggest
> + std r2, [r4,-256] ; std c, [b, s9] s9: smallest
> + std r6, [0x7fffffff,12] ; std c, [limm,s9] limm: positive
> + std 0x4321, [0x4321,13] ; std limm, [limm,s9] limm: equal
> + std r8, [-1024] ; std c, [limm] limm: negative
> + std 32, [r2, -236] ; std limm, [b, s9] limm: smallest positive
> + std -33, [r2, -246] ; std limm, [b, s9] limm: biggest negative
> + std 0x12345678, [r2, -256] ; std limm, [b, s9] limm: positive
> + std -42000, [r1, 255] ; std limm, [b, s9] limm: negative
> +
> + ; Now, repetition of instructions above with suffices (*.a/aw/ab/as)
> +
> + std.a r0, [r1,255]
> + std.a r2, [r4,-256]
> + std.a 0x12345678, [r2, -256]
> + std.a -42000, [r1, 255]
> +
> + std.aw r0, [r1,255]
> + std.aw r2, [r4,-256]
> + std.aw 0x12345678, [r2, -256]
> + std.aw -42000, [r1, 255]
> +
> + std.ab r0, [r1,255]
> + std.ab r2, [r4,-256]
> + std.ab 0x12345678, [r2, -256]
> + std.ab -42000, [r1, 255]
> +
> + std.as r0, [r1,255]
> + std.as r2, [r4,-256]
> + std.as r4, [0x1338]
> + std.as r6, [0x7fffffff]
> + std.as r8, [-1024]
> + std.as 0x12345678, [r2, -256]
> + std.as -42000, [r1, 255]
> + std.as.di 0x4321, [0x4321, 15]
> +
> + ; std w6, ...
> + std 31, [r1] ; std w6, [b, s9=0] w6: biggest
> + std -32, [r1] ; std w6, [b, s9=0] w6: smallest
> + std -32, [r1,255] ; std w6, [b, s9] s9: biggest
> + std 5, [r4,-256] ; std w6, [b, s9] s9: smallest
> + std 0, [0x1338] ; std w6, [limm] limm: small positive
> + std 1, [0x7fffffff] ; std w6, [limm] limm: positive
> + std -1, [-1024] ; std w6, [limm] limm: negative
> +
> + std.di 31, [r1] ; std w6, [b, s9=0] w6: biggest
> + std.as.di -32, [r1,255] ; std w6, [b, s9] s9: biggest
> + std.aw.di 5, [r4,-256] ; std w6, [b, s9] s9: smallest
> + std.ab.di -10, [r3,155] ; std w6, [b, s9]
> + std.aw 10, [r4,156] ; std w6, [b, s9]
> + std 0, [0x1338] ; std w6, [limm] limm: small positive
> + std.di 1, [0x7fffffff] ; std w6, [limm] limm: positive
> diff --git a/gas/testsuite/gas/arc64/stdl.d b/gas/testsuite/gas/arc64/stdl.d
> new file mode 100644
> index 00000000000..0917802e68a
> --- /dev/null
> +++ b/gas/testsuite/gas/arc64/stdl.d
> @@ -0,0 +1,35 @@
> +#as: -mcpu=hs6x
> +#source: stdl.s
> +#objdump: -dr --prefix-addresses --show-raw-insn
> +
> +.*: +file format elf64-.*arc64
> +
> +Disassembly of section .text:
> +0x[0-9a-f]+ 1900 0126 stdl r4r5,\[r1,0\]
> +0x[0-9a-f]+ 1c00 70a6 0000 1338 stdl r2r3,\[4920@s32\]
> +0x[0-9a-f]+ 1c00 71a6 7fff ffff stdl r6r7,\[2147483647@s32\]
> +0x[0-9a-f]+ 1e00 70a6 8000 0000 stdl r2r3,\[0x80000000\]
> +0x[0-9a-f]+ 1c00 7026 ffff fb2e stdl r0r1,\[-1234@s32\]
> +0x[0-9a-f]+ 1b00 0fa6 8000 0000 stdl 0x80000000,\[r3,0\]
> +0x[0-9a-f]+ 1b00 0f26 7fff ffff stdl 2147483647@s32,\[r3,0\]
> +0x[0-9a-f]+ 19ff 0026 stdl r0r1,\[r1,255\]
> +0x[0-9a-f]+ 1c00 80a6 stdl r2r3,\[r4,-256\]
> +0x[0-9a-f]+ 19ff 0f26 ffff 5bf0 stdl -42000@s32,\[r1,255\]
> +0x[0-9a-f]+ 1a00 8fa6 8234 5678 stdl 0x82345678,\[r2,-256\]
> +0x[0-9a-f]+ 19ff 002e stdl.aw r0r1,\[r1,255\]
> +0x[0-9a-f]+ 1c00 812e stdl.aw r4r5,\[r4,-256\]
> +0x[0-9a-f]+ 1a00 8fae 8234 5678 stdl.aw 0x82345678,\[r2,-256\]
> +0x[0-9a-f]+ 19ff 0f2e ffff 5bf0 stdl.aw -42000@s32,\[r1,255\]
> +0x[0-9a-f]+ 19ff 002e stdl.aw r0r1,\[r1,255\]
> +0x[0-9a-f]+ 1c00 80ae stdl.aw r2r3,\[r4,-256\]
> +0x[0-9a-f]+ 1a00 8fae 8234 5678 stdl.aw 0x82345678,\[r2,-256\]
> +0x[0-9a-f]+ 19ff 0f2e ffff 5bf0 stdl.aw -42000@s32,\[r1,255\]
> +0x[0-9a-f]+ 19ff 0036 stdl.ab r0r1,\[r1,255\]
> +0x[0-9a-f]+ 1c00 81b6 stdl.ab r6r7,\[r4,-256\]
> +0x[0-9a-f]+ 1a00 8fb6 8234 5678 stdl.ab 0x82345678,\[r2,-256\]
> +0x[0-9a-f]+ 19ff 0f36 ffff 5bf0 stdl.ab -42000@s32,\[r1,255\]
> +0x[0-9a-f]+ 19ff 003e stdl.as r0r1,\[r1,255\]
> +0x[0-9a-f]+ 1c00 813e stdl.as r4r5,\[r4,-256\]
> +0x[0-9a-f]+ 1a00 8fbe 8234 5678 stdl.as 0x82345678,\[r2,-256\]
> +0x[0-9a-f]+ 19ff 0f3e ffff 5bf0 stdl.as -42000@s32,\[r1,255\]
> +0x[0-9a-f]+ 1a00 8fbe 8234 5678 stdl.as 0x82345678,\[r2,-256\]
> diff --git a/gas/testsuite/gas/arc64/stdl.s b/gas/testsuite/gas/arc64/stdl.s
> new file mode 100644
> index 00000000000..bafdeea363a
> --- /dev/null
> +++ b/gas/testsuite/gas/arc64/stdl.s
> @@ -0,0 +1,37 @@
> +; 128-bit double stores
> +
> + stdl r4, [r1] ; stdl c, [b]
> + stdl r2, [0x1338] ; stdl c, [ximm] ximm: default
> + stdl r6, [0x7fffffff] ; stdl c, [ximm] ximm: big
> + stdl r2, [0x80000000] ; stdl c, [limm] limm: positive
> + stdl r0, [-1234] ; stdl c, [ximm] ximm: negative
> + stdl 0x80000000, [r3] ; stdl limm, [b] limm: smallest
> + stdl 0x7fffffff, [r3] ; stdl ximm, [b] ximm: biggest
> +
> + stdl r0, [r1, 255] ; stdl c, [b, s9] s9: biggest
> + stdl r2, [r4,-256] ; stdl c, [b, s9] s9: smallest
> + stdl -42000, [r1, 255] ; stdl ximm, [b, s9] ximm: negative
> + stdl 0x82345678, [r2, -256] ; stdl limm, [b, s9] limm: positive
> +
> + ; Now, repetition of instructions above with suffices (*.a/aw/ab/as)
> +
> + stdl.a r0, [r1,255]
> + stdl.a r4, [r4,-256]
> + stdl.a 0x82345678, [r2, -256]
> + stdl.a -42000, [r1, 255]
> +
> + stdl.aw r0, [r1,255]
> + stdl.aw r2, [r4,-256]
> + stdl.aw 0x82345678, [r2, -256]
> + stdl.aw -42000, [r1, 255]
> +
> + stdl.ab r0, [r1,255]
> + stdl.ab r6, [r4,-256]
> + stdl.ab 0x82345678, [r2, -256]
> + stdl.ab -42000, [r1, 255]
> +
> + stdl.as r0, [r1,255]
> + stdl.as r4, [r4,-256]
> + stdl.as 0x82345678, [r2, -256]
> + stdl.as -42000, [r1, 255]
> + stdl.as 0x82345678, [r2, -256]
> diff --git a/gas/testsuite/gas/arc64/stl.d b/gas/testsuite/gas/arc64/stl.d
> new file mode 100644
> index 00000000000..f2925c6a516
> --- /dev/null
> +++ b/gas/testsuite/gas/arc64/stl.d
> @@ -0,0 +1,46 @@
> +#as: -mcpu=hs6x
> +#source: stl.s
> +#objdump: -dr --prefix-addresses --show-raw-insn
> +
> +.*: +file format elf64-.*arc64
> +
> +Disassembly of section .text:
> +0x[0-9a-f]+ 1900 0107 stl r4,\[r1,0\]
> +0x[0-9a-f]+ 1c00 70c7 0000 1338 stl r3,\[4920@s32\]
> +0x[0-9a-f]+ 1c00 7147 7fff ffff stl r5,\[2147483647@s32\]
> +0x[0-9a-f]+ 1e00 7087 8000 0000 stl r2,\[0x80000000\]
> +0x[0-9a-f]+ 1c00 71c7 ffff fb2e stl r7,\[-1234@s32\]
> +0x[0-9a-f]+ 1b00 0f87 8000 0000 stl 0x80000000,\[r3,0\]
> +0x[0-9a-f]+ 1b00 0f07 7fff ffff stl 2147483647@s32,\[r3,0\]
> +0x[0-9a-f]+ 19ff 0047 stl r1,\[r1,255\]
> +0x[0-9a-f]+ 1c00 8087 stl r2,\[r4,-256\]
> +0x[0-9a-f]+ 19ff 0f07 ffff 5bf0 stl -42000@s32,\[r1,255\]
> +0x[0-9a-f]+ 1a00 8f87 8234 5678 stl 0x82345678,\[r2,-256\]
> +0x[0-9a-f]+ 19ff 000f stl.aw r0,\[r1,255\]
> +0x[0-9a-f]+ 1c00 804f stl.aw r1,\[r4,-256\]
> +0x[0-9a-f]+ 1a00 8f8f 8234 5678 stl.aw 0x82345678,\[r2,-256\]
> +0x[0-9a-f]+ 19ff 0f0f ffff 5bf0 stl.aw -42000@s32,\[r1,255\]
> +0x[0-9a-f]+ 19ff 000f stl.aw r0,\[r1,255\]
> +0x[0-9a-f]+ 1c00 808f stl.aw r2,\[r4,-256\]
> +0x[0-9a-f]+ 1a00 8f8f 8234 5678 stl.aw 0x82345678,\[r2,-256\]
> +0x[0-9a-f]+ 19ff 0f0f ffff 5bf0 stl.aw -42000@s32,\[r1,255\]
> +0x[0-9a-f]+ 19ff 0017 stl.ab r0,\[r1,255\]
> +0x[0-9a-f]+ 1c00 80d7 stl.ab r3,\[r4,-256\]
> +0x[0-9a-f]+ 1a00 8f97 8234 5678 stl.ab 0x82345678,\[r2,-256\]
> +0x[0-9a-f]+ 19ff 0f17 ffff 5bf0 stl.ab -42000@s32,\[r1,255\]
> +0x[0-9a-f]+ 19ff 001f stl.as r0,\[r1,255\]
> +0x[0-9a-f]+ 1c00 805f stl.as r1,\[r4,-256\]
> +0x[0-9a-f]+ 1a00 8f9f 8234 5678 stl.as 0x82345678,\[r2,-256\]
> +0x[0-9a-f]+ 19ff 0f1f ffff 5bf0 stl.as -42000@s32,\[r1,255\]
> +0x[0-9a-f]+ 1a00 8f9f 8234 5678\s+stl.as\s+0x82345678,\[r2,-256\]
> +0x[0-9a-f]+ 1900 07e7 stl 31,\[r1,0\]
> +0x[0-9a-f]+ 1900 0827 stl -32,\[r1,0\]
> +0x[0-9a-f]+ 19ff 0827 stl -32,\[r1,255\]
> +0x[0-9a-f]+ 1c00 8167 stl 5,\[r4,-256\]
> +0x[0-9a-f]+ 19ff 083f stl.as -32,\[r1,255\]
> +0x[0-9a-f]+ 1c00 816f stl.aw 5,\[r4,-256\]
> +0x[0-9a-f]+ 1b9b 0db7 stl.ab -10,\[r3,155\]
> +0x[0-9a-f]+ 1c9c 02af stl.aw 10,\[r4,156\]
> +0x[0-9a-f]+ 1c00 7027 0000 1338 stl 0,\[4920@s32\]
> +0x[0-9a-f]+ 1e00 7067 8fff ffff stl 1,\[0x8fffffff\]
> +0x[0-9a-f]+ 1c00 7fe7 ffff fc00 stl -1,\[-1024@s32\]
> diff --git a/gas/testsuite/gas/arc64/stl.s b/gas/testsuite/gas/arc64/stl.s
> new file mode 100644
> index 00000000000..d4b5e95684a
> --- /dev/null
> +++ b/gas/testsuite/gas/arc64/stl.s
> @@ -0,0 +1,50 @@
> +; 64-bit stores
> +
> + stl r4, [r1] ; stl c, [b]
> + stl r3, [0x1338] ; stl c, [ximm] ximm: default
> + stl r5, [0x7fffffff] ; stl c, [ximm] ximm: big
> + stl r2, [0x80000000] ; stl c, [limm] limm: positive
> + stl r7, [-1234] ; stl c, [ximm] ximm: negative
> + stl 0x80000000, [r3] ; stl limm, [b] limm: smallest
> + stl 0x7fffffff, [r3] ; stl ximm, [b] ximm: biggest
> +
> + stl r1, [r1, 255] ; stl c, [b, s9] s9: biggest
> + stl r2, [r4,-256] ; stl c, [b, s9] s9: smallest
> + stl -42000, [r1, 255] ; stl ximm, [b, s9] ximm: negative
> + stl 0x82345678, [r2, -256] ; stl limm, [b, s9] limm: positive
> +
> + ; Now, repetition of instructions above with suffices (*.a/aw/ab/as)
> +
> + stl.a r0, [r1,255]
> + stl.a r1, [r4,-256]
> + stl.a 0x82345678, [r2, -256]
> + stl.a -42000, [r1, 255]
> +
> + stl.aw r0, [r1,255]
> + stl.aw r2, [r4,-256]
> + stl.aw 0x82345678, [r2, -256]
> + stl.aw -42000, [r1, 255]
> +
> + stl.ab r0, [r1,255]
> + stl.ab r3, [r4,-256]
> + stl.ab 0x82345678, [r2, -256]
> + stl.ab -42000, [r1, 255]
> +
> + stl.as r0, [r1,255]
> + stl.as r1, [r4,-256]
> + stl.as 0x82345678, [r2, -256]
> + stl.as -42000, [r1, 255]
> + stl.as 0x82345678, [r2, -256]
> +
> + ; stl w6, ...
> + stl 31, [r1] ; stl w6, [b, s9=0] w6: biggest
> + stl -32, [r1] ; stl w6, [b, s9=0] w6: smallest
> + stl -32, [r1,255] ; stl w6, [b, s9] s9: biggest
> + stl 5, [r4,-256] ; stl w6, [b, s9] s9: smallest
> + stl.as -32, [r1,255] ; stl w6, [b, s9] s9: biggest
> + stl.aw 5, [r4,-256] ; stl w6, [b, s9] s9: smallest
> + stl.ab -10, [r3,155] ; stl w6, [b, s9]
> + stl.aw 10, [r4,156] ; stl w6, [b, s9]
> + stl 0, [0x1338] ; stl w6, [ximm] ximm: small positive
> + stl 1, [0x8fffffff] ; stl w6, [limm] limm: positive
> + stl -1, [-1024] ; stl w6, [ximm] ximm: negative
Hi Claudiu,
I think that you forgot to test a few configurations. Building
with --enable-targets=all --enable-64-bit-bfd results in:
CCLD as-new
/bin/ld: ../bfd/.libs/libbfd.a(elf32-arc.o):include/opcode/arc-attrs.h:37: multiple definition of `bfd32_feature_list';
../bfd/.libs/libbfd.a(elf32-arc64.o):include/opcode/arc-attrs.h:37: first defined here
/bin/ld: ../bfd/.libs/libbfd.a(elf32-arc.o):include/opcode/arc-attrs.h:61: multiple definition of `bfd32_conflict_list';
../bfd/.libs/libbfd.a(elf32-arc64.o):include/opcode/arc-attrs.h:61: first defined here
/bin/ld: ../bfd/.libs/libbfd.a(elf32-arc.o):bfd/elf32-target.h:979: multiple definition of `arc_elf32_be_vec';
../bfd/.libs/libbfd.a(elf32-arc64.o):bfd/elf32-target.h:979: first defined here
/bin/ld: ../bfd/.libs/libbfd.a(elf32-arc.o):bfd/elfnn-arc.c:3009: multiple definition of `arc_elf32_size_info';
../bfd/.libs/libbfd.a(elf32-arc64.o):bfd/elfnn-arc.c:3009: first defined here
Could you take a look and fix this please ?
Cheers
Nick
Apologies for this. I have pushed a patch for this:
https://sourceware.org/git/?p=binutils-gdb.git;a=commit;h=5e5116071b09e187ee3c6b7e86e86114f6a65ef3
//Claudiu
On Mon, Sep 25, 2023 at 12:27 PM Nick Clifton <nickc@redhat.com> wrote:
>
> Hi Claudiu,
>
> I think that you forgot to test a few configurations. Building
> with --enable-targets=all --enable-64-bit-bfd results in:
>
> CCLD as-new
> /bin/ld: ../bfd/.libs/libbfd.a(elf32-arc.o):include/opcode/arc-attrs.h:37: multiple definition of `bfd32_feature_list';
> ../bfd/.libs/libbfd.a(elf32-arc64.o):include/opcode/arc-attrs.h:37: first defined here
> /bin/ld: ../bfd/.libs/libbfd.a(elf32-arc.o):include/opcode/arc-attrs.h:61: multiple definition of `bfd32_conflict_list';
> ../bfd/.libs/libbfd.a(elf32-arc64.o):include/opcode/arc-attrs.h:61: first defined here
> /bin/ld: ../bfd/.libs/libbfd.a(elf32-arc.o):bfd/elf32-target.h:979: multiple definition of `arc_elf32_be_vec';
> ../bfd/.libs/libbfd.a(elf32-arc64.o):bfd/elf32-target.h:979: first defined here
> /bin/ld: ../bfd/.libs/libbfd.a(elf32-arc.o):bfd/elfnn-arc.c:3009: multiple definition of `arc_elf32_size_info';
> ../bfd/.libs/libbfd.a(elf32-arc64.o):bfd/elfnn-arc.c:3009: first defined here
>
> Could you take a look and fix this please ?
>
> Cheers
> Nick
>
>
Hi all,
I have reverted the patch series as it brokes the runners.
Please apologises,
Claudiu
On Mon, Sep 25, 2023 at 12:27 PM Nick Clifton <nickc@redhat.com> wrote:
>
> Hi Claudiu,
>
> I think that you forgot to test a few configurations. Building
> with --enable-targets=all --enable-64-bit-bfd results in:
>
> CCLD as-new
> /bin/ld: ../bfd/.libs/libbfd.a(elf32-arc.o):include/opcode/arc-attrs.h:37: multiple definition of `bfd32_feature_list';
> ../bfd/.libs/libbfd.a(elf32-arc64.o):include/opcode/arc-attrs.h:37: first defined here
> /bin/ld: ../bfd/.libs/libbfd.a(elf32-arc.o):include/opcode/arc-attrs.h:61: multiple definition of `bfd32_conflict_list';
> ../bfd/.libs/libbfd.a(elf32-arc64.o):include/opcode/arc-attrs.h:61: first defined here
> /bin/ld: ../bfd/.libs/libbfd.a(elf32-arc.o):bfd/elf32-target.h:979: multiple definition of `arc_elf32_be_vec';
> ../bfd/.libs/libbfd.a(elf32-arc64.o):bfd/elf32-target.h:979: first defined here
> /bin/ld: ../bfd/.libs/libbfd.a(elf32-arc.o):bfd/elfnn-arc.c:3009: multiple definition of `arc_elf32_size_info';
> ../bfd/.libs/libbfd.a(elf32-arc64.o):bfd/elfnn-arc.c:3009: first defined here
>
> Could you take a look and fix this please ?
>
> Cheers
> Nick
>
>
new file mode 100644
@@ -0,0 +1,24 @@
+# Copyright (C) 2023 Free Software Foundation, Inc.
+
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
+
+if { ![istarget arc64-*-*] && ![istarget arc32-*-*] } {
+ return
+}
+
+# ARC base instruction set
+
+# ARC library extensions
+run_dump_tests [lsort [glob -nocomplain $srcdir/$subdir/*.d]]
new file mode 100644
@@ -0,0 +1,65 @@
+#as: -mcpu=hs6x
+#source: float01.s
+#objdump: -d --prefix-addresses --show-raw-insn
+
+.*: +file format elf64-.*arc64
+
+
+Disassembly of section .text:
+0x[0-9a-f]+ e310 0062\s+vfhadd f1,f2,f3
+0x[0-9a-f]+ e311 0062\s+vfhsub f1,f2,f3
+0x[0-9a-f]+ e312 0062\s+vfhmul f1,f2,f3
+0x[0-9a-f]+ e313 0062\s+vfhdiv f1,f2,f3
+0x[0-9a-f]+ e314 0062\s+vfhadds f1,f2,f3
+0x[0-9a-f]+ e315 0062\s+vfhsubs f1,f2,f3
+0x[0-9a-f]+ e316 0062\s+vfhmuls f1,f2,f3
+0x[0-9a-f]+ e317 0062\s+vfhdivs f1,f2,f3
+0x[0-9a-f]+ e518 00e4\s+vfhunpkl f3,f4,f5
+0x[0-9a-f]+ e519 00e4\s+vfhunpkm f3,f4,f5
+0x[0-9a-f]+ e51a 00e4\s+vfhpackl f3,f4,f5
+0x[0-9a-f]+ e51b 00e4\s+vfhpackm f3,f4,f5
+0x[0-9a-f]+ e51c 00e4\s+vfhbflyl f3,f4,f5
+0x[0-9a-f]+ e51d 00e4\s+vfhbflym f3,f4,f5
+0x[0-9a-f]+ e51e 00e4\s+vfhaddsub f3,f4,f5
+0x[0-9a-f]+ e51f 00e4\s+vfhsubadd f3,f4,f5
+0x[0-9a-f]+ e010 51a7\s+vfsadd f6,f7,f8
+0x[0-9a-f]+ e011 51a7\s+vfssub f6,f7,f8
+0x[0-9a-f]+ e012 51a7\s+vfsmul f6,f7,f8
+0x[0-9a-f]+ e013 51a7\s+vfsdiv f6,f7,f8
+0x[0-9a-f]+ e014 51a7\s+vfsadds f6,f7,f8
+0x[0-9a-f]+ e015 51a7\s+vfssubs f6,f7,f8
+0x[0-9a-f]+ e016 51a7\s+vfsmuls f6,f7,f8
+0x[0-9a-f]+ e017 51a7\s+vfsdivs f6,f7,f8
+0x[0-9a-f]+ e218 51e9\s+vfsunpkl f7,f9,f10
+0x[0-9a-f]+ e219 51e9\s+vfsunpkm f7,f9,f10
+0x[0-9a-f]+ e21a 51e9\s+vfspackl f7,f9,f10
+0x[0-9a-f]+ e21b 51e9\s+vfspackm f7,f9,f10
+0x[0-9a-f]+ e21c 51e9\s+vfsbflyl f7,f9,f10
+0x[0-9a-f]+ e21d 51e9\s+vfsbflym f7,f9,f10
+0x[0-9a-f]+ e21e 51e9\s+vfsaddsub f7,f9,f10
+0x[0-9a-f]+ e21f 51e9\s+vfssubadd f7,f9,f10
+0x[0-9a-f]+ e610 b2b8\s+vfdadd f10f11,f24f25,f30f31
+0x[0-9a-f]+ e611 b2b8\s+vfdsub f10f11,f24f25,f30f31
+0x[0-9a-f]+ e612 b2b8\s+vfdmul f10f11,f24f25,f30f31
+0x[0-9a-f]+ e613 b2b8\s+vfddiv f10f11,f24f25,f30f31
+0x[0-9a-f]+ e614 b2b8\s+vfdadds f10f11,f24f25,f30f31
+0x[0-9a-f]+ e615 b2b8\s+vfdsubs f10f11,f24f25,f30f31
+0x[0-9a-f]+ e616 b2b8\s+vfdmuls f10f11,f24f25,f30f31
+0x[0-9a-f]+ e617 b2b8\s+vfddivs f10f11,f24f25,f30f31
+0x[0-9a-f]+ e218 a42c\s+vfdunpkl\s+f16f17,f12f13,f18f19
+0x[0-9a-f]+ e219 a42c\s+vfdunpkm\s+f16f17,f12f13,f18f19
+0x[0-9a-f]+ e21a a42c\s+vfdpackl\s+f16f17,f12f13,f18f19
+0x[0-9a-f]+ e21b a42c\s+vfdpackm\s+f16f17,f12f13,f18f19
+0x[0-9a-f]+ e21c a42c\s+vfdbflyl\s+f16f17,f12f13,f18f19
+0x[0-9a-f]+ e21d a42c\s+vfdbflym\s+f16f17,f12f13,f18f19
+0x[0-9a-f]+ e21e a42c\s+vfdaddsub\s+f16f17,f12f13,f18f19
+0x[0-9a-f]+ e21f a42c\s+vfdsubadd\s+f16f17,f12f13,f18f19
+0x[0-9a-f]+ e040 07ed\s+fhsqrt f31,f13
+0x[0-9a-f]+ e040 47ed\s+fssqrt f31,f13
+0x[0-9a-f]+ e040 87ed\s+fdsqrt f31,f13
+0x[0-9a-f]+ e041 0461\s+vfhsqrt f17,f1
+0x[0-9a-f]+ e041 4461\s+vfssqrt f17,f1
+0x[0-9a-f]+ e041 82bc\s+vfdsqrt f10f11,f28f29
+0x[0-9a-f]+ e042 02ef\s+vfhexch f11,f15
+0x[0-9a-f]+ e042 42ef\s+vfsexch f11,f15
+0x[0-9a-f]+ e042 823a\s+vfdexch f8f9,f26f27
new file mode 100644
@@ -0,0 +1,64 @@
+ vfhadd f1,f2,f3
+ vfhsub f1,f2,f3
+ vfhmul f1,f2,f3
+ vfhdiv f1,f2,f3
+ vfhadds f1,f2,f3
+ vfhsubs f1,f2,f3
+ vfhmuls f1,f2,f3
+ vfhdivs f1,f2,f3
+
+ vfhunpkl f3,f4,f5
+ vfhunpkm f3,f4,f5
+ vfhpackl f3,f4,f5
+ vfhpackm f3,f4,f5
+ vfhbflyl f3,f4,f5
+ vfhbflym f3,f4,f5
+ vfhaddsub f3,f4,f5
+ vfhsubadd f3,f4,f5
+
+ vfsadd f6,f7,f8
+ vfssub f6,f7,f8
+ vfsmul f6,f7,f8
+ vfsdiv f6,f7,f8
+ vfsadds f6,f7,f8
+ vfssubs f6,f7,f8
+ vfsmuls f6,f7,f8
+ vfsdivs f6,f7,f8
+
+ vfsunpkl f7,f9,f10
+ vfsunpkm f7,f9,f10
+ vfspackl f7,f9,f10
+ vfspackm f7,f9,f10
+ vfsbflyl f7,f9,f10
+ vfsbflym f7,f9,f10
+ vfsaddsub f7,f9,f10
+ vfssubadd f7,f9,f10
+
+ vfdadd f10,f24,f30
+ vfdsub f10,f24,f30
+ vfdmul f10,f24,f30
+ vfddiv f10,f24,f30
+ vfdadds f10,f24,f30
+ vfdsubs f10,f24,f30
+ vfdmuls f10,f24,f30
+ vfddivs f10,f24,f30
+
+ vfdunpkl f16,f12,f18
+ vfdunpkm f16,f12,f18
+ vfdpackl f16,f12,f18
+ vfdpackm f16,f12,f18
+ vfdbflyl f16,f12,f18
+ vfdbflym f16,f12,f18
+ vfdaddsub f16,f12,f18
+ vfdsubadd f16,f12,f18
+
+ fhsqrt f31,f13
+ fssqrt f31,f13
+ fdsqrt f31,f13
+ vfhsqrt f17,f1
+ vfssqrt f17,f1
+ vfdsqrt f10,f28
+
+ vfhexch f11,f15
+ vfsexch f11,f15
+ vfdexch f8,f26
new file mode 100644
@@ -0,0 +1,46 @@
+#as: -mcpu=hs5x
+#source: ldd.s
+#objdump: -dr --prefix-addresses --show-raw-insn
+
+.*: +file format elf32-.*arc64
+
+Disassembly of section .text:
+0x[0-9a-f]+ 1100 0180 ldd r0r1,\[r1\]
+0x[0-9a-f]+ 1100 0980 ldd.di r0r1,\[r1\]
+0x[0-9a-f]+ 1100 0380 ldd.aw r0r1,\[r1\]
+0x[0-9a-f]+ 1100 0b80 ldd.di.aw r0r1,\[r1]
+0x[0-9a-f]+ 1100 0580 ldd.ab r0r1,\[r1\]
+0x[0-9a-f]+ 1100 0d80 ldd.di.ab r0r1,\[r1]
+0x[0-9a-f]+ 1100 0780 ldd.as r0r1,\[r1\]
+0x[0-9a-f]+ 1100 0f80 ldd.di.as r0r1,\[r1]
+0x[0-9a-f]+ 13ff 0184 ldd r4r5,\[r3,255\]
+0x[0-9a-f]+ 1100 8986 ldd.di r6r7,\[r1,-256]
+0x[0-9a-f]+ 177b 0380 ldd.aw r0r1,\[r7,123]
+0x[0-9a-f]+ 1185 8b84 ldd.di.aw r4r5,\[r1,-123]
+0x[0-9a-f]+ 110a 0582 ldd.ab r2r3,\[r1,10\]
+0x[0-9a-f]+ 11ff 8d80 ldd.di.ab r0r1,\[r1,-1]
+0x[0-9a-f]+ 11ff 0784 ldd.as r4r5,\[r1,255]
+0x[0-9a-f]+ 110a 8f84 ldd.di.as r4r5,\[r1,-246]
+0x[0-9a-f]+ 1600 7780 0000 0000 ldd.as r0r1,\[0\]
+0x[0-9a-f]+ 1600 7980 0000 0255 ldd.di r0r1,\[0x255\]
+0x[0-9a-f]+ 1600 7180 ffff ff00 ldd r0r1,\[0xffffff00]
+0x[0-9a-f]+ 1600 7184 8765 4321 ldd r4r5,\[0x87654321]
+0x[0-9a-f]+ 2136 0080 ldd r0r1,\[r1,r2\]
+0x[0-9a-f]+ 2336 8102 ldd.di r2r3,\[r3,r4\]
+0x[0-9a-f]+ 2576 0184 ldd.aw r4r5,\[r5,r6\]
+0x[0-9a-f]+ 2676 8106 ldd.di.aw r6r7,\[r6,r4]
+0x[0-9a-f]+ 24b6 0080 ldd.ab r0r1,\[r4,r2\]
+0x[0-9a-f]+ 21b6 80c2 ldd.di.ab r2r3,\[r1,r3]
+0x[0-9a-f]+ 23f6 0144 ldd.as r4r5,\[r3,r5\]
+0x[0-9a-f]+ 25f6 8046 ldd.di.as r6r7,\[r5,r1]
+0x[0-9a-f]+ 2536 0f84 0000 0102 ldd r4r5,\[r5,0x102\]
+0x[0-9a-f]+ 21f6 0f84 0000 0100 ldd.as r4r5,\[r1,0x100]
+0x[0-9a-f]+ 2376 0f80 1234 5678 ldd.aw r0r1,\[r3,0x12345678]
+0x[0-9a-f]+ 24b6 8f82 edcb a988 ldd.di.ab r2r3,\[r4,0xedcba988]
+0x[0-9a-f]+ 2636 7084 0000 0104 ldd r4r5,\[0x104,r2\]
+0x[0-9a-f]+ 26f6 7044 0000 0100 ldd.as r4r5,\[0x100,r1]
+0x[0-9a-f]+ 2636 7044 0000 00ff ldd r4r5,\[0xff,r1\]
+0x[0-9a-f]+ 2636 f140 1234 5678 ldd.di r0r1,\[0x12345678,r5]
+0x[0-9a-f]+ 26f6 f102 edcb a988 ldd.di.as r2r3,\[0xedcba988,r4]
+0x[0-9a-f]+ 2136 0f80 0000 0100 ldd r0r1,\[r1,0x100\]
+0x[0-9a-f]+ 2336 0f82 0000 0104 ldd r2r3,\[r3,0x104\]
new file mode 100644
@@ -0,0 +1,55 @@
+; 64-bit double loads
+
+; ldd a, [b]
+ldd r0, [r1]
+ldd.di r0, [r1]
+ldd.aw r0, [r1]
+ldd.aw.di r0, [r1]
+ldd.ab r0, [r1]
+ldd.ab.di r0, [r1]
+ldd.as r0, [r1]
+ldd.as.di r0, [r1]
+
+; ldd a, [b, s9]
+ldd r4, [r3, 255]
+ldd.di r6, [r1, -256]
+ldd.aw r0, [r7, 123]
+ldd.aw.di r4, [r1, -123]
+ldd.ab r2, [r1, 10]
+ldd.ab.di r0, [r1, -1]
+ldd.as r4, [r1, 255]
+ldd.as.di r4, [r1, -246]
+
+; ldd a, [limm] -> no writeback (.aw, .ab) can be used
+ldd.as r0, [0x0]
+ldd.di r0, [0x255]
+ldd r0, [-256]
+ldd r4, [0x87654321]
+
+; ldd a, [b, c]
+ldd r0, [r1, r2]
+ldd.di r2, [r3, r4]
+ldd.aw r4, [r5, r6]
+ldd.aw.di r6, [r6, r4]
+ldd.ab r0, [r4, r2]
+ldd.ab.di r2, [r1, r3]
+ldd.as r4, [r3, r5]
+ldd.as.di r6, [r5, r1]
+
+; ldd a, [b, limm]
+ldd r4, [r5, 258]
+ldd.as r4, [r1, 256]
+ldd.aw r0, [r3, 0x12345678]
+ldd.ab.di r2, [r4, -0x12345678]
+
+; ldd a, [limm, c] -> no writeback (.aw, .ab) can be used
+ldd r4, [260, r2]
+ldd.as r4, [256, r1]
+ldd r4, [255, r1]
+ldd.di r0, [ 0x12345678, r5]
+ldd.as.di r2, [-0x12345678, r4]
+
+; ldd a, [b, s9]
+; use adress-scaling to fit numbers into 4-byte instructions
+ldd r0, [r1, 256]
+ldd r2, [r3, 260]
new file mode 100644
@@ -0,0 +1,48 @@
+#as: -mcpu=hs6x
+#source: lddl.s
+#objdump: -dr --prefix-addresses --show-raw-insn
+
+.*: +file format elf64-.*arc64
+
+Disassembly of section .text:
+0x[0-9a-f]+ 21f2 0080 lddl r0r1,\[r1,r2\]
+0x[0-9a-f]+ 22f2 0f06 0000 0100 lddl r6r7,\[r2,256@s32\]
+0x[0-9a-f]+ 22f2 0f02 ffff feff lddl r2r3,\[r2,-257@s32\]
+0x[0-9a-f]+ 26f2 7144 8000 0000 lddl r4r5,\[0x80000000,r5\]
+0x[0-9a-f]+ 24f2 7144 ffff ff9c lddl r4r5,\[-100@s32,r5\]
+0x[0-9a-f]+ 1000 0682 lddl r2r3,\[r0\]
+0x[0-9a-f]+ 17ff 0686 lddl r6r7,\[r7,255\]
+0x[0-9a-f]+ 1700 8686 lddl r6r7,\[r7,-256\]
+0x[0-9a-f]+ 1400 7680 1337 1338 lddl r0r1,\[322376504@s32\]
+0x[0-9a-f]+ 1600 7682 8000 0000 lddl r2r3,\[0x80000000\]
+0x[0-9a-f]+ 1400 7682 8000 0000 lddl r2r3,\[-2147483648@s32\]
+0x[0-9a-f]+ 21f3 0080 lddl.aw r0r1,\[r1,r2\]
+0x[0-9a-f]+ 22f3 0f06 0000 0100 lddl.aw r6r7,\[r2,256@s32\]
+0x[0-9a-f]+ 22f3 0f02 ffff feff lddl.aw r2r3,\[r2,-257@s32\]
+0x[0-9a-f]+ 1000 06c2 lddl.aw r2r3,\[r0\]
+0x[0-9a-f]+ 17ff 06c6 lddl.aw r6r7,\[r7,255\]
+0x[0-9a-f]+ 1700 86c6 lddl.aw r6r7,\[r7,-256\]
+0x[0-9a-f]+ 21f3 0080 lddl.aw r0r1,\[r1,r2\]
+0x[0-9a-f]+ 22f3 0f06 0000 0100 lddl.aw r6r7,\[r2,256@s32\]
+0x[0-9a-f]+ 22f3 0f02 ffff feff lddl.aw r2r3,\[r2,-257@s32\]
+0x[0-9a-f]+ 1000 06c2 lddl.aw r2r3,\[r0\]
+0x[0-9a-f]+ 17ff 06c6 lddl.aw r6r7,\[r7,255\]
+0x[0-9a-f]+ 1700 86c6 lddl.aw r6r7,\[r7,-256\]
+0x[0-9a-f]+ 21f3 8080 lddl.ab r0r1,\[r1,r2\]
+0x[0-9a-f]+ 22f3 8f06 0000 0100 lddl.ab r6r7,\[r2,256@s32\]
+0x[0-9a-f]+ 22f3 8f02 ffff feff lddl.ab r2r3,\[r2,-257@s32\]
+0x[0-9a-f]+ 1000 0ec2 lddl.ab r2r3,\[r0\]
+0x[0-9a-f]+ 17ff 0ec6 lddl.ab r6r7,\[r7,255\]
+0x[0-9a-f]+ 1700 8ec6 lddl.ab r6r7,\[r7,-256\]
+0x[0-9a-f]+ 21f2 8080 lddl.as r0r1,\[r1,r2\]
+0x[0-9a-f]+ 22f2 8f06 0000 0100 lddl.as r6r7,\[r2,256@s32\]
+0x[0-9a-f]+ 22f2 8f02 ffff feff lddl.as r2r3,\[r2,-257@s32\]
+0x[0-9a-f]+ 26f2 f144 8000 0000 lddl.as r4r5,\[0x80000000,r5\]
+0x[0-9a-f]+ 24f2 f144 ffff ff9c lddl.as r4r5,\[-100@s32,r5\]
+0x[0-9a-f]+ 1000 0e82 lddl.as r2r3,\[r0\]
+0x[0-9a-f]+ 17ff 0e86 lddl.as r6r7,\[r7,255\]
+0x[0-9a-f]+ 1700 8e86 lddl.as r6r7,\[r7,-256\]
+0x[0-9a-f]+ 24f2 f144 ffff ff00 lddl.as r4r5,\[-256@s32,r5\]
+0x[0-9a-f]+ 1400 7e80 1337 1338 lddl.as r0r1,\[322376504@s32]
+0x[0-9a-f]+ 1600 7e82 8000 0000 lddl.as r2r3,\[0x80000000]
+0x[0-9a-f]+ 1400 7e82 8000 0000 lddl.as r2r3,\[-2147483648@s32]
new file mode 100644
@@ -0,0 +1,54 @@
+; 128-bit double loads
+
+ lddl r0, [r1,r2] ; lddl a, [b, c]
+ lddl r6, [r2,256] ; lddl a, [b, limm] (limm > s9)
+ lddl r2, [r2,-257] ; lddl a, [b, ximm]
+ lddl r4, [0x80000000,r5] ; lddl a, [limm, c]
+ lddl r4, [-100,r5] ; lddl a, [ximm, c]
+
+ lddl r2, [r0] ; lddl a, [b, s9=0]
+ lddl r6, [r7,255] ; lddl a, [b, s9] biggest s9
+ lddl r6, [r7,-256] ; lddl a, [b, s9] smallest s9
+ lddl r0, [0x13371338] ; lddl a, [limm,s9=0]
+ lddl r2, [0x80000000] ; lddl a, [limm,s9=0]
+ lddl r2, [-2147483648] ; lddl a, [ximm,s9=0]
+
+ ; Now, repetition of instructions above with suffices (*.a/aw/ab/as)
+
+ lddl.a r0, [r1,r2]
+ lddl.a r6, [r2,256]
+ lddl.a r2, [r2,-257]
+
+ lddl.a r2, [r0]
+ lddl.a r6, [r7,255]
+ lddl.a r6, [r7,-256]
+
+ lddl.aw r0, [r1,r2]
+ lddl.aw r6, [r2,256]
+ lddl.aw r2, [r2,-257]
+
+ lddl.aw r2, [r0]
+ lddl.aw r6, [r7,255]
+ lddl.aw r6, [r7,-256]
+
+ lddl.ab r0, [r1,r2]
+ lddl.ab r6, [r2,256]
+ lddl.ab r2, [r2,-257]
+
+ lddl.ab r2, [r0]
+ lddl.ab r6, [r7,255]
+ lddl.ab r6, [r7,-256]
+
+ lddl.as r0, [r1,r2]
+ lddl.as r6, [r2,256]
+ lddl.as r2, [r2,-257]
+ lddl.as r4, [0x80000000,r5]
+ lddl.as r4, [-100,r5]
+
+ lddl.as r2, [r0]
+ lddl.as r6, [r7,255]
+ lddl.as r6, [r7,-256]
+ lddl.as r4, [-256,r5]
+ lddl.as r0, [0x13371338]
+ lddl.as r2, [0x80000000]
+ lddl.as r2, [-2147483648]
new file mode 100644
@@ -0,0 +1,70 @@
+#as: -mcpu=hs6x
+#source: load.s
+#objdump: -d --prefix-addresses --show-raw-insn
+
+.*: +file format elf64-.*arc64
+
+
+Disassembly of section .text:
+0x[0-9a-f]+ 2031 8f01 ffff f020 ldl r1,\[r0,-4064@s32\]
+0x[0-9a-f]+ 2030 0f01 ffff f020 ld r1,\[r0,-4064@s32\]
+0x[0-9a-f]+ 2032 0f01 ffff f020 ldb r1,\[r0,-4064@s32\]
+0x[0-9a-f]+ 20f2 0f02 ffff f020 lddl r2r3,\[r0,-4064@s32\]
+0x[0-9a-f]+ 2034 0f01 ffff f020 ldh r1,\[r0,-4064@s32\]
+0x[0-9a-f]+ 2431 f001 ffff f020 ldl r1,\[-4064@s32,r0\]
+0x[0-9a-f]+ 2430 7001 ffff f020 ld r1,\[-4064@s32,r0\]
+0x[0-9a-f]+ 2432 7001 ffff f020 ldb r1,\[-4064@s32,r0\]
+0x[0-9a-f]+ 24f2 7002 ffff f020 lddl r2r3,\[-4064@s32,r0\]
+0x[0-9a-f]+ 2434 7001 ffff f020 ldh r1,\[-4064@s32,r0\]
+0x[0-9a-f]+ 2631 f001 ffff f020 ldl r1,\[0xfffff020,r0\]
+0x[0-9a-f]+ 2630 7001 ffff f020 ld r1,\[0xfffff020,r0\]
+0x[0-9a-f]+ 2632 7001 ffff f020 ldb r1,\[0xfffff020,r0\]
+0x[0-9a-f]+ 26f2 7002 ffff f020 lddl r2r3,\[0xfffff020,r0\]
+0x[0-9a-f]+ 2634 7001 ffff f020 ldh r1,\[0xfffff020,r0\]
+0x[0-9a-f]+ 2031 8f81 ffff f020 ldl r1,\[r0,0xfffff020\]
+0x[0-9a-f]+ 2030 0f81 ffff f020 ld r1,\[r0,0xfffff020\]
+0x[0-9a-f]+ 2032 0f81 ffff f020 ldb r1,\[r0,0xfffff020\]
+0x[0-9a-f]+ 20f2 0f82 ffff f020 lddl r2r3,\[r0,0xfffff020\]
+0x[0-9a-f]+ 2034 0f81 ffff f020 ldh r1,\[r0,0xfffff020\]
+0x[0-9a-f]+ 2071 8f01 ffff f020 ldl.aw r1,\[r0,-4064@s32\]
+0x[0-9a-f]+ 2070 0f01 ffff f020 ld.aw r1,\[r0,-4064@s32\]
+0x[0-9a-f]+ 2072 0f01 ffff f020 ldb.aw r1,\[r0,-4064@s32\]
+0x[0-9a-f]+ 20f3 0f02 ffff f020 lddl.aw r2r3,\[r0,-4064@s32\]
+0x[0-9a-f]+ 2074 0f01 ffff f020 ldh.aw r1,\[r0,-4064@s32\]
+0x[0-9a-f]+ 2471 f001 ffff f020 ldl.aw r1,\[-4064@s32,r0\]
+0x[0-9a-f]+ 2470 7001 ffff f020 ld.aw r1,\[-4064@s32,r0\]
+0x[0-9a-f]+ 2472 7001 ffff f020 ldb.aw r1,\[-4064@s32,r0\]
+0x[0-9a-f]+ 2474 7001 ffff f020 ldh.aw r1,\[-4064@s32,r0\]
+0x[0-9a-f]+ 2671 f001 ffff f020 ldl.aw r1,\[0xfffff020,r0\]
+0x[0-9a-f]+ 2670 7001 ffff f020 ld.aw r1,\[0xfffff020,r0\]
+0x[0-9a-f]+ 2672 7001 ffff f020 ldb.aw r1,\[0xfffff020,r0\]
+0x[0-9a-f]+ 2674 7001 ffff f020 ldh.aw r1,\[0xfffff020,r0\]
+0x[0-9a-f]+ 2071 8f81 ffff f020 ldl.aw r1,\[r0,0xfffff020\]
+0x[0-9a-f]+ 2070 0f81 ffff f020 ld.aw r1,\[r0,0xfffff020\]
+0x[0-9a-f]+ 2072 0f81 ffff f020 ldb.aw r1,\[r0,0xfffff020\]
+0x[0-9a-f]+ 20f3 0f82 ffff f020 lddl.aw r2r3,\[r0,0xfffff020\]
+0x[0-9a-f]+ 2074 0f81 ffff f020 ldh.aw r1,\[r0,0xfffff020\]
+0x[0-9a-f]+ 2030 8f01 ffff f020 ld.di r1,\[r0,-4064@s32\]
+0x[0-9a-f]+ 2032 8f01 ffff f020 ldb.di r1,\[r0,-4064@s32\]
+0x[0-9a-f]+ 2034 8f01 ffff f020 ldh.di r1,\[r0,-4064@s32\]
+0x[0-9a-f]+ 2430 f001 ffff f020 ld.di r1,\[-4064@s32,r0\]
+0x[0-9a-f]+ 2432 f001 ffff f020 ldb.di r1,\[-4064@s32,r0\]
+0x[0-9a-f]+ 2434 f001 ffff f020 ldh.di r1,\[-4064@s32,r0\]
+0x[0-9a-f]+ 2630 f001 ffff f020 ld.di r1,\[0xfffff020,r0\]
+0x[0-9a-f]+ 2632 f001 ffff f020 ldb.di r1,\[0xfffff020,r0\]
+0x[0-9a-f]+ 2634 f001 ffff f020 ldh.di r1,\[0xfffff020,r0\]
+0x[0-9a-f]+ 2030 8f81 ffff f020 ld.di r1,\[r0,0xfffff020\]
+0x[0-9a-f]+ 2032 8f81 ffff f020 ldb.di r1,\[r0,0xfffff020\]
+0x[0-9a-f]+ 2034 8f81 ffff f020 ldh.di r1,\[r0,0xfffff020\]
+0x[0-9a-f]+ 2031 0f01 ffff f020 ld.x r1,\[r0,-4064@s32\]
+0x[0-9a-f]+ 2033 0f01 ffff f020 ldb.x r1,\[r0,-4064@s32\]
+0x[0-9a-f]+ 2035 0f01 ffff f020 ldh.x r1,\[r0,-4064@s32\]
+0x[0-9a-f]+ 2431 7001 ffff f020 ld.x r1,\[-4064@s32,r0\]
+0x[0-9a-f]+ 2433 7001 ffff f020 ldb.x r1,\[-4064@s32,r0\]
+0x[0-9a-f]+ 2435 7001 ffff f020 ldh.x r1,\[-4064@s32,r0\]
+0x[0-9a-f]+ 2631 7001 ffff f020 ld.x r1,\[0xfffff020,r0\]
+0x[0-9a-f]+ 2633 7001 ffff f020 ldb.x r1,\[0xfffff020,r0\]
+0x[0-9a-f]+ 2635 7001 ffff f020 ldh.x r1,\[0xfffff020,r0\]
+0x[0-9a-f]+ 2031 0f81 ffff f020 ld.x r1,\[r0,0xfffff020\]
+0x[0-9a-f]+ 2033 0f81 ffff f020 ldb.x r1,\[r0,0xfffff020\]
+0x[0-9a-f]+ 2035 0f81 ffff f020 ldh.x r1,\[r0,0xfffff020\]
new file mode 100644
@@ -0,0 +1,82 @@
+ ldl r1,[r0,-4064]
+ ld r1,[r0,-4064]
+ ldb r1,[r0,-4064]
+ lddl r2,[r0,-4064]
+ ldh r1,[r0,-4064]
+
+ ldl r1,[-4064,r0]
+ ld r1,[-4064,r0]
+ ldb r1,[-4064,r0]
+ lddl r2,[-4064,r0]
+ ldh r1,[-4064,r0]
+
+ ldl r1,[0xfffff020,r0]
+ ld r1,[0xfffff020,r0]
+ ldb r1,[0xfffff020,r0]
+ lddl r2,[0xfffff020,r0]
+ ldh r1,[0xfffff020,r0]
+
+ ldl r1,[r0,0xfffff020]
+ ld r1,[r0,0xfffff020]
+ ldb r1,[r0,0xfffff020]
+ lddl r2,[r0,0xfffff020]
+ ldh r1,[r0,0xfffff020]
+
+
+ ldl.aw r1,[r0,-4064]
+ ld.aw r1,[r0,-4064]
+ ldb.aw r1,[r0,-4064]
+ lddl.aw r2,[r0,-4064]
+ ldh.aw r1,[r0,-4064]
+
+ ldl.aw r1,[-4064,r0]
+ ld.aw r1,[-4064,r0]
+ ldb.aw r1,[-4064,r0]
+ ;; lddl.aw r2,[-4064,r0]
+ ldh.aw r1,[-4064,r0]
+
+ ldl.aw r1,[0xfffff020,r0]
+ ld.aw r1,[0xfffff020,r0]
+ ldb.aw r1,[0xfffff020,r0]
+ ;; lddl.aw r2,[0xfffff020,r0]
+ ldh.aw r1,[0xfffff020,r0]
+
+ ldl.aw r1,[r0,0xfffff020]
+ ld.aw r1,[r0,0xfffff020]
+ ldb.aw r1,[r0,0xfffff020]
+ lddl.aw r2,[r0,0xfffff020]
+ ldh.aw r1,[r0,0xfffff020]
+
+
+ ld.di r1,[r0,-4064]
+ ldb.di r1,[r0,-4064]
+ ldh.di r1,[r0,-4064]
+
+ ld.di r1,[-4064,r0]
+ ldb.di r1,[-4064,r0]
+ ldh.di r1,[-4064,r0]
+
+ ld.di r1,[0xfffff020,r0]
+ ldb.di r1,[0xfffff020,r0]
+ ldh.di r1,[0xfffff020,r0]
+
+ ld.di r1,[r0,0xfffff020]
+ ldb.di r1,[r0,0xfffff020]
+ ldh.di r1,[r0,0xfffff020]
+
+
+ ld.x r1,[r0,-4064]
+ ldb.x r1,[r0,-4064]
+ ldh.x r1,[r0,-4064]
+
+ ld.x r1,[-4064,r0]
+ ldb.x r1,[-4064,r0]
+ ldh.x r1,[-4064,r0]
+
+ ld.x r1,[0xfffff020,r0]
+ ldb.x r1,[0xfffff020,r0]
+ ldh.x r1,[0xfffff020,r0]
+
+ ld.x r1,[r0,0xfffff020]
+ ldb.x r1,[r0,0xfffff020]
+ ldh.x r1,[r0,0xfffff020]
new file mode 100644
@@ -0,0 +1,61 @@
+#source: st.s
+#objdump: -dr --prefix-addresses --show-raw-insn
+
+.*: +file format elf.*-.*arc64
+
+Disassembly of section .text:
+0x[0-9a-f]+ 1900 0100 st r4,\[r1,0\]
+0x[0-9a-f]+ 1e00 7100 0000 1338 st r4,\[0x1338,0\]
+0x[0-9a-f]+ 1e00 7180 7fff ffff st r6,\[0x7fffffff,0\]
+0x[0-9a-f]+ 1b00 0f80 0800 0000 st 0x8000000,\[r3,0\]
+0x[0-9a-f]+ 1e00 7f80 0000 1234 st 0x1234,\[0x1234,0\]
+0x[0-9a-f]+ 19ff 0000 st r0,\[r1,255\]
+0x[0-9a-f]+ 1c00 8080 st r2,\[r4,-256\]
+0x[0-9a-f]+ 1e0c 7180 7fff ffff st r6,\[0x7fffffff,12\]
+0x[0-9a-f]+ 1e0d 7f80 0000 4321 st 0x4321,\[0x4321,13\]
+0x[0-9a-f]+ 1e00 7200 ffff fc00 st r8,\[0xfffffc00,0\]
+0x[0-9a-f]+ 1a14 8f80 0000 0020 st 0x20,\[r2,-236\]
+0x[0-9a-f]+ 1a0a 8f80 ffff ffdf st 0xffffffdf,\[r2,-246\]
+0x[0-9a-f]+ 1a00 8f80 1234 5678 st 0x12345678,\[r2,-256\]
+0x[0-9a-f]+ 19ff 0f80 ffff 5bf0 st 0xffff5bf0,\[r1,255\]
+0x[0-9a-f]+ 19ff 0008 st.aw r0,\[r1,255\]
+0x[0-9a-f]+ 1c00 8088 st.aw r2,\[r4,-256\]
+0x[0-9a-f]+ 1a00 8f88 1234 5678 st.aw 0x12345678,\[r2,-256\]
+0x[0-9a-f]+ 19ff 0f88 ffff 5bf0 st.aw 0xffff5bf0,\[r1,255\]
+0x[0-9a-f]+ 19ff 0008 st.aw r0,\[r1,255\]
+0x[0-9a-f]+ 1c00 8088 st.aw r2,\[r4,-256\]
+0x[0-9a-f]+ 1a00 8f88 1234 5678 st.aw 0x12345678,\[r2,-256\]
+0x[0-9a-f]+ 19ff 0f88 ffff 5bf0 st.aw 0xffff5bf0,\[r1,255\]
+0x[0-9a-f]+ 19ff 0010 st.ab r0,\[r1,255\]
+0x[0-9a-f]+ 1c00 8090 st.ab r2,\[r4,-256\]
+0x[0-9a-f]+ 1a00 8f90 1234 5678 st.ab 0x12345678,\[r2,-256\]
+0x[0-9a-f]+ 19ff 0f90 ffff 5bf0 st.ab 0xffff5bf0,\[r1,255\]
+0x[0-9a-f]+ 19ff 0018 st.as r0,\[r1,255\]
+0x[0-9a-f]+ 1c00 8098 st.as r2,\[r4,-256\]
+0x[0-9a-f]+ 1e00 7100 0000 1338 st r4,\[0x1338,0\]
+0x[0-9a-f]+ 1e00 7180 7fff ffff st r6,\[0x7fffffff,0\]
+0x[0-9a-f]+ 1e00 7200 ffff fc00 st r8,\[0xfffffc00,0\]
+0x[0-9a-f]+ 1a00 8f98 1234 5678 st.as 0x12345678,\[r2,-256\]
+0x[0-9a-f]+ 19ff 0f98 ffff 5bf0 st.as 0xffff5bf0,\[r1,255\]
+0x[0-9a-f]+ 1900 07c1 st 31,\[r1,0\]
+0x[0-9a-f]+ 1900 0801 st -32,\[r1,0\]
+0x[0-9a-f]+ 19ff 0801 st -32,\[r1,255\]
+0x[0-9a-f]+ 1c00 8141 st 5,\[r4,-256\]
+0x[0-9a-f]+ 1e00 7001 0000 1338 st 0,\[0x1338,0\]
+0x[0-9a-f]+ 1e00 7041 7fff ffff st 1,\[0x7fffffff,0\]
+0x[0-9a-f]+ 1e00 7fc1 ffff fc00 st -1,\[0xfffffc00,0\]
+0x[0-9a-f]+ 1900 07e1 st.di 31,\[r1,0\]
+0x[0-9a-f]+ 19ff 0839 st.di.as -32,\[r1,255\]
+0x[0-9a-f]+ 1c00 8169 st.di.aw 5,\[r4,-256\]
+0x[0-9a-f]+ 1b9b 0db1 st.di.ab -10,\[r3,155\]
+0x[0-9a-f]+ 1c9c 0289 st.aw 10,\[r4,156\]
+0x[0-9a-f]+ 1e00 7001 0000 1338 st 0,\[0x1338,0\]
+0x[0-9a-f]+ 1e00 7061 7fff ffff st.di 1,\[0x7fffffff,0\]
+0x[0-9a-f]+ 1c00 0fa4 0000 0004\s+sth.di\s+0x4,\[r4,0\]
+0x[0-9a-f]+ 1d09 0fbc 0000 0005\s+sth.di.as\s+0x5,\[r5,9\]
+0x[0-9a-f]+ 1e00 0001\s+st\s+0,\[r6,0\]
+0x[0-9a-f]+ 1900 0043\s+stb\s+1,\[r1,0\]
+0x[0-9a-f]+ 1e02 0009\s+st.aw\s+0,\[r6,2\]
+0x[0-9a-f]+ 1901 0053\s+stb.ab\s+1,\[r1,1\]
+0x[0-9a-f]+ 1e00 7105 0000 0000\s+sth\s+4,\[0,0\]
+\s+[0-9a-f]+: R_ARC_32_ME\s+symb
new file mode 100644
@@ -0,0 +1,68 @@
+; common stores
+
+ st r4, [r1] ; st c, [b]
+ st r4, [0x1338] ; st c, [limm] limm: small
+ st r6, [0x7fffffff] ; st c, [limm] limm: big
+ st 0x8000000, [r3] ; st limm, [b] limm: big
+ st 0x1234, [0x1234] ; st limm, [limm] limm: equal
+
+ st r0, [r1,255] ; st c, [b, s9] s9: biggest
+ st r2, [r4,-256] ; st c, [b, s9] s9: smallest
+ st r6, [0x7fffffff,12] ; st c, [limm,s9] limm: positive
+ st 0x4321, [0x4321,13] ; st limm, [limm,s9] limm: equal
+ st r8, [-1024] ; st c, [limm] limm: negative
+ st 32, [r2, -236] ; st limm, [b, s9] limm: smallest positive
+ st -33, [r2, -246] ; st limm, [b, s9] limm: biggest negative
+ st 0x12345678, [r2, -256] ; st limm, [b, s9] limm: positive
+ st -42000, [r1, 255] ; st limm, [b, s9] limm: negative
+
+ ; Now, repetition of instructions above with suffices (*.a/aw/ab/as)
+
+ st.a r0, [r1,255]
+ st.a r2, [r4,-256]
+ st.a 0x12345678, [r2, -256]
+ st.a -42000, [r1, 255]
+
+ st.aw r0, [r1,255]
+ st.aw r2, [r4,-256]
+ st.aw 0x12345678, [r2, -256]
+ st.aw -42000, [r1, 255]
+
+ st.ab r0, [r1,255]
+ st.ab r2, [r4,-256]
+ st.ab 0x12345678, [r2, -256]
+ st.ab -42000, [r1, 255]
+
+ st.as r0, [r1,255]
+ st.as r2, [r4,-256]
+ st r4, [0x1338]
+ st r6, [0x7fffffff]
+ st r8, [-1024]
+ st.as 0x12345678, [r2, -256]
+ st.as -42000, [r1, 255]
+
+ ; st w6, ...
+ st 31, [r1] ; st w6, [b, s9=0] w6: biggest
+ st -32, [r1] ; st w6, [b, s9=0] w6: smallest
+ st -32, [r1,255] ; st w6, [b, s9] s9: biggest
+ st 5, [r4,-256] ; st w6, [b, s9] s9: smallest
+ st 0, [0x1338] ; st w6, [limm] limm: small positive
+ st 1, [0x7fffffff] ; st w6, [limm] limm: positive
+ st -1, [-1024] ; st w6, [limm] limm: negative
+
+ st.di 31, [r1] ; st w6, [b, s9=0] w6: biggest
+ st.as.di -32, [r1,255] ; st w6, [b, s9] s9: biggest
+ st.aw.di 5, [r4,-256] ; st w6, [b, s9] s9: smallest
+ st.ab.di -10, [r3,155] ; st w6, [b, s9]
+ st.aw 10, [r4,156] ; st w6, [b, s9]
+ st 0, [0x1338] ; st w6, [limm] limm: small positive
+ st.di 1, [0x7fffffff] ; st w6, [limm] limm: positive
+
+ ;; sth w6 ...
+ sth.di 4,[r4]
+ sth.di.as 5,[r5,9]
+ st 0,[r6]
+ stb 1,[r1,0]
+ st.aw 0,[r6,2]
+ stb.ab 1,[r1,1]
+ sth 4,[@symb]
new file mode 100644
@@ -0,0 +1,55 @@
+#as: -mcpu=hs5x
+#source: std.s
+#objdump: -dr --prefix-addresses --show-raw-insn
+
+.*: +file format elf32-.*arc64
+
+Disassembly of section .text:
+0x[0-9a-f]+ 1900 0106 std r4r5,\[r1\]
+0x[0-9a-f]+ 1e00 7106 0000 1338 std r4r5,\[0x1338\]
+0x[0-9a-f]+ 1e00 7186 7fff ffff std r6r7,\[0x7fffffff\]
+0x[0-9a-f]+ 1b00 0f86 0800 0000 std 0x8000000,\[r3\]
+0x[0-9a-f]+ 1e00 7f86 0000 1234 std 0x1234,\[0x1234\]
+0x[0-9a-f]+ 19ff 0006 std r0r1,\[r1,255\]
+0x[0-9a-f]+ 1c00 8086 std r2r3,\[r4,-256\]
+0x[0-9a-f]+ 1e0c 7186 7fff ffff std r6r7,\[0x7fffffff,12\]
+0x[0-9a-f]+ 1e0d 7f86 0000 4321 std 0x4321,\[0x4321,13\]
+0x[0-9a-f]+ 1e00 7206 ffff fc00 std r8r9,\[0xfffffc00\]
+0x[0-9a-f]+ 1a14 8f86 0000 0020 std 0x20,\[r2,-236\]
+0x[0-9a-f]+ 1a0a 8f86 ffff ffdf std 0xffffffdf,\[r2,-246\]
+0x[0-9a-f]+ 1a00 8f86 1234 5678 std 0x12345678,\[r2,-256\]
+0x[0-9a-f]+ 19ff 0f86 ffff 5bf0 std 0xffff5bf0,\[r1,255\]
+0x[0-9a-f]+ 19ff 000e std.aw r0r1,\[r1,255\]
+0x[0-9a-f]+ 1c00 808e std.aw r2r3,\[r4,-256\]
+0x[0-9a-f]+ 1a00 8f8e 1234 5678 std.aw 0x12345678,\[r2,-256\]
+0x[0-9a-f]+ 19ff 0f8e ffff 5bf0 std.aw 0xffff5bf0,\[r1,255\]
+0x[0-9a-f]+ 19ff 000e std.aw r0r1,\[r1,255\]
+0x[0-9a-f]+ 1c00 808e std.aw r2r3,\[r4,-256\]
+0x[0-9a-f]+ 1a00 8f8e 1234 5678 std.aw 0x12345678,\[r2,-256\]
+0x[0-9a-f]+ 19ff 0f8e ffff 5bf0 std.aw 0xffff5bf0,\[r1,255\]
+0x[0-9a-f]+ 19ff 0016 std.ab r0r1,\[r1,255\]
+0x[0-9a-f]+ 1c00 8096 std.ab r2r3,\[r4,-256\]
+0x[0-9a-f]+ 1a00 8f96 1234 5678 std.ab 0x12345678,\[r2,-256\]
+0x[0-9a-f]+ 19ff 0f96 ffff 5bf0 std.ab 0xffff5bf0,\[r1,255\]
+0x[0-9a-f]+ 19ff 001e std.as r0r1,\[r1,255\]
+0x[0-9a-f]+ 1c00 809e std.as r2r3,\[r4,-256\]
+0x[0-9a-f]+ 1e00 711e 0000 1338 std.as r4r5,\[0x1338\]
+0x[0-9a-f]+ 1e00 719e 7fff ffff std.as r6r7,\[0x7fffffff]
+0x[0-9a-f]+ 1e00 721e ffff fc00 std.as r8r9,\[0xfffffc00]
+0x[0-9a-f]+ 1a00 8f9e 1234 5678 std.as 0x12345678,\[r2,-256\]
+0x[0-9a-f]+ 19ff 0f9e ffff 5bf0 std.as 0xffff5bf0,\[r1,255\]
+0x[0-9a-f]+ 1e0f 7fbe 0000 4321 std.di.as 0x4321,\[0x4321,15\]
+0x[0-9a-f]+ 1900 07c7 std 31,\[r1\]
+0x[0-9a-f]+ 1900 0807 std -32,\[r1\]
+0x[0-9a-f]+ 19ff 0807 std -32,\[r1,255\]
+0x[0-9a-f]+ 1c00 8147 std 5,\[r4,-256\]
+0x[0-9a-f]+ 1e00 7007 0000 1338 std 0,\[0x1338\]
+0x[0-9a-f]+ 1e00 7047 7fff ffff std 1,\[0x7fffffff\]
+0x[0-9a-f]+ 1e00 7fc7 ffff fc00 std -1,\[0xfffffc00\]
+0x[0-9a-f]+ 1900 07e7 std.di 31,\[r1\]
+0x[0-9a-f]+ 19ff 083f std.di.as -32,\[r1,255\]
+0x[0-9a-f]+ 1c00 816f std.di.aw 5,\[r4,-256\]
+0x[0-9a-f]+ 1b9b 0db7 std.di.ab -10,\[r3,155\]
+0x[0-9a-f]+ 1c9c 028f std.aw 10,\[r4,156\]
+0x[0-9a-f]+ 1e00 7007 0000 1338 std 0,\[0x1338\]
+0x[0-9a-f]+ 1e00 7067 7fff ffff std.di 1,\[0x7fffffff\]
new file mode 100644
@@ -0,0 +1,60 @@
+; 64-bit double stores
+
+ std r4, [r1] ; std c, [b]
+ std r4, [0x1338] ; std c, [limm] limm: small
+ std r6, [0x7fffffff] ; std c, [limm] limm: big
+ std 0x8000000, [r3] ; std limm, [b] limm: big
+ std 0x1234, [0x1234] ; std limm, [limm] limm: equal
+
+ std r0, [r1,255] ; std c, [b, s9] s9: biggest
+ std r2, [r4,-256] ; std c, [b, s9] s9: smallest
+ std r6, [0x7fffffff,12] ; std c, [limm,s9] limm: positive
+ std 0x4321, [0x4321,13] ; std limm, [limm,s9] limm: equal
+ std r8, [-1024] ; std c, [limm] limm: negative
+ std 32, [r2, -236] ; std limm, [b, s9] limm: smallest positive
+ std -33, [r2, -246] ; std limm, [b, s9] limm: biggest negative
+ std 0x12345678, [r2, -256] ; std limm, [b, s9] limm: positive
+ std -42000, [r1, 255] ; std limm, [b, s9] limm: negative
+
+ ; Now, repetition of instructions above with suffices (*.a/aw/ab/as)
+
+ std.a r0, [r1,255]
+ std.a r2, [r4,-256]
+ std.a 0x12345678, [r2, -256]
+ std.a -42000, [r1, 255]
+
+ std.aw r0, [r1,255]
+ std.aw r2, [r4,-256]
+ std.aw 0x12345678, [r2, -256]
+ std.aw -42000, [r1, 255]
+
+ std.ab r0, [r1,255]
+ std.ab r2, [r4,-256]
+ std.ab 0x12345678, [r2, -256]
+ std.ab -42000, [r1, 255]
+
+ std.as r0, [r1,255]
+ std.as r2, [r4,-256]
+ std.as r4, [0x1338]
+ std.as r6, [0x7fffffff]
+ std.as r8, [-1024]
+ std.as 0x12345678, [r2, -256]
+ std.as -42000, [r1, 255]
+ std.as.di 0x4321, [0x4321, 15]
+
+ ; std w6, ...
+ std 31, [r1] ; std w6, [b, s9=0] w6: biggest
+ std -32, [r1] ; std w6, [b, s9=0] w6: smallest
+ std -32, [r1,255] ; std w6, [b, s9] s9: biggest
+ std 5, [r4,-256] ; std w6, [b, s9] s9: smallest
+ std 0, [0x1338] ; std w6, [limm] limm: small positive
+ std 1, [0x7fffffff] ; std w6, [limm] limm: positive
+ std -1, [-1024] ; std w6, [limm] limm: negative
+
+ std.di 31, [r1] ; std w6, [b, s9=0] w6: biggest
+ std.as.di -32, [r1,255] ; std w6, [b, s9] s9: biggest
+ std.aw.di 5, [r4,-256] ; std w6, [b, s9] s9: smallest
+ std.ab.di -10, [r3,155] ; std w6, [b, s9]
+ std.aw 10, [r4,156] ; std w6, [b, s9]
+ std 0, [0x1338] ; std w6, [limm] limm: small positive
+ std.di 1, [0x7fffffff] ; std w6, [limm] limm: positive
new file mode 100644
@@ -0,0 +1,35 @@
+#as: -mcpu=hs6x
+#source: stdl.s
+#objdump: -dr --prefix-addresses --show-raw-insn
+
+.*: +file format elf64-.*arc64
+
+Disassembly of section .text:
+0x[0-9a-f]+ 1900 0126 stdl r4r5,\[r1,0\]
+0x[0-9a-f]+ 1c00 70a6 0000 1338 stdl r2r3,\[4920@s32\]
+0x[0-9a-f]+ 1c00 71a6 7fff ffff stdl r6r7,\[2147483647@s32\]
+0x[0-9a-f]+ 1e00 70a6 8000 0000 stdl r2r3,\[0x80000000\]
+0x[0-9a-f]+ 1c00 7026 ffff fb2e stdl r0r1,\[-1234@s32\]
+0x[0-9a-f]+ 1b00 0fa6 8000 0000 stdl 0x80000000,\[r3,0\]
+0x[0-9a-f]+ 1b00 0f26 7fff ffff stdl 2147483647@s32,\[r3,0\]
+0x[0-9a-f]+ 19ff 0026 stdl r0r1,\[r1,255\]
+0x[0-9a-f]+ 1c00 80a6 stdl r2r3,\[r4,-256\]
+0x[0-9a-f]+ 19ff 0f26 ffff 5bf0 stdl -42000@s32,\[r1,255\]
+0x[0-9a-f]+ 1a00 8fa6 8234 5678 stdl 0x82345678,\[r2,-256\]
+0x[0-9a-f]+ 19ff 002e stdl.aw r0r1,\[r1,255\]
+0x[0-9a-f]+ 1c00 812e stdl.aw r4r5,\[r4,-256\]
+0x[0-9a-f]+ 1a00 8fae 8234 5678 stdl.aw 0x82345678,\[r2,-256\]
+0x[0-9a-f]+ 19ff 0f2e ffff 5bf0 stdl.aw -42000@s32,\[r1,255\]
+0x[0-9a-f]+ 19ff 002e stdl.aw r0r1,\[r1,255\]
+0x[0-9a-f]+ 1c00 80ae stdl.aw r2r3,\[r4,-256\]
+0x[0-9a-f]+ 1a00 8fae 8234 5678 stdl.aw 0x82345678,\[r2,-256\]
+0x[0-9a-f]+ 19ff 0f2e ffff 5bf0 stdl.aw -42000@s32,\[r1,255\]
+0x[0-9a-f]+ 19ff 0036 stdl.ab r0r1,\[r1,255\]
+0x[0-9a-f]+ 1c00 81b6 stdl.ab r6r7,\[r4,-256\]
+0x[0-9a-f]+ 1a00 8fb6 8234 5678 stdl.ab 0x82345678,\[r2,-256\]
+0x[0-9a-f]+ 19ff 0f36 ffff 5bf0 stdl.ab -42000@s32,\[r1,255\]
+0x[0-9a-f]+ 19ff 003e stdl.as r0r1,\[r1,255\]
+0x[0-9a-f]+ 1c00 813e stdl.as r4r5,\[r4,-256\]
+0x[0-9a-f]+ 1a00 8fbe 8234 5678 stdl.as 0x82345678,\[r2,-256\]
+0x[0-9a-f]+ 19ff 0f3e ffff 5bf0 stdl.as -42000@s32,\[r1,255\]
+0x[0-9a-f]+ 1a00 8fbe 8234 5678 stdl.as 0x82345678,\[r2,-256\]
new file mode 100644
@@ -0,0 +1,37 @@
+; 128-bit double stores
+
+ stdl r4, [r1] ; stdl c, [b]
+ stdl r2, [0x1338] ; stdl c, [ximm] ximm: default
+ stdl r6, [0x7fffffff] ; stdl c, [ximm] ximm: big
+ stdl r2, [0x80000000] ; stdl c, [limm] limm: positive
+ stdl r0, [-1234] ; stdl c, [ximm] ximm: negative
+ stdl 0x80000000, [r3] ; stdl limm, [b] limm: smallest
+ stdl 0x7fffffff, [r3] ; stdl ximm, [b] ximm: biggest
+
+ stdl r0, [r1, 255] ; stdl c, [b, s9] s9: biggest
+ stdl r2, [r4,-256] ; stdl c, [b, s9] s9: smallest
+ stdl -42000, [r1, 255] ; stdl ximm, [b, s9] ximm: negative
+ stdl 0x82345678, [r2, -256] ; stdl limm, [b, s9] limm: positive
+
+ ; Now, repetition of instructions above with suffices (*.a/aw/ab/as)
+
+ stdl.a r0, [r1,255]
+ stdl.a r4, [r4,-256]
+ stdl.a 0x82345678, [r2, -256]
+ stdl.a -42000, [r1, 255]
+
+ stdl.aw r0, [r1,255]
+ stdl.aw r2, [r4,-256]
+ stdl.aw 0x82345678, [r2, -256]
+ stdl.aw -42000, [r1, 255]
+
+ stdl.ab r0, [r1,255]
+ stdl.ab r6, [r4,-256]
+ stdl.ab 0x82345678, [r2, -256]
+ stdl.ab -42000, [r1, 255]
+
+ stdl.as r0, [r1,255]
+ stdl.as r4, [r4,-256]
+ stdl.as 0x82345678, [r2, -256]
+ stdl.as -42000, [r1, 255]
+ stdl.as 0x82345678, [r2, -256]
new file mode 100644
@@ -0,0 +1,46 @@
+#as: -mcpu=hs6x
+#source: stl.s
+#objdump: -dr --prefix-addresses --show-raw-insn
+
+.*: +file format elf64-.*arc64
+
+Disassembly of section .text:
+0x[0-9a-f]+ 1900 0107 stl r4,\[r1,0\]
+0x[0-9a-f]+ 1c00 70c7 0000 1338 stl r3,\[4920@s32\]
+0x[0-9a-f]+ 1c00 7147 7fff ffff stl r5,\[2147483647@s32\]
+0x[0-9a-f]+ 1e00 7087 8000 0000 stl r2,\[0x80000000\]
+0x[0-9a-f]+ 1c00 71c7 ffff fb2e stl r7,\[-1234@s32\]
+0x[0-9a-f]+ 1b00 0f87 8000 0000 stl 0x80000000,\[r3,0\]
+0x[0-9a-f]+ 1b00 0f07 7fff ffff stl 2147483647@s32,\[r3,0\]
+0x[0-9a-f]+ 19ff 0047 stl r1,\[r1,255\]
+0x[0-9a-f]+ 1c00 8087 stl r2,\[r4,-256\]
+0x[0-9a-f]+ 19ff 0f07 ffff 5bf0 stl -42000@s32,\[r1,255\]
+0x[0-9a-f]+ 1a00 8f87 8234 5678 stl 0x82345678,\[r2,-256\]
+0x[0-9a-f]+ 19ff 000f stl.aw r0,\[r1,255\]
+0x[0-9a-f]+ 1c00 804f stl.aw r1,\[r4,-256\]
+0x[0-9a-f]+ 1a00 8f8f 8234 5678 stl.aw 0x82345678,\[r2,-256\]
+0x[0-9a-f]+ 19ff 0f0f ffff 5bf0 stl.aw -42000@s32,\[r1,255\]
+0x[0-9a-f]+ 19ff 000f stl.aw r0,\[r1,255\]
+0x[0-9a-f]+ 1c00 808f stl.aw r2,\[r4,-256\]
+0x[0-9a-f]+ 1a00 8f8f 8234 5678 stl.aw 0x82345678,\[r2,-256\]
+0x[0-9a-f]+ 19ff 0f0f ffff 5bf0 stl.aw -42000@s32,\[r1,255\]
+0x[0-9a-f]+ 19ff 0017 stl.ab r0,\[r1,255\]
+0x[0-9a-f]+ 1c00 80d7 stl.ab r3,\[r4,-256\]
+0x[0-9a-f]+ 1a00 8f97 8234 5678 stl.ab 0x82345678,\[r2,-256\]
+0x[0-9a-f]+ 19ff 0f17 ffff 5bf0 stl.ab -42000@s32,\[r1,255\]
+0x[0-9a-f]+ 19ff 001f stl.as r0,\[r1,255\]
+0x[0-9a-f]+ 1c00 805f stl.as r1,\[r4,-256\]
+0x[0-9a-f]+ 1a00 8f9f 8234 5678 stl.as 0x82345678,\[r2,-256\]
+0x[0-9a-f]+ 19ff 0f1f ffff 5bf0 stl.as -42000@s32,\[r1,255\]
+0x[0-9a-f]+ 1a00 8f9f 8234 5678\s+stl.as\s+0x82345678,\[r2,-256\]
+0x[0-9a-f]+ 1900 07e7 stl 31,\[r1,0\]
+0x[0-9a-f]+ 1900 0827 stl -32,\[r1,0\]
+0x[0-9a-f]+ 19ff 0827 stl -32,\[r1,255\]
+0x[0-9a-f]+ 1c00 8167 stl 5,\[r4,-256\]
+0x[0-9a-f]+ 19ff 083f stl.as -32,\[r1,255\]
+0x[0-9a-f]+ 1c00 816f stl.aw 5,\[r4,-256\]
+0x[0-9a-f]+ 1b9b 0db7 stl.ab -10,\[r3,155\]
+0x[0-9a-f]+ 1c9c 02af stl.aw 10,\[r4,156\]
+0x[0-9a-f]+ 1c00 7027 0000 1338 stl 0,\[4920@s32\]
+0x[0-9a-f]+ 1e00 7067 8fff ffff stl 1,\[0x8fffffff\]
+0x[0-9a-f]+ 1c00 7fe7 ffff fc00 stl -1,\[-1024@s32\]
new file mode 100644
@@ -0,0 +1,50 @@
+; 64-bit stores
+
+ stl r4, [r1] ; stl c, [b]
+ stl r3, [0x1338] ; stl c, [ximm] ximm: default
+ stl r5, [0x7fffffff] ; stl c, [ximm] ximm: big
+ stl r2, [0x80000000] ; stl c, [limm] limm: positive
+ stl r7, [-1234] ; stl c, [ximm] ximm: negative
+ stl 0x80000000, [r3] ; stl limm, [b] limm: smallest
+ stl 0x7fffffff, [r3] ; stl ximm, [b] ximm: biggest
+
+ stl r1, [r1, 255] ; stl c, [b, s9] s9: biggest
+ stl r2, [r4,-256] ; stl c, [b, s9] s9: smallest
+ stl -42000, [r1, 255] ; stl ximm, [b, s9] ximm: negative
+ stl 0x82345678, [r2, -256] ; stl limm, [b, s9] limm: positive
+
+ ; Now, repetition of instructions above with suffices (*.a/aw/ab/as)
+
+ stl.a r0, [r1,255]
+ stl.a r1, [r4,-256]
+ stl.a 0x82345678, [r2, -256]
+ stl.a -42000, [r1, 255]
+
+ stl.aw r0, [r1,255]
+ stl.aw r2, [r4,-256]
+ stl.aw 0x82345678, [r2, -256]
+ stl.aw -42000, [r1, 255]
+
+ stl.ab r0, [r1,255]
+ stl.ab r3, [r4,-256]
+ stl.ab 0x82345678, [r2, -256]
+ stl.ab -42000, [r1, 255]
+
+ stl.as r0, [r1,255]
+ stl.as r1, [r4,-256]
+ stl.as 0x82345678, [r2, -256]
+ stl.as -42000, [r1, 255]
+ stl.as 0x82345678, [r2, -256]
+
+ ; stl w6, ...
+ stl 31, [r1] ; stl w6, [b, s9=0] w6: biggest
+ stl -32, [r1] ; stl w6, [b, s9=0] w6: smallest
+ stl -32, [r1,255] ; stl w6, [b, s9] s9: biggest
+ stl 5, [r4,-256] ; stl w6, [b, s9] s9: smallest
+ stl.as -32, [r1,255] ; stl w6, [b, s9] s9: biggest
+ stl.aw 5, [r4,-256] ; stl w6, [b, s9] s9: smallest
+ stl.ab -10, [r3,155] ; stl w6, [b, s9]
+ stl.aw 10, [r4,156] ; stl w6, [b, s9]
+ stl 0, [0x1338] ; stl w6, [ximm] ximm: small positive
+ stl 1, [0x8fffffff] ; stl w6, [limm] limm: positive
+ stl -1, [-1024] ; stl w6, [ximm] ximm: negative