| Message ID | 20231222114243.1836112-1-cailulu@loongson.cn |
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Return-Path: <binutils-bounces+patchwork=sourceware.org@sourceware.org> X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id A2A57386C5B9 for <patchwork@sourceware.org>; Fri, 22 Dec 2023 11:43:07 +0000 (GMT) X-Original-To: binutils@sourceware.org Delivered-To: binutils@sourceware.org Received: from mail.loongson.cn (mail.loongson.cn [114.242.206.163]) by sourceware.org (Postfix) with ESMTP id 937143858404 for <binutils@sourceware.org>; Fri, 22 Dec 2023 11:42:48 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 937143858404 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=loongson.cn Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=loongson.cn ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 937143858404 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=114.242.206.163 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1703245371; cv=none; b=IOcjAE4hhOrgcJUCzkTzTjrjoqadav+Ew6UG+7oj+gy4Klu+OZeAmfSUqBFCdhKGkOM0nKmSZs/Tizv07LJ/CWEZidwRubci0IviUM4wX59fK7B7D0iDknd9Xab0JtGgE7H4uK/a1wtNRAljCzGiWlsbg8LQSoTAnodpLZw2DLg= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1703245371; c=relaxed/simple; bh=9dcVidINE1jYF3tTDqgyXYMW4WN5k9jyHm93MApQQmw=; h=From:To:Subject:Date:Message-Id:MIME-Version; b=Xdn7bXWRIhSU8erBL3QoPuz0DQ7CRxTVEVF05qDZYY9zNGtDOplDIpOjf+O4mbU/snobtoDSqnn/oP8T5SwNjiytmMtpGacswNWfK3NdKBh7X9wfGeaIjjh00l9rW969RBONSIYPmkE70N5EfOA5oqsnehoATWMpfSu5gIOJ4XE= ARC-Authentication-Results: i=1; server2.sourceware.org Received: from loongson.cn (unknown [10.2.6.5]) by gateway (Coremail) with SMTP id _____8DxS+k1doVlDdUDAA--.19623S3; Fri, 22 Dec 2023 19:42:45 +0800 (CST) Received: from 5.5.5 (unknown [10.2.6.5]) by localhost.localdomain (Coremail) with SMTP id AQAAf8Cxvr40doVl7YkFAA--.20311S4; Fri, 22 Dec 2023 19:42:45 +0800 (CST) From: Lulu Cai <cailulu@loongson.cn> To: binutils@sourceware.org Cc: xuchenghua@loongson.cn, chenglulu@loongson.cn, liuzhensong@loongson.cn, mengqinggang@loongson.cn, xry111@xry111.site, i.swmail@xen0n.name, maskray@google.com, luweining@loongson.cn, wanglei@loongson.cn, hejinyang@loongson.cn, Lulu Cai <cailulu@loongson.cn> Subject: [PATCH v5 0/5] Add support for TLS Descriptors (TLSDESC) Date: Fri, 22 Dec 2023 19:42:38 +0800 Message-Id: <20231222114243.1836112-1-cailulu@loongson.cn> X-Mailer: git-send-email 2.39.3 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-CM-TRANSID: AQAAf8Cxvr40doVl7YkFAA--.20311S4 X-CM-SenderInfo: xfdlz3tox6z05rqj20fqof0/1tbiAQANB2WE8i4JhAABs6 X-Coremail-Antispam: 1Uk129KBj93XoWxZw47WF4xZF17tw1DZryUCFX_yoWrCFW3pa y7ZFnYkF1rCFsrGFyDW3y5XF1kXa1xGry29a4Sqr12krsaqry0vwn2yrZxXFW5J3yDt34r Zw1Ivw15WF1DtrbCm3ZEXasCq-sJn29KB7ZKAUJUUUU5529EdanIXcx71UUUUU7KY7ZEXa sCq-sGcSsGvfJ3Ic02F40EFcxC0VAKzVAqx4xG6I80ebIjqfuFe4nvWSU5nxnvy29KBjDU 0xBIdaVrnRJUUUvIb4IE77IF4wAFF20E14v26r1j6r4UM7CY07I20VC2zVCF04k26cxKx2 IYs7xG6rWj6s0DM7CIcVAFz4kK6r1Y6r17M28lY4IEw2IIxxk0rwA2F7IY1VAKz4vEj48v e4kI8wA2z4x0Y4vE2Ix0cI8IcVAFwI0_Gr0_Xr1l84ACjcxK6xIIjxv20xvEc7CjxVAFwI 0_Gr0_Cr1l84ACjcxK6I8E87Iv67AKxVW8Jr0_Cr1UM28EF7xvwVC2z280aVCY1x0267AK xVW8Jr0_Cr1UM2AIxVAIcxkEcVAq07x20xvEncxIr21l57IF6xkI12xvs2x26I8E6xACxx 1l5I8CrVACY4xI64kE6c02F40Ex7xfMcIj6xIIjxv20xvE14v26r1q6rW5McIj6I8E87Iv 67AKxVW8JVWxJwAm72CE4IkC6x0Yz7v_Jr0_Gr1lF7xvr2IYc2Ij64vIr41l42xK82IYc2 Ij64vIr41l4I8I3I0E4IkC6x0Yz7v_Jr0_Gr1l4IxYO2xFxVAFwI0_Jrv_JF1lx2IqxVAq x4xG67AKxVWUJVWUGwC20s026x8GjcxK67AKxVWUGVWUWwC2zVAF1VAY17CE14v26r1q6r 43MIIYrxkI7VAKI48JMIIF0xvE2Ix0cI8IcVAFwI0_JFI_Gr1lIxAIcVC0I7IYx2IY6xkF 7I0E14v26r1j6r4UMIIF0xvE42xK8VAvwI8IcIk0rVWUJVWUCwCI42IY6I8E87Iv67AKxV WUJVW8JwCI42IY6I8E87Iv6xkF7I0E14v26r1j6r4UYxBIdaVFxhVjvjDU0xZFpf9x07jo sjUUUUUU= X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00, KAM_DMARC_STATUS, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Binutils mailing list <binutils.sourceware.org> List-Unsubscribe: <https://sourceware.org/mailman/options/binutils>, <mailto:binutils-request@sourceware.org?subject=unsubscribe> List-Archive: <https://sourceware.org/pipermail/binutils/> List-Post: <mailto:binutils@sourceware.org> List-Help: <mailto:binutils-request@sourceware.org?subject=help> List-Subscribe: <https://sourceware.org/mailman/listinfo/binutils>, <mailto:binutils-request@sourceware.org?subject=subscribe> Errors-To: binutils-bounces+patchwork=sourceware.org@sourceware.org |
| Series |
Add support for TLS Descriptors (TLSDESC)
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|
Message
Lulu Cai
Dec. 22, 2023, 11:42 a.m. UTC
v5 mainly changes the relocation name and adds relocation
for immediate value field of ld.w/d.
1. R_LARCH_TLS_DESC_ADD_PC_LO12 -> R_LARCH_TLS_DESC_PC_LO12.
R_LARCH_TLS_DESC_LD(113) -> R_LARCH_TLS_DESC_LD(119)
2. Added 32 abs test case.
3. Added R_LARCH_TLS_DESC_LD relocation to the immediate field of
the ld.w/d instruction.
Such as:
pcalau12i $r4,%desc_pc_hi20(var)
addi.d $r4,$r4,%desc_pc_lo12(var)
ld.d $r1,$r4,0 -> ld.d $r1,$r4,%desc_ld(var)
jirl $r1,$r1,%desc_call(var)
addi.d $a0,$a0,$tp
Lulu Cai (4):
LoongArch: Add new relocs and macro for TLSDESC.
LoongArch: Add support for TLSDESC in ld.
LoongArch: Add tls transition support.
LoongArch: Add testsuit for DESC and tls transition and tls
relaxation.
mengqinggang (1):
LoongArch: Add support for TLS LD/GD/DESC relaxation
bfd/bfd-in2.h | 15 +
bfd/elfnn-loongarch.c | 552 +++++++++++++++++-
bfd/elfxx-loongarch.c | 270 ++++++++-
bfd/libbfd.h | 15 +
bfd/reloc.c | 36 ++
gas/config/tc-loongarch.c | 20 +-
gas/testsuite/gas/loongarch/macro_op.d | 128 ++--
gas/testsuite/gas/loongarch/macro_op_32.d | 120 ++--
.../gas/loongarch/macro_op_large_abs.d | 160 ++---
.../gas/loongarch/macro_op_large_pc.d | 160 ++---
gas/testsuite/gas/loongarch/tlsdesc_32.d | 28 +
gas/testsuite/gas/loongarch/tlsdesc_32.s | 12 +
gas/testsuite/gas/loongarch/tlsdesc_32_abs.d | 26 +
gas/testsuite/gas/loongarch/tlsdesc_32_abs.s | 8 +
gas/testsuite/gas/loongarch/tlsdesc_64.d | 28 +
gas/testsuite/gas/loongarch/tlsdesc_64.s | 12 +
.../gas/loongarch/tlsdesc_large_abs.d | 34 ++
.../gas/loongarch/tlsdesc_large_abs.s | 12 +
.../gas/loongarch/tlsdesc_large_pc.d | 38 ++
.../gas/loongarch/tlsdesc_large_pc.s | 17 +
include/elf/loongarch.h | 26 +-
include/opcode/loongarch.h | 6 +
ld/testsuite/ld-loongarch-elf/desc-ie.d | 16 +
ld/testsuite/ld-loongarch-elf/desc-ie.s | 18 +
ld/testsuite/ld-loongarch-elf/desc-le.d | 15 +
ld/testsuite/ld-loongarch-elf/desc-le.s | 14 +
ld/testsuite/ld-loongarch-elf/desc-norelax.d | 16 +
ld/testsuite/ld-loongarch-elf/desc-norelax.s | 5 +
ld/testsuite/ld-loongarch-elf/desc-relax.d | 15 +
ld/testsuite/ld-loongarch-elf/desc-relax.s | 5 +
ld/testsuite/ld-loongarch-elf/ie-le.d | 13 +
ld/testsuite/ld-loongarch-elf/ie-le.s | 11 +
.../ld-loongarch-elf/ld-loongarch-elf.exp | 9 +
ld/testsuite/ld-loongarch-elf/macro_op.d | 391 +++++++------
ld/testsuite/ld-loongarch-elf/macro_op_32.d | 120 ++--
ld/testsuite/ld-loongarch-elf/tlsdesc-dso.d | 56 ++
ld/testsuite/ld-loongarch-elf/tlsdesc-dso.s | 65 +++
opcodes/loongarch-opc.c | 54 ++
38 files changed, 1980 insertions(+), 566 deletions(-)
create mode 100644 gas/testsuite/gas/loongarch/tlsdesc_32.d
create mode 100644 gas/testsuite/gas/loongarch/tlsdesc_32.s
create mode 100644 gas/testsuite/gas/loongarch/tlsdesc_32_abs.d
create mode 100644 gas/testsuite/gas/loongarch/tlsdesc_32_abs.s
create mode 100644 gas/testsuite/gas/loongarch/tlsdesc_64.d
create mode 100644 gas/testsuite/gas/loongarch/tlsdesc_64.s
create mode 100644 gas/testsuite/gas/loongarch/tlsdesc_large_abs.d
create mode 100644 gas/testsuite/gas/loongarch/tlsdesc_large_abs.s
create mode 100644 gas/testsuite/gas/loongarch/tlsdesc_large_pc.d
create mode 100644 gas/testsuite/gas/loongarch/tlsdesc_large_pc.s
create mode 100644 ld/testsuite/ld-loongarch-elf/desc-ie.d
create mode 100644 ld/testsuite/ld-loongarch-elf/desc-ie.s
create mode 100644 ld/testsuite/ld-loongarch-elf/desc-le.d
create mode 100644 ld/testsuite/ld-loongarch-elf/desc-le.s
create mode 100644 ld/testsuite/ld-loongarch-elf/desc-norelax.d
create mode 100644 ld/testsuite/ld-loongarch-elf/desc-norelax.s
create mode 100644 ld/testsuite/ld-loongarch-elf/desc-relax.d
create mode 100644 ld/testsuite/ld-loongarch-elf/desc-relax.s
create mode 100644 ld/testsuite/ld-loongarch-elf/ie-le.d
create mode 100644 ld/testsuite/ld-loongarch-elf/ie-le.s
create mode 100644 ld/testsuite/ld-loongarch-elf/tlsdesc-dso.d
create mode 100644 ld/testsuite/ld-loongarch-elf/tlsdesc-dso.s
Comments
On Fri, Dec 22, 2023 at 3:42 AM Lulu Cai <cailulu@loongson.cn> wrote: > > v5 mainly changes the relocation name and adds relocation > for immediate value field of ld.w/d. > > 1. R_LARCH_TLS_DESC_ADD_PC_LO12 -> R_LARCH_TLS_DESC_PC_LO12. > R_LARCH_TLS_DESC_LD(113) -> R_LARCH_TLS_DESC_LD(119) > > 2. Added 32 abs test case. > > 3. Added R_LARCH_TLS_DESC_LD relocation to the immediate field of > the ld.w/d instruction. > > Such as: > pcalau12i $r4,%desc_pc_hi20(var) > addi.d $r4,$r4,%desc_pc_lo12(var) > ld.d $r1,$r4,0 -> ld.d $r1,$r4,%desc_ld(var) > jirl $r1,$r1,%desc_call(var) > addi.d $a0,$a0,$tp > > Lulu Cai (4): > LoongArch: Add new relocs and macro for TLSDESC. > LoongArch: Add support for TLSDESC in ld. > LoongArch: Add tls transition support. > LoongArch: Add testsuit for DESC and tls transition and tls > relaxation. > > mengqinggang (1): > LoongArch: Add support for TLS LD/GD/DESC relaxation > > bfd/bfd-in2.h | 15 + > bfd/elfnn-loongarch.c | 552 +++++++++++++++++- > bfd/elfxx-loongarch.c | 270 ++++++++- > bfd/libbfd.h | 15 + > bfd/reloc.c | 36 ++ > gas/config/tc-loongarch.c | 20 +- > gas/testsuite/gas/loongarch/macro_op.d | 128 ++-- > gas/testsuite/gas/loongarch/macro_op_32.d | 120 ++-- > .../gas/loongarch/macro_op_large_abs.d | 160 ++--- > .../gas/loongarch/macro_op_large_pc.d | 160 ++--- > gas/testsuite/gas/loongarch/tlsdesc_32.d | 28 + > gas/testsuite/gas/loongarch/tlsdesc_32.s | 12 + > gas/testsuite/gas/loongarch/tlsdesc_32_abs.d | 26 + > gas/testsuite/gas/loongarch/tlsdesc_32_abs.s | 8 + > gas/testsuite/gas/loongarch/tlsdesc_64.d | 28 + > gas/testsuite/gas/loongarch/tlsdesc_64.s | 12 + > .../gas/loongarch/tlsdesc_large_abs.d | 34 ++ > .../gas/loongarch/tlsdesc_large_abs.s | 12 + > .../gas/loongarch/tlsdesc_large_pc.d | 38 ++ > .../gas/loongarch/tlsdesc_large_pc.s | 17 + > include/elf/loongarch.h | 26 +- > include/opcode/loongarch.h | 6 + > ld/testsuite/ld-loongarch-elf/desc-ie.d | 16 + > ld/testsuite/ld-loongarch-elf/desc-ie.s | 18 + > ld/testsuite/ld-loongarch-elf/desc-le.d | 15 + > ld/testsuite/ld-loongarch-elf/desc-le.s | 14 + > ld/testsuite/ld-loongarch-elf/desc-norelax.d | 16 + > ld/testsuite/ld-loongarch-elf/desc-norelax.s | 5 + > ld/testsuite/ld-loongarch-elf/desc-relax.d | 15 + > ld/testsuite/ld-loongarch-elf/desc-relax.s | 5 + > ld/testsuite/ld-loongarch-elf/ie-le.d | 13 + > ld/testsuite/ld-loongarch-elf/ie-le.s | 11 + > .../ld-loongarch-elf/ld-loongarch-elf.exp | 9 + > ld/testsuite/ld-loongarch-elf/macro_op.d | 391 +++++++------ > ld/testsuite/ld-loongarch-elf/macro_op_32.d | 120 ++-- > ld/testsuite/ld-loongarch-elf/tlsdesc-dso.d | 56 ++ > ld/testsuite/ld-loongarch-elf/tlsdesc-dso.s | 65 +++ > opcodes/loongarch-opc.c | 54 ++ > 38 files changed, 1980 insertions(+), 566 deletions(-) > create mode 100644 gas/testsuite/gas/loongarch/tlsdesc_32.d > create mode 100644 gas/testsuite/gas/loongarch/tlsdesc_32.s > create mode 100644 gas/testsuite/gas/loongarch/tlsdesc_32_abs.d > create mode 100644 gas/testsuite/gas/loongarch/tlsdesc_32_abs.s > create mode 100644 gas/testsuite/gas/loongarch/tlsdesc_64.d > create mode 100644 gas/testsuite/gas/loongarch/tlsdesc_64.s > create mode 100644 gas/testsuite/gas/loongarch/tlsdesc_large_abs.d > create mode 100644 gas/testsuite/gas/loongarch/tlsdesc_large_abs.s > create mode 100644 gas/testsuite/gas/loongarch/tlsdesc_large_pc.d > create mode 100644 gas/testsuite/gas/loongarch/tlsdesc_large_pc.s > create mode 100644 ld/testsuite/ld-loongarch-elf/desc-ie.d > create mode 100644 ld/testsuite/ld-loongarch-elf/desc-ie.s > create mode 100644 ld/testsuite/ld-loongarch-elf/desc-le.d > create mode 100644 ld/testsuite/ld-loongarch-elf/desc-le.s > create mode 100644 ld/testsuite/ld-loongarch-elf/desc-norelax.d > create mode 100644 ld/testsuite/ld-loongarch-elf/desc-norelax.s > create mode 100644 ld/testsuite/ld-loongarch-elf/desc-relax.d > create mode 100644 ld/testsuite/ld-loongarch-elf/desc-relax.s > create mode 100644 ld/testsuite/ld-loongarch-elf/ie-le.d > create mode 100644 ld/testsuite/ld-loongarch-elf/ie-le.s > create mode 100644 ld/testsuite/ld-loongarch-elf/tlsdesc-dso.d > create mode 100644 ld/testsuite/ld-loongarch-elf/tlsdesc-dso.s > > -- > 2.43.0 > Technically you could define R_LARCH_TLS_DESC to be shared by 32-bit and 64-bit arches, like RELATIVE/IRELATIVE/JUMP_SLOT. That said, I see that the change has been made. It seems that la.tls.desc expands to 4 instructions with 2 R_LARCH_RELAX relocations? I think one R_LARCH_RELAX is sufficient to implement relaxation. RISC-V has a similar problem and I have suggested https://github.com/riscv-non-isa/riscv-elf-psabi-doc/pull/421
On 1/27/24 10:54 AM, Fangrui Song wrote: > On Fri, Dec 22, 2023 at 3:42 AM Lulu Cai <cailulu@loongson.cn> wrote: >> v5 mainly changes the relocation name and adds relocation >> for immediate value field of ld.w/d. >> >> 1. R_LARCH_TLS_DESC_ADD_PC_LO12 -> R_LARCH_TLS_DESC_PC_LO12. >> R_LARCH_TLS_DESC_LD(113) -> R_LARCH_TLS_DESC_LD(119) >> >> 2. Added 32 abs test case. >> >> 3. Added R_LARCH_TLS_DESC_LD relocation to the immediate field of >> the ld.w/d instruction. >> >> Such as: >> pcalau12i $r4,%desc_pc_hi20(var) >> addi.d $r4,$r4,%desc_pc_lo12(var) >> ld.d $r1,$r4,0 -> ld.d $r1,$r4,%desc_ld(var) >> jirl $r1,$r1,%desc_call(var) >> addi.d $a0,$a0,$tp >> >> Lulu Cai (4): >> LoongArch: Add new relocs and macro for TLSDESC. >> LoongArch: Add support for TLSDESC in ld. >> LoongArch: Add tls transition support. >> LoongArch: Add testsuit for DESC and tls transition and tls >> relaxation. >> >> mengqinggang (1): >> LoongArch: Add support for TLS LD/GD/DESC relaxation >> >> bfd/bfd-in2.h | 15 + >> bfd/elfnn-loongarch.c | 552 +++++++++++++++++- >> bfd/elfxx-loongarch.c | 270 ++++++++- >> bfd/libbfd.h | 15 + >> bfd/reloc.c | 36 ++ >> gas/config/tc-loongarch.c | 20 +- >> gas/testsuite/gas/loongarch/macro_op.d | 128 ++-- >> gas/testsuite/gas/loongarch/macro_op_32.d | 120 ++-- >> .../gas/loongarch/macro_op_large_abs.d | 160 ++--- >> .../gas/loongarch/macro_op_large_pc.d | 160 ++--- >> gas/testsuite/gas/loongarch/tlsdesc_32.d | 28 + >> gas/testsuite/gas/loongarch/tlsdesc_32.s | 12 + >> gas/testsuite/gas/loongarch/tlsdesc_32_abs.d | 26 + >> gas/testsuite/gas/loongarch/tlsdesc_32_abs.s | 8 + >> gas/testsuite/gas/loongarch/tlsdesc_64.d | 28 + >> gas/testsuite/gas/loongarch/tlsdesc_64.s | 12 + >> .../gas/loongarch/tlsdesc_large_abs.d | 34 ++ >> .../gas/loongarch/tlsdesc_large_abs.s | 12 + >> .../gas/loongarch/tlsdesc_large_pc.d | 38 ++ >> .../gas/loongarch/tlsdesc_large_pc.s | 17 + >> include/elf/loongarch.h | 26 +- >> include/opcode/loongarch.h | 6 + >> ld/testsuite/ld-loongarch-elf/desc-ie.d | 16 + >> ld/testsuite/ld-loongarch-elf/desc-ie.s | 18 + >> ld/testsuite/ld-loongarch-elf/desc-le.d | 15 + >> ld/testsuite/ld-loongarch-elf/desc-le.s | 14 + >> ld/testsuite/ld-loongarch-elf/desc-norelax.d | 16 + >> ld/testsuite/ld-loongarch-elf/desc-norelax.s | 5 + >> ld/testsuite/ld-loongarch-elf/desc-relax.d | 15 + >> ld/testsuite/ld-loongarch-elf/desc-relax.s | 5 + >> ld/testsuite/ld-loongarch-elf/ie-le.d | 13 + >> ld/testsuite/ld-loongarch-elf/ie-le.s | 11 + >> .../ld-loongarch-elf/ld-loongarch-elf.exp | 9 + >> ld/testsuite/ld-loongarch-elf/macro_op.d | 391 +++++++------ >> ld/testsuite/ld-loongarch-elf/macro_op_32.d | 120 ++-- >> ld/testsuite/ld-loongarch-elf/tlsdesc-dso.d | 56 ++ >> ld/testsuite/ld-loongarch-elf/tlsdesc-dso.s | 65 +++ >> opcodes/loongarch-opc.c | 54 ++ >> 38 files changed, 1980 insertions(+), 566 deletions(-) >> create mode 100644 gas/testsuite/gas/loongarch/tlsdesc_32.d >> create mode 100644 gas/testsuite/gas/loongarch/tlsdesc_32.s >> create mode 100644 gas/testsuite/gas/loongarch/tlsdesc_32_abs.d >> create mode 100644 gas/testsuite/gas/loongarch/tlsdesc_32_abs.s >> create mode 100644 gas/testsuite/gas/loongarch/tlsdesc_64.d >> create mode 100644 gas/testsuite/gas/loongarch/tlsdesc_64.s >> create mode 100644 gas/testsuite/gas/loongarch/tlsdesc_large_abs.d >> create mode 100644 gas/testsuite/gas/loongarch/tlsdesc_large_abs.s >> create mode 100644 gas/testsuite/gas/loongarch/tlsdesc_large_pc.d >> create mode 100644 gas/testsuite/gas/loongarch/tlsdesc_large_pc.s >> create mode 100644 ld/testsuite/ld-loongarch-elf/desc-ie.d >> create mode 100644 ld/testsuite/ld-loongarch-elf/desc-ie.s >> create mode 100644 ld/testsuite/ld-loongarch-elf/desc-le.d >> create mode 100644 ld/testsuite/ld-loongarch-elf/desc-le.s >> create mode 100644 ld/testsuite/ld-loongarch-elf/desc-norelax.d >> create mode 100644 ld/testsuite/ld-loongarch-elf/desc-norelax.s >> create mode 100644 ld/testsuite/ld-loongarch-elf/desc-relax.d >> create mode 100644 ld/testsuite/ld-loongarch-elf/desc-relax.s >> create mode 100644 ld/testsuite/ld-loongarch-elf/ie-le.d >> create mode 100644 ld/testsuite/ld-loongarch-elf/ie-le.s >> create mode 100644 ld/testsuite/ld-loongarch-elf/tlsdesc-dso.d >> create mode 100644 ld/testsuite/ld-loongarch-elf/tlsdesc-dso.s >> >> -- >> 2.43.0 >> > Technically you could define R_LARCH_TLS_DESC to be shared by 32-bit > and 64-bit arches, like RELATIVE/IRELATIVE/JUMP_SLOT. > That said, I see that the change has been made. Yes that's totally fine. The main reason here is because other TLS types of dynamic relocation have 32-bit and 64-bit, so DESC is distinguished. > It seems that la.tls.desc expands to 4 instructions with 2 > R_LARCH_RELAX relocations? > I think one R_LARCH_RELAX is sufficient to implement relaxation. > > RISC-V has a similar problem and I have suggested > https://github.com/riscv-non-isa/riscv-elf-psabi-doc/pull/421 This is done because the current psABI stipulates that the instruction to be deleted must be followed by an R_LARCH_RELAX relocation. In the future, we will try to implement la.tls.desc with four instructions using only one R_LARCH_RELAX implementation.
On Fri, Jan 26, 2024 at 11:26 PM Lulu Cai <cailulu@loongson.cn> wrote: > > On 1/27/24 10:54 AM, Fangrui Song wrote: > > On Fri, Dec 22, 2023 at 3:42 AM Lulu Cai <cailulu@loongson.cn> wrote: > >> v5 mainly changes the relocation name and adds relocation > >> for immediate value field of ld.w/d. > >> > >> 1. R_LARCH_TLS_DESC_ADD_PC_LO12 -> R_LARCH_TLS_DESC_PC_LO12. > >> R_LARCH_TLS_DESC_LD(113) -> R_LARCH_TLS_DESC_LD(119) > >> > >> 2. Added 32 abs test case. > >> > >> 3. Added R_LARCH_TLS_DESC_LD relocation to the immediate field of > >> the ld.w/d instruction. > >> > >> Such as: > >> pcalau12i $r4,%desc_pc_hi20(var) > >> addi.d $r4,$r4,%desc_pc_lo12(var) > >> ld.d $r1,$r4,0 -> ld.d $r1,$r4,%desc_ld(var) > >> jirl $r1,$r1,%desc_call(var) > >> addi.d $a0,$a0,$tp > >> > >> Lulu Cai (4): > >> LoongArch: Add new relocs and macro for TLSDESC. > >> LoongArch: Add support for TLSDESC in ld. > >> LoongArch: Add tls transition support. > >> LoongArch: Add testsuit for DESC and tls transition and tls > >> relaxation. > >> > >> mengqinggang (1): > >> LoongArch: Add support for TLS LD/GD/DESC relaxation > >> > >> bfd/bfd-in2.h | 15 + > >> bfd/elfnn-loongarch.c | 552 +++++++++++++++++- > >> bfd/elfxx-loongarch.c | 270 ++++++++- > >> bfd/libbfd.h | 15 + > >> bfd/reloc.c | 36 ++ > >> gas/config/tc-loongarch.c | 20 +- > >> gas/testsuite/gas/loongarch/macro_op.d | 128 ++-- > >> gas/testsuite/gas/loongarch/macro_op_32.d | 120 ++-- > >> .../gas/loongarch/macro_op_large_abs.d | 160 ++--- > >> .../gas/loongarch/macro_op_large_pc.d | 160 ++--- > >> gas/testsuite/gas/loongarch/tlsdesc_32.d | 28 + > >> gas/testsuite/gas/loongarch/tlsdesc_32.s | 12 + > >> gas/testsuite/gas/loongarch/tlsdesc_32_abs.d | 26 + > >> gas/testsuite/gas/loongarch/tlsdesc_32_abs.s | 8 + > >> gas/testsuite/gas/loongarch/tlsdesc_64.d | 28 + > >> gas/testsuite/gas/loongarch/tlsdesc_64.s | 12 + > >> .../gas/loongarch/tlsdesc_large_abs.d | 34 ++ > >> .../gas/loongarch/tlsdesc_large_abs.s | 12 + > >> .../gas/loongarch/tlsdesc_large_pc.d | 38 ++ > >> .../gas/loongarch/tlsdesc_large_pc.s | 17 + > >> include/elf/loongarch.h | 26 +- > >> include/opcode/loongarch.h | 6 + > >> ld/testsuite/ld-loongarch-elf/desc-ie.d | 16 + > >> ld/testsuite/ld-loongarch-elf/desc-ie.s | 18 + > >> ld/testsuite/ld-loongarch-elf/desc-le.d | 15 + > >> ld/testsuite/ld-loongarch-elf/desc-le.s | 14 + > >> ld/testsuite/ld-loongarch-elf/desc-norelax.d | 16 + > >> ld/testsuite/ld-loongarch-elf/desc-norelax.s | 5 + > >> ld/testsuite/ld-loongarch-elf/desc-relax.d | 15 + > >> ld/testsuite/ld-loongarch-elf/desc-relax.s | 5 + > >> ld/testsuite/ld-loongarch-elf/ie-le.d | 13 + > >> ld/testsuite/ld-loongarch-elf/ie-le.s | 11 + > >> .../ld-loongarch-elf/ld-loongarch-elf.exp | 9 + > >> ld/testsuite/ld-loongarch-elf/macro_op.d | 391 +++++++------ > >> ld/testsuite/ld-loongarch-elf/macro_op_32.d | 120 ++-- > >> ld/testsuite/ld-loongarch-elf/tlsdesc-dso.d | 56 ++ > >> ld/testsuite/ld-loongarch-elf/tlsdesc-dso.s | 65 +++ > >> opcodes/loongarch-opc.c | 54 ++ > >> 38 files changed, 1980 insertions(+), 566 deletions(-) > >> create mode 100644 gas/testsuite/gas/loongarch/tlsdesc_32.d > >> create mode 100644 gas/testsuite/gas/loongarch/tlsdesc_32.s > >> create mode 100644 gas/testsuite/gas/loongarch/tlsdesc_32_abs.d > >> create mode 100644 gas/testsuite/gas/loongarch/tlsdesc_32_abs.s > >> create mode 100644 gas/testsuite/gas/loongarch/tlsdesc_64.d > >> create mode 100644 gas/testsuite/gas/loongarch/tlsdesc_64.s > >> create mode 100644 gas/testsuite/gas/loongarch/tlsdesc_large_abs.d > >> create mode 100644 gas/testsuite/gas/loongarch/tlsdesc_large_abs.s > >> create mode 100644 gas/testsuite/gas/loongarch/tlsdesc_large_pc.d > >> create mode 100644 gas/testsuite/gas/loongarch/tlsdesc_large_pc.s > >> create mode 100644 ld/testsuite/ld-loongarch-elf/desc-ie.d > >> create mode 100644 ld/testsuite/ld-loongarch-elf/desc-ie.s > >> create mode 100644 ld/testsuite/ld-loongarch-elf/desc-le.d > >> create mode 100644 ld/testsuite/ld-loongarch-elf/desc-le.s > >> create mode 100644 ld/testsuite/ld-loongarch-elf/desc-norelax.d > >> create mode 100644 ld/testsuite/ld-loongarch-elf/desc-norelax.s > >> create mode 100644 ld/testsuite/ld-loongarch-elf/desc-relax.d > >> create mode 100644 ld/testsuite/ld-loongarch-elf/desc-relax.s > >> create mode 100644 ld/testsuite/ld-loongarch-elf/ie-le.d > >> create mode 100644 ld/testsuite/ld-loongarch-elf/ie-le.s > >> create mode 100644 ld/testsuite/ld-loongarch-elf/tlsdesc-dso.d > >> create mode 100644 ld/testsuite/ld-loongarch-elf/tlsdesc-dso.s > >> > >> -- > >> 2.43.0 > >> > > Technically you could define R_LARCH_TLS_DESC to be shared by 32-bit > > and 64-bit arches, like RELATIVE/IRELATIVE/JUMP_SLOT. > > That said, I see that the change has been made. > > > Yes that's totally fine. The main reason here is because other TLS types of > > dynamic relocation have 32-bit and 64-bit, so DESC is distinguished. > > > > It seems that la.tls.desc expands to 4 instructions with 2 > > R_LARCH_RELAX relocations? > > I think one R_LARCH_RELAX is sufficient to implement relaxation. > > > > RISC-V has a similar problem and I have suggested > > https://github.com/riscv-non-isa/riscv-elf-psabi-doc/pull/421 > > > This is done because the current psABI stipulates that the instruction > > to be deleted must be followed by an R_LARCH_RELAX relocation. > > In the future, we will try to implement la.tls.desc with four instructions > > using only one R_LARCH_RELAX implementation. Thanks for the answer. I am looking forward to one fewer R_LARCH_RELAX.