mbox series

[0/3] aarch64: Add support for the Armv9.4-a LSE128 extension

Message ID 20231106131301.2576862-1-victor.donascimento@arm.com
Headers
Series aarch64: Add support for the Armv9.4-a LSE128 extension |

Message

Victor Do Nascimento Nov. 6, 2023, 1:12 p.m. UTC 
  Add support for the 128-bit Atomic Instructions extension, also known
and referred to as LSE128 and which is made optional from Armv9.4-a
onward.

The feature is enabled by passing the +lse128 option to -march
(eg: -march=armv9.4-a+lse128) or using the ".arch_extension lse128"
directive in the assembly file.  Given that the implementation of the
LSE128 feature requires that the LSE feature is also present, the
+lse128 option also implicitly enables the +lse feature.

LSE128 adds support for the following new 128-bit atomic instructions:

  * Atomic bit clear on quadword in memory (ldclrp{a|l|al});
  * Atomic bit set on quadword in memory (ldsetp{a|l|al});
  * Swap quadword in memory (swpp{a|l|al});

Regression testing for aarch64-none-linux-gnu target with no regressions.

Victor Do Nascimento (3):
  aarch64: Add LSE128 instruction operand support
  aarch64: Add arch support for LSE128 extension
  aarch64: Add LSE128 instructions

 gas/config/tc-aarch64.c                   |  6 +++++
 gas/doc/c-aarch64.texi                    |  2 ++
 gas/testsuite/gas/aarch64/lse128-atomic.d | 32 ++++++++++++++++++++++
 gas/testsuite/gas/aarch64/lse128-atomic.s | 33 +++++++++++++++++++++++
 include/opcode/aarch64.h                  |  5 ++++
 opcodes/aarch64-opc.c                     |  4 +++
 opcodes/aarch64-opc.h                     |  2 ++
 opcodes/aarch64-tbl.h                     | 20 ++++++++++++++
 8 files changed, 104 insertions(+)
 create mode 100644 gas/testsuite/gas/aarch64/lse128-atomic.d
 create mode 100644 gas/testsuite/gas/aarch64/lse128-atomic.s

Comments

Nick Clifton Nov. 7, 2023, 11:08 a.m. UTC | #1 
Hi Victor,

> Add support for the 128-bit Atomic Instructions extension, also known
> and referred to as LSE128 and which is made optional from Armv9.4-a
> onward.
> 
> The feature is enabled by passing the +lse128 option to -march
> (eg: -march=armv9.4-a+lse128) or using the ".arch_extension lse128"
> directive in the assembly file.  Given that the implementation of the
> LSE128 feature requires that the LSE feature is also present, the
> +lse128 option also implicitly enables the +lse feature.
> 
> LSE128 adds support for the following new 128-bit atomic instructions:
> 
>    * Atomic bit clear on quadword in memory (ldclrp{a|l|al});
>    * Atomic bit set on quadword in memory (ldsetp{a|l|al});
>    * Swap quadword in memory (swpp{a|l|al});
> 
> Regression testing for aarch64-none-linux-gnu target with no regressions.
> 
> Victor Do Nascimento (3):
>    aarch64: Add LSE128 instruction operand support
>    aarch64: Add arch support for LSE128 extension
>    aarch64: Add LSE128 instructions
> 
>   gas/config/tc-aarch64.c                   |  6 +++++
>   gas/doc/c-aarch64.texi                    |  2 ++
>   gas/testsuite/gas/aarch64/lse128-atomic.d | 32 ++++++++++++++++++++++
>   gas/testsuite/gas/aarch64/lse128-atomic.s | 33 +++++++++++++++++++++++
>   include/opcode/aarch64.h                  |  5 ++++
>   opcodes/aarch64-opc.c                     |  4 +++
>   opcodes/aarch64-opc.h                     |  2 ++
>   opcodes/aarch64-tbl.h                     | 20 ++++++++++++++

Patch series approved - please apply - but please could also add an
entry to the gas/NEWS file mentioning the support of this new feature.

Cheers
   Nick