diff mbox series

Computing x86 ISA level at configure time

Message ID 874jbrc39i.fsf@oldenburg.str.redhat.com
State Not applicable
Headers
Series Computing x86 ISA level at configure time |

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Commit Message

Florian Weimer April 23, 2024, 7:01 p.m. UTC 
  I'm trying to build glibc with these configure arguments:

  CC="gcc -march=x86-64-v3" CXX="g++ -march=x86-64-v3" \
  --with-rtld-early-cflags=-march=x86-64

It does not quite work because the ld.so trampolines are now initialized
early, and at that point, -march=x86-64 is in effect.  I tried to move
the computation to the configure state, so that it is frozen using the
default (not early) CC/CFLAGS combination.  I've got a prototype patch,
but I've trouble understanding the meaning of “baseline” vs the other
options.  Any suggestions how to proceed?

Thanks,
Florian

Comments

H.J. Lu April 23, 2024, 7:03 p.m. UTC | #1 
On Tue, Apr 23, 2024 at 12:01 PM Florian Weimer <fweimer@redhat.com> wrote:
>
> I'm trying to build glibc with these configure arguments:
>
>   CC="gcc -march=x86-64-v3" CXX="g++ -march=x86-64-v3" \
>   --with-rtld-early-cflags=-march=x86-64
>
> It does not quite work because the ld.so trampolines are now initialized
> early, and at that point, -march=x86-64 is in effect.  I tried to move
> the computation to the configure state, so that it is frozen using the
> default (not early) CC/CFLAGS combination.  I've got a prototype patch,
> but I've trouble understanding the meaning of “baseline” vs the other
> options.  Any suggestions how to proceed?
>

Can you open a glibc bug report, and CC Sunil and me?

Thanks.
Florian Weimer April 23, 2024, 7:15 p.m. UTC | #2 
* H. J. Lu:

> On Tue, Apr 23, 2024 at 12:01 PM Florian Weimer <fweimer@redhat.com> wrote:
>>
>> I'm trying to build glibc with these configure arguments:
>>
>>   CC="gcc -march=x86-64-v3" CXX="g++ -march=x86-64-v3" \
>>   --with-rtld-early-cflags=-march=x86-64
>>
>> It does not quite work because the ld.so trampolines are now initialized
>> early, and at that point, -march=x86-64 is in effect.  I tried to move
>> the computation to the configure state, so that it is frozen using the
>> default (not early) CC/CFLAGS combination.  I've got a prototype patch,
>> but I've trouble understanding the meaning of “baseline” vs the other
>> options.  Any suggestions how to proceed?
>>
>
> Can you open a glibc bug report, and CC Sunil and me?

Sure, it's this bug:

  Configuring with CC="gcc -march=x86-64-v3"
  --with-rtld-early-cflags=-march=x86-64 results in linker failure
  <https://sourceware.org/bugzilla/show_bug.cgi?id=31676>

Thanks,
Florian
diff mbox series

Patch

diff --git a/config.h.in b/config.h.in
index 69ac450356..602dd639eb 100644
--- a/config.h.in
+++ b/config.h.in
@@ -285,6 +285,9 @@ 
 /* Define if x86 ISA level should be included in shared libraries.  */
 #undef INCLUDE_X86_ISA_LEVEL
 
+/* The x86-64 ISA level.  0 for baseline.  Undefined on non-x86-64.  */
+#undef MINIMUM_X86_ISA_LEVEL
+
 /* Define if -msahf is enabled by default on x86.  */
 #undef HAVE_X86_LAHF_SAHF
 
diff --git a/sysdeps/x86/configure b/sysdeps/x86/configure
index 2a5421bb31..559adaa1c7 100644
--- a/sysdeps/x86/configure
+++ b/sysdeps/x86/configure
@@ -131,26 +131,61 @@  if test ${libc_cv_have_x86_isa_level+y}
 then :
   printf %s "(cached) " >&6
 else $as_nop
-  cat > conftest.c <<EOF
-#include <sysdeps/x86/isa-level.h>
-#if MINIMUM_X86_ISA_LEVEL >= 4
-libc_cv_have_x86_isa_level=4
-#elif MINIMUM_X86_ISA_LEVEL == 3
-libc_cv_have_x86_isa_level=3
-#elif MINIMUM_X86_ISA_LEVEL == 2
-libc_cv_have_x86_isa_level=2
+  cat > conftest.c <<'EOF'
+#if defined __SSE__ && defined __SSE2__
+/* NB: ISAs, excluding MMX, in x86-64 ISA level baseline are used.  */
+# define __X86_ISA_V1 1
 #else
-libc_cv_have_x86_isa_level=baseline
+# define __X86_ISA_V1 0
 #endif
+
+#if __X86_ISA_V1 && defined __GCC_HAVE_SYNC_COMPARE_AND_SWAP_16               \
+    && defined HAVE_X86_LAHF_SAHF && defined __POPCNT__ && defined __SSE3__   \
+    && defined __SSSE3__ && defined __SSE4_1__ && defined __SSE4_2__
+/* NB: ISAs in x86-64 ISA level v2 are used.  */
+# define __X86_ISA_V2 1
+#else
+# define __X86_ISA_V2 0
+#endif
+
+#if __X86_ISA_V2 && defined __AVX__ && defined __AVX2__ && defined __F16C__   \
+    && defined __FMA__ && defined __LZCNT__ && defined HAVE_X86_MOVBE         \
+    && defined __BMI__ && defined __BMI2__
+/* NB: ISAs in x86-64 ISA level v3 are used.  */
+# define __X86_ISA_V3 1
+#else
+# define __X86_ISA_V3 0
+#endif
+
+#if __X86_ISA_V3 && defined __AVX512F__ && defined __AVX512BW__               \
+    && defined __AVX512CD__ && defined __AVX512DQ__ && defined __AVX512VL__
+/* NB: ISAs in x86-64 ISA level v4 are used.  */
+# define __X86_ISA_V4 1
+#else
+# define __X86_ISA_V4 0
+#endif
+
+void
+emit_constant ()
+{
+  asm ("/* libc_cv_have_x86_isa_level=%c0 */"
+       :: "i" (__X86_ISA_V1 + __X86_ISA_V2 + __X86_ISA_V3 + __X86_ISA_V4));
+}
 EOF
-		 eval `${CC-cc} $CFLAGS $CPPFLAGS $ISAFLAG -I$srcdir -E conftest.c | grep libc_cv_have_x86_isa_level`
+${CC-cc} $CFLAGS $CPPFLAGS $ISAFLAG -S -o- conftest.c | grep -o 'libc_cv_have_x86_isa_level=0-9'
+		 eval `${CC-cc} $CFLAGS $CPPFLAGS $ISAFLAG -S -o- conftest.c | grep -o 'libc_cv_have_x86_isa_level=0-9'`
 		 rm -rf conftest*
 fi
 { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $libc_cv_have_x86_isa_level" >&5
 printf "%s\n" "$libc_cv_have_x86_isa_level" >&6; }
+  if test -z "$libc_cv_have_x86_isa_level" ; then
+    as_fn_error $? "Could not determine x86 ISA level" "$LINENO" 5
+  fi
 else
-  libc_cv_have_x86_isa_level=baseline
+  libc_cv_have_x86_isa_level=0
 fi
+printf "%s\n" "#define MINIMUM_X86_ISA_LEVEL $libc_cv_have_x86_isa_level" >>confdefs.h
+
 config_vars="$config_vars
 have-x86-isa-level = $libc_cv_have_x86_isa_level"
 config_vars="$config_vars
diff --git a/sysdeps/x86/configure.ac b/sysdeps/x86/configure.ac
index 78ff7c8f41..f9ba5f583e 100644
--- a/sysdeps/x86/configure.ac
+++ b/sysdeps/x86/configure.ac
@@ -88,23 +88,57 @@  if test $libc_cv_include_x86_isa_level = yes; then
   # Check for ISA level support.
   AC_CACHE_CHECK([for ISA level support],
 		 libc_cv_have_x86_isa_level, [dnl
-cat > conftest.c <<EOF
-#include <sysdeps/x86/isa-level.h>
-#if MINIMUM_X86_ISA_LEVEL >= 4
-libc_cv_have_x86_isa_level=4
-#elif MINIMUM_X86_ISA_LEVEL == 3
-libc_cv_have_x86_isa_level=3
-#elif MINIMUM_X86_ISA_LEVEL == 2
-libc_cv_have_x86_isa_level=2
+cat > conftest.c <<'EOF'
+#if defined __SSE__ && defined __SSE2__
+/* NB: ISAs, excluding MMX, in x86-64 ISA level baseline are used.  */
+# define __X86_ISA_V1 1
 #else
-libc_cv_have_x86_isa_level=baseline
+# define __X86_ISA_V1 0
 #endif
+
+#if __X86_ISA_V1 && defined __GCC_HAVE_SYNC_COMPARE_AND_SWAP_16               \
+    && defined HAVE_X86_LAHF_SAHF && defined __POPCNT__ && defined __SSE3__   \
+    && defined __SSSE3__ && defined __SSE4_1__ && defined __SSE4_2__
+/* NB: ISAs in x86-64 ISA level v2 are used.  */
+# define __X86_ISA_V2 1
+#else
+# define __X86_ISA_V2 0
+#endif
+
+#if __X86_ISA_V2 && defined __AVX__ && defined __AVX2__ && defined __F16C__   \
+    && defined __FMA__ && defined __LZCNT__ && defined HAVE_X86_MOVBE         \
+    && defined __BMI__ && defined __BMI2__
+/* NB: ISAs in x86-64 ISA level v3 are used.  */
+# define __X86_ISA_V3 1
+#else
+# define __X86_ISA_V3 0
+#endif
+
+#if __X86_ISA_V3 && defined __AVX512F__ && defined __AVX512BW__               \
+    && defined __AVX512CD__ && defined __AVX512DQ__ && defined __AVX512VL__
+/* NB: ISAs in x86-64 ISA level v4 are used.  */
+# define __X86_ISA_V4 1
+#else
+# define __X86_ISA_V4 0
+#endif
+
+void
+emit_constant ()
+{
+  asm ("/* libc_cv_have_x86_isa_level=%c0 */"
+       :: "i" (__X86_ISA_V1 + __X86_ISA_V2 + __X86_ISA_V3 + __X86_ISA_V4));
+}
 EOF
-		 eval `${CC-cc} $CFLAGS $CPPFLAGS $ISAFLAG -I$srcdir -E conftest.c | grep libc_cv_have_x86_isa_level`
+${CC-cc} $CFLAGS $CPPFLAGS $ISAFLAG -S -o- conftest.c | grep -o 'libc_cv_have_x86_isa_level=[0-9]'
+		 eval `${CC-cc} $CFLAGS $CPPFLAGS $ISAFLAG -S -o- conftest.c | grep -o 'libc_cv_have_x86_isa_level=[0-9]'`
 		 rm -rf conftest*])
+  if test -z "$libc_cv_have_x86_isa_level" ; then
+    AC_MSG_ERROR([Could not determine x86 ISA level])
+  fi
 else
-  libc_cv_have_x86_isa_level=baseline
+  libc_cv_have_x86_isa_level=0
 fi
+AC_DEFINE_UNQUOTED([MINIMUM_X86_ISA_LEVEL], [$libc_cv_have_x86_isa_level])
 LIBC_CONFIG_VAR([have-x86-isa-level], [$libc_cv_have_x86_isa_level])
 LIBC_CONFIG_VAR([x86-isa-level-3-or-above], [3 4])
 LIBC_CONFIG_VAR([enable-x86-isa-level], [$libc_cv_include_x86_isa_level])
diff --git a/sysdeps/x86/isa-level.h b/sysdeps/x86/isa-level.h
index 11fe1ca90c..c116ded2d8 100644
--- a/sysdeps/x86/isa-level.h
+++ b/sysdeps/x86/isa-level.h
@@ -28,42 +28,6 @@ 
 #ifndef _ISA_LEVEL_H
 #define _ISA_LEVEL_H
 
-#if defined __SSE__ && defined __SSE2__
-/* NB: ISAs, excluding MMX, in x86-64 ISA level baseline are used.  */
-# define __X86_ISA_V1 1
-#else
-# define __X86_ISA_V1 0
-#endif
-
-#if __X86_ISA_V1 && defined __GCC_HAVE_SYNC_COMPARE_AND_SWAP_16               \
-    && defined HAVE_X86_LAHF_SAHF && defined __POPCNT__ && defined __SSE3__   \
-    && defined __SSSE3__ && defined __SSE4_1__ && defined __SSE4_2__
-/* NB: ISAs in x86-64 ISA level v2 are used.  */
-# define __X86_ISA_V2 1
-#else
-# define __X86_ISA_V2 0
-#endif
-
-#if __X86_ISA_V2 && defined __AVX__ && defined __AVX2__ && defined __F16C__   \
-    && defined __FMA__ && defined __LZCNT__ && defined HAVE_X86_MOVBE         \
-    && defined __BMI__ && defined __BMI2__
-/* NB: ISAs in x86-64 ISA level v3 are used.  */
-# define __X86_ISA_V3 1
-#else
-# define __X86_ISA_V3 0
-#endif
-
-#if __X86_ISA_V3 && defined __AVX512F__ && defined __AVX512BW__               \
-    && defined __AVX512CD__ && defined __AVX512DQ__ && defined __AVX512VL__
-/* NB: ISAs in x86-64 ISA level v4 are used.  */
-# define __X86_ISA_V4 1
-#else
-# define __X86_ISA_V4 0
-#endif
-
-#define MINIMUM_X86_ISA_LEVEL                                                 \
-  (__X86_ISA_V1 + __X86_ISA_V2 + __X86_ISA_V3 + __X86_ISA_V4)
-
 /* Depending on the minimum ISA level, a feature check result can be a
    compile-time constant.. */