<sys/platform/x86.h>: Add APX support
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Commit Message
Add support for Intel Advanced Performance Extensions:
https://www.intel.com/content/www/us/en/developer/articles/technical/advanced-performance-extensions-apx.html
to <sys/platform/x86.h>.
---
manual/platform.texi | 3 +++
sysdeps/x86/bits/platform/x86.h | 1 +
sysdeps/x86/cpu-features.c | 4 ++++
sysdeps/x86/include/cpu-features.h | 4 ++++
sysdeps/x86/tst-get-cpu-features.c | 2 ++
5 files changed, 14 insertions(+)
Comments
* H. J. Lu via Libc-alpha:
> diff --git a/sysdeps/x86/cpu-features.c b/sysdeps/x86/cpu-features.c
> index 9ac195810f..376e3c7501 100644
> --- a/sysdeps/x86/cpu-features.c
> +++ b/sysdeps/x86/cpu-features.c
> @@ -226,6 +226,10 @@ update_active (struct cpu_features *cpu_features)
> CPU_FEATURE_SET_ACTIVE (cpu_features, AMX_COMPLEX);
> }
>
> + /* Is AVX state usable? */
> + if ((xcrlow & bit_AVX_state) != 0)
> + CPU_FEATURE_SET_ACTIVE (cpu_features, APX_F);
> +
> /* These features are usable only when OSXSAVE is enabled. */
> CPU_FEATURE_SET (cpu_features, XSAVE);
> CPU_FEATURE_SET_ACTIVE (cpu_features, XSAVEOPT);
AVX vs APX looks like a typo, this needs a comment.
Will this really work without further kernel enablement? Finally a
compelling use case for MPX. 8-)
Thanks,
Floria
On Tue, Jul 25, 2023 at 12:55 PM Florian Weimer <fweimer@redhat.com> wrote:
>
> * H. J. Lu via Libc-alpha:
>
> > diff --git a/sysdeps/x86/cpu-features.c b/sysdeps/x86/cpu-features.c
> > index 9ac195810f..376e3c7501 100644
> > --- a/sysdeps/x86/cpu-features.c
> > +++ b/sysdeps/x86/cpu-features.c
> > @@ -226,6 +226,10 @@ update_active (struct cpu_features *cpu_features)
> > CPU_FEATURE_SET_ACTIVE (cpu_features, AMX_COMPLEX);
> > }
> >
> > + /* Is AVX state usable? */
> > + if ((xcrlow & bit_AVX_state) != 0)
> > + CPU_FEATURE_SET_ACTIVE (cpu_features, APX_F);
> > +
> > /* These features are usable only when OSXSAVE is enabled. */
> > CPU_FEATURE_SET (cpu_features, XSAVE);
> > CPU_FEATURE_SET_ACTIVE (cpu_features, XSAVEOPT);
>
> AVX vs APX looks like a typo, this needs a comment.
Will be fixed.
> Will this really work without further kernel enablement? Finally a
The bit_AVX_state bit should be set by kernel. I think APX needs
some kernel support.
> compelling use case for MPX. 8-)
>
> Thanks,
> Floria
>
On Tue, Jul 25, 2023 at 3:17 PM H.J. Lu via Libc-alpha
<libc-alpha@sourceware.org> wrote:
>
> On Tue, Jul 25, 2023 at 12:55 PM Florian Weimer <fweimer@redhat.com> wrote:
> >
> > * H. J. Lu via Libc-alpha:
> >
> > > diff --git a/sysdeps/x86/cpu-features.c b/sysdeps/x86/cpu-features.c
> > > index 9ac195810f..376e3c7501 100644
> > > --- a/sysdeps/x86/cpu-features.c
> > > +++ b/sysdeps/x86/cpu-features.c
> > > @@ -226,6 +226,10 @@ update_active (struct cpu_features *cpu_features)
> > > CPU_FEATURE_SET_ACTIVE (cpu_features, AMX_COMPLEX);
> > > }
> > >
> > > + /* Is AVX state usable? */
> > > + if ((xcrlow & bit_AVX_state) != 0)
> > > + CPU_FEATURE_SET_ACTIVE (cpu_features, APX_F);
> > > +
Isn't the APX state bigger than the AVX state?
> > > /* These features are usable only when OSXSAVE is enabled. */
> > > CPU_FEATURE_SET (cpu_features, XSAVE);
> > > CPU_FEATURE_SET_ACTIVE (cpu_features, XSAVEOPT);
> >
> > AVX vs APX looks like a typo, this needs a comment.
>
> Will be fixed.
>
> > Will this really work without further kernel enablement? Finally a
>
> The bit_AVX_state bit should be set by kernel. I think APX needs
> some kernel support.
>
> > compelling use case for MPX. 8-)
> >
> > Thanks,
> > Floria
> >
>
>
> --
> H.J.
* Noah Goldstein:
> On Tue, Jul 25, 2023 at 3:17 PM H.J. Lu via Libc-alpha
> <libc-alpha@sourceware.org> wrote:
>>
>> On Tue, Jul 25, 2023 at 12:55 PM Florian Weimer <fweimer@redhat.com> wrote:
>> >
>> > * H. J. Lu via Libc-alpha:
>> >
>> > > diff --git a/sysdeps/x86/cpu-features.c b/sysdeps/x86/cpu-features.c
>> > > index 9ac195810f..376e3c7501 100644
>> > > --- a/sysdeps/x86/cpu-features.c
>> > > +++ b/sysdeps/x86/cpu-features.c
>> > > @@ -226,6 +226,10 @@ update_active (struct cpu_features *cpu_features)
>> > > CPU_FEATURE_SET_ACTIVE (cpu_features, AMX_COMPLEX);
>> > > }
>> > >
>> > > + /* Is AVX state usable? */
>> > > + if ((xcrlow & bit_AVX_state) != 0)
>> > > + CPU_FEATURE_SET_ACTIVE (cpu_features, APX_F);
>> > > +
>
> Isn't the APX state bigger than the AVX state?
There is this:
| • EBX (Offset in bytes in XSAVE/XRSTOR area for this feature)
| – 960 (0x3C0).
| * Intel® APX is feature index 19 in XCR0.
| * Intel® APX is architected to re-use the deprecated area of Intel® MPX.
<https://www.intel.com/content/www/us/en/content-details/784266/intel-advanced-performance-extensions-intel-apx-architecture-specification.html>
But the “AVX” is really a typo for APX here—bit_AVX_state is bit 19, the
APX bit.
Thanks,
Florian
@@ -209,6 +209,9 @@ The supported processor features are:
@item
@code{AMX_TILE} -- Tile architecture.
+@item
+@code{APX_F} -- The APX instruction extensions.
+
@item
@code{ARCH_CAPABILITIES} -- IA32_ARCH_CAPABILITIES MSR.
@@ -312,6 +312,7 @@ enum
x86_cpu_AVX_NE_CONVERT = x86_cpu_index_7_ecx_1_edx + 5,
x86_cpu_AMX_COMPLEX = x86_cpu_index_7_ecx_1_edx + 8,
x86_cpu_PREFETCHI = x86_cpu_index_7_ecx_1_edx + 14,
+ x86_cpu_APX_F = x86_cpu_index_7_ecx_1_edx + 21,
x86_cpu_index_19_ebx
= (CPUID_INDEX_19 * 8 * 4 * sizeof (unsigned int)
@@ -226,6 +226,10 @@ update_active (struct cpu_features *cpu_features)
CPU_FEATURE_SET_ACTIVE (cpu_features, AMX_COMPLEX);
}
+ /* Is AVX state usable? */
+ if ((xcrlow & bit_AVX_state) != 0)
+ CPU_FEATURE_SET_ACTIVE (cpu_features, APX_F);
+
/* These features are usable only when OSXSAVE is enabled. */
CPU_FEATURE_SET (cpu_features, XSAVE);
CPU_FEATURE_SET_ACTIVE (cpu_features, XSAVEOPT);
@@ -319,6 +319,7 @@ enum
#define bit_cpu_AVX_NE_CONVERT (1u << 5)
#define bit_cpu_AMX_COMPLEX (1u << 8)
#define bit_cpu_PREFETCHI (1u << 14)
+#define bit_cpu_APX_F (1u << 21)
/* CPUID_INDEX_19. */
@@ -562,6 +563,7 @@ enum
#define index_cpu_AVX_NE_CONVERT CPUID_INDEX_7_ECX_1
#define index_cpu_AMX_COMPLEX CPUID_INDEX_7_ECX_1
#define index_cpu_PREFETCHI CPUID_INDEX_7_ECX_1
+#define index_cpu_APX_F CPUID_INDEX_7_ECX_1
/* CPUID_INDEX_19. */
@@ -807,6 +809,7 @@ enum
#define reg_AVX_NE_CONVERT edx
#define reg_AMX_COMPLEX edx
#define reg_PREFETCHI edx
+#define reg_APX_F edx
/* CPUID_INDEX_19. */
@@ -845,6 +848,7 @@ enum
#define bit_ZMM16_31_state (1u << 7)
#define bit_XTILECFG_state (1u << 17)
#define bit_XTILEDATA_state (1u << 18)
+#define bit_AVX_state (1u << 19)
enum cpu_features_kind
{
@@ -219,6 +219,7 @@ do_test (void)
CHECK_CPU_FEATURE_PRESENT (AVX_NE_CONVERT);
CHECK_CPU_FEATURE_PRESENT (AMX_COMPLEX);
CHECK_CPU_FEATURE_PRESENT (PREFETCHI);
+ CHECK_CPU_FEATURE_PRESENT (APX_F);
CHECK_CPU_FEATURE_PRESENT (AESKLE);
CHECK_CPU_FEATURE_PRESENT (WIDE_KL);
CHECK_CPU_FEATURE_PRESENT (PTWRITE);
@@ -390,6 +391,7 @@ do_test (void)
CHECK_CPU_FEATURE_ACTIVE (AVX_NE_CONVERT);
CHECK_CPU_FEATURE_ACTIVE (AMX_COMPLEX);
CHECK_CPU_FEATURE_ACTIVE (PREFETCHI);
+ CHECK_CPU_FEATURE_ACTIVE (APX_F);
CHECK_CPU_FEATURE_ACTIVE (AESKLE);
CHECK_CPU_FEATURE_ACTIVE (WIDE_KL);
CHECK_CPU_FEATURE_ACTIVE (PTWRITE);