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[v3] riscv: Add macros for FPUCW/fcsr in fpu_control.h

Message ID 20230405175108.17815-1-shiqi@isrc.iscas.ac.cn
State New
Headers
Series [v3] riscv: Add macros for FPUCW/fcsr in fpu_control.h |

Checks

Context Check Description
dj/TryBot-apply_patch success Patch applied to master at the time it was sent
dj/TryBot-32bit success Build for i686

Commit Message

Shiqi Zhang April 5, 2023, 5:51 p.m. UTC 
  Add macros for rounding modes and accrued exception flags in order to
make controlling fcsr easier for users.

Reference: RISC-V Unprivileged Spec v20191213, Section 11.2: Figure 11.2, Table 11.1 & 11.2
---
Changed naming of rounding modes to make it more consistent across
architectures.

v2: https://sourceware.org/pipermail/libc-alpha/2023-February/145482.html
v1: https://sourceware.org/pipermail/libc-alpha/2023-February/145474.html

Regards,
Shiqi Zhang

 sysdeps/riscv/fpu_control.h | 14 ++++++++++++++
 1 file changed, 14 insertions(+)
diff mbox series

Patch

diff --git a/sysdeps/riscv/fpu_control.h b/sysdeps/riscv/fpu_control.h
index c33798c6bb..5d36f96984 100644
--- a/sysdeps/riscv/fpu_control.h
+++ b/sysdeps/riscv/fpu_control.h
@@ -36,6 +36,20 @@  extern fpu_control_t __fpu_control;
 # define _FPU_DEFAULT  0
 # define _FPU_IEEE     _FPU_DEFAULT
 
+/* FPU rounding modes */
+# define _FPU_RC_NEAREST         (0 << 5)
+# define _FPU_RC_ZERO            (1 << 5)
+# define _FPU_RC_DOWN            (2 << 5)
+# define _FPU_RC_UP              (3 << 5)
+# define _FPU_RC_NEARESTFROMZERO (4 << 5)
+
+/* FPU accrued exception flags */
+# define _FPU_EXCEPT_NV (1 << 4)
+# define _FPU_EXCEPT_DZ (1 << 3)
+# define _FPU_EXCEPT_OF (1 << 2)
+# define _FPU_EXCEPT_UF (1 << 1)
+# define _FPU_EXCEPT_NX (1 << 0)
+
 /* Type of the control word.  */
 typedef unsigned int fpu_control_t __attribute__ ((__mode__ (__SI__)));