diff mbox series

[048/126] x86_64: Fix svml_d_cbrt8_core_avx512.S code formatting

Message ID 20220307150201.10590-49-skpgkp2@gmail.com
State Committed
Commit 50760cdb8a33b505f0af1f764051fba3158c6280
Headers
Series x86_64: Fix libmvec assembly code formatting |

Checks

Context Check Description
dj/TryBot-apply_patch success Patch applied to master at the time it was sent

Commit Message

Sunil Pandey March 7, 2022, 3 p.m. UTC 
  This commit contains following formatting changes

1. Instructions proceeded by a tab.
2. Instruction less than 8 characters in length have a tab
   between it and the first operand.
3. Instruction greater than 7 characters in length have a
   space between it and the first operand.
4. Tabs after `#define`d names and their value.
5. 8 space at the beginning of line replaced by tab.
6. Indent comments with code.
7. Remove redundent .text section.
---
 .../fpu/multiarch/svml_d_cbrt8_core_avx512.S  | 413 +++++++++---------
 1 file changed, 206 insertions(+), 207 deletions(-)
diff mbox series

Patch

diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_cbrt8_core_avx512.S b/sysdeps/x86_64/fpu/multiarch/svml_d_cbrt8_core_avx512.S
index 35abf8d2f1..42cecf96f6 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_d_cbrt8_core_avx512.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_cbrt8_core_avx512.S
@@ -31,223 +31,222 @@ 
 
 /* Offsets for data table __svml_dcbrt_data_internal_avx512
  */
-#define etbl_H                        	0
-#define etbl_L                        	64
-#define cbrt_tbl_H                    	128
-#define BiasL                         	256
-#define SZero                         	320
-#define OneThird                      	384
-#define Bias3                         	448
-#define Three                         	512
-#define One                           	576
-#define poly_coeff10                  	640
-#define poly_coeff9                   	704
-#define poly_coeff8                   	768
-#define poly_coeff7                   	832
-#define poly_coeff6                   	896
-#define poly_coeff5                   	960
-#define poly_coeff4                   	1024
-#define poly_coeff3                   	1088
-#define poly_coeff2                   	1152
-#define poly_coeff1                   	1216
+#define etbl_H				0
+#define etbl_L				64
+#define cbrt_tbl_H			128
+#define BiasL				256
+#define SZero				320
+#define OneThird			384
+#define Bias3				448
+#define Three				512
+#define One				576
+#define poly_coeff10			640
+#define poly_coeff9			704
+#define poly_coeff8			768
+#define poly_coeff7			832
+#define poly_coeff6			896
+#define poly_coeff5			960
+#define poly_coeff4			1024
+#define poly_coeff3			1088
+#define poly_coeff2			1152
+#define poly_coeff1			1216
 
 #include <sysdep.h>
 
-        .text
-	.section .text.evex512,"ax",@progbits
+	.section .text.evex512, "ax", @progbits
 ENTRY(_ZGVeN8v_cbrt_skx)
-        vgetmantpd $0, {sae}, %zmm0, %zmm14
-
-/* GetExp(x) */
-        vgetexppd {sae}, %zmm0, %zmm7
-        vmovups   BiasL+__svml_dcbrt_data_internal_avx512(%rip), %zmm8
-
-/* exponent/3 */
-        vmovups   OneThird+__svml_dcbrt_data_internal_avx512(%rip), %zmm9
-        vmovups   Bias3+__svml_dcbrt_data_internal_avx512(%rip), %zmm10
-
-/* Reduced argument: R = DblRcp*Mantissa - 1 */
-        vmovups   One+__svml_dcbrt_data_internal_avx512(%rip), %zmm2
-
-/* exponent%3 (to be used as index) */
-        vmovups   Three+__svml_dcbrt_data_internal_avx512(%rip), %zmm11
-
-/* DblRcp ~ 1/Mantissa */
-        vrcp14pd  %zmm14, %zmm13
-        vaddpd    {rn-sae}, %zmm8, %zmm7, %zmm12
-        vandpd    SZero+__svml_dcbrt_data_internal_avx512(%rip), %zmm0, %zmm6
-
-/* round DblRcp to 3 fractional bits (RN mode, no Precision exception) */
-        vrndscalepd $72, {sae}, %zmm13, %zmm15
-        vfmsub231pd {rn-sae}, %zmm12, %zmm9, %zmm10
-
-/* polynomial */
-        vmovups   poly_coeff10+__svml_dcbrt_data_internal_avx512(%rip), %zmm0
-        vmovups   poly_coeff8+__svml_dcbrt_data_internal_avx512(%rip), %zmm7
-        vmovups   poly_coeff7+__svml_dcbrt_data_internal_avx512(%rip), %zmm9
-        vfmsub231pd {rn-sae}, %zmm15, %zmm14, %zmm2
-        vrndscalepd $9, {sae}, %zmm10, %zmm5
-
-/* Table lookup */
-        vmovups   cbrt_tbl_H+__svml_dcbrt_data_internal_avx512(%rip), %zmm10
-        vmovups   poly_coeff6+__svml_dcbrt_data_internal_avx512(%rip), %zmm8
-        vmovups   poly_coeff3+__svml_dcbrt_data_internal_avx512(%rip), %zmm13
-        vfmadd231pd {rn-sae}, %zmm2, %zmm7, %zmm9
-        vfnmadd231pd {rn-sae}, %zmm5, %zmm11, %zmm12
-        vmovups   poly_coeff5+__svml_dcbrt_data_internal_avx512(%rip), %zmm11
-        vmovups   poly_coeff1+__svml_dcbrt_data_internal_avx512(%rip), %zmm14
-
-/* Prepare table index */
-        vpsrlq    $49, %zmm15, %zmm1
-
-/* Table lookup: 2^(exponent%3) */
-        vpermpd   __svml_dcbrt_data_internal_avx512(%rip), %zmm12, %zmm4
-        vpermpd   etbl_L+__svml_dcbrt_data_internal_avx512(%rip), %zmm12, %zmm3
-        vpermt2pd cbrt_tbl_H+64+__svml_dcbrt_data_internal_avx512(%rip), %zmm1, %zmm10
-        vmovups   poly_coeff9+__svml_dcbrt_data_internal_avx512(%rip), %zmm1
-        vfmadd231pd {rn-sae}, %zmm2, %zmm8, %zmm11
-        vmovups   poly_coeff2+__svml_dcbrt_data_internal_avx512(%rip), %zmm12
-        vscalefpd {rn-sae}, %zmm5, %zmm10, %zmm15
-        vfmadd231pd {rn-sae}, %zmm2, %zmm0, %zmm1
-        vmovups   poly_coeff4+__svml_dcbrt_data_internal_avx512(%rip), %zmm5
-        vfmadd231pd {rn-sae}, %zmm2, %zmm12, %zmm14
-        vmulpd    {rn-sae}, %zmm2, %zmm2, %zmm0
-        vfmadd231pd {rn-sae}, %zmm2, %zmm5, %zmm13
-
-/* Sh*R */
-        vmulpd    {rn-sae}, %zmm2, %zmm4, %zmm2
-        vfmadd213pd {rn-sae}, %zmm9, %zmm0, %zmm1
-        vfmadd213pd {rn-sae}, %zmm11, %zmm0, %zmm1
-        vfmadd213pd {rn-sae}, %zmm13, %zmm0, %zmm1
-        vfmadd213pd {rn-sae}, %zmm14, %zmm0, %zmm1
-
-/* Sl + (Sh*R)*Poly */
-        vfmadd213pd {rn-sae}, %zmm3, %zmm1, %zmm2
-
-/*
- * branch-free
- * scaled_Th*(Sh+Sl+Sh*R*Poly)
- */
-        vaddpd    {rn-sae}, %zmm4, %zmm2, %zmm3
-        vmulpd    {rn-sae}, %zmm15, %zmm3, %zmm4
-        vorpd     %zmm6, %zmm4, %zmm0
-        ret
+	vgetmantpd $0, {sae}, %zmm0, %zmm14
+
+	/* GetExp(x) */
+	vgetexppd {sae}, %zmm0, %zmm7
+	vmovups	BiasL+__svml_dcbrt_data_internal_avx512(%rip), %zmm8
+
+	/* exponent/3 */
+	vmovups	OneThird+__svml_dcbrt_data_internal_avx512(%rip), %zmm9
+	vmovups	Bias3+__svml_dcbrt_data_internal_avx512(%rip), %zmm10
+
+	/* Reduced argument: R = DblRcp*Mantissa - 1 */
+	vmovups	One+__svml_dcbrt_data_internal_avx512(%rip), %zmm2
+
+	/* exponent%3 (to be used as index) */
+	vmovups	Three+__svml_dcbrt_data_internal_avx512(%rip), %zmm11
+
+	/* DblRcp ~ 1/Mantissa */
+	vrcp14pd %zmm14, %zmm13
+	vaddpd	{rn-sae}, %zmm8, %zmm7, %zmm12
+	vandpd	SZero+__svml_dcbrt_data_internal_avx512(%rip), %zmm0, %zmm6
+
+	/* round DblRcp to 3 fractional bits (RN mode, no Precision exception) */
+	vrndscalepd $72, {sae}, %zmm13, %zmm15
+	vfmsub231pd {rn-sae}, %zmm12, %zmm9, %zmm10
+
+	/* polynomial */
+	vmovups	poly_coeff10+__svml_dcbrt_data_internal_avx512(%rip), %zmm0
+	vmovups	poly_coeff8+__svml_dcbrt_data_internal_avx512(%rip), %zmm7
+	vmovups	poly_coeff7+__svml_dcbrt_data_internal_avx512(%rip), %zmm9
+	vfmsub231pd {rn-sae}, %zmm15, %zmm14, %zmm2
+	vrndscalepd $9, {sae}, %zmm10, %zmm5
+
+	/* Table lookup */
+	vmovups	cbrt_tbl_H+__svml_dcbrt_data_internal_avx512(%rip), %zmm10
+	vmovups	poly_coeff6+__svml_dcbrt_data_internal_avx512(%rip), %zmm8
+	vmovups	poly_coeff3+__svml_dcbrt_data_internal_avx512(%rip), %zmm13
+	vfmadd231pd {rn-sae}, %zmm2, %zmm7, %zmm9
+	vfnmadd231pd {rn-sae}, %zmm5, %zmm11, %zmm12
+	vmovups	poly_coeff5+__svml_dcbrt_data_internal_avx512(%rip), %zmm11
+	vmovups	poly_coeff1+__svml_dcbrt_data_internal_avx512(%rip), %zmm14
+
+	/* Prepare table index */
+	vpsrlq	$49, %zmm15, %zmm1
+
+	/* Table lookup: 2^(exponent%3) */
+	vpermpd	__svml_dcbrt_data_internal_avx512(%rip), %zmm12, %zmm4
+	vpermpd	etbl_L+__svml_dcbrt_data_internal_avx512(%rip), %zmm12, %zmm3
+	vpermt2pd cbrt_tbl_H+64+__svml_dcbrt_data_internal_avx512(%rip), %zmm1, %zmm10
+	vmovups	poly_coeff9+__svml_dcbrt_data_internal_avx512(%rip), %zmm1
+	vfmadd231pd {rn-sae}, %zmm2, %zmm8, %zmm11
+	vmovups	poly_coeff2+__svml_dcbrt_data_internal_avx512(%rip), %zmm12
+	vscalefpd {rn-sae}, %zmm5, %zmm10, %zmm15
+	vfmadd231pd {rn-sae}, %zmm2, %zmm0, %zmm1
+	vmovups	poly_coeff4+__svml_dcbrt_data_internal_avx512(%rip), %zmm5
+	vfmadd231pd {rn-sae}, %zmm2, %zmm12, %zmm14
+	vmulpd	{rn-sae}, %zmm2, %zmm2, %zmm0
+	vfmadd231pd {rn-sae}, %zmm2, %zmm5, %zmm13
+
+	/* Sh*R */
+	vmulpd	{rn-sae}, %zmm2, %zmm4, %zmm2
+	vfmadd213pd {rn-sae}, %zmm9, %zmm0, %zmm1
+	vfmadd213pd {rn-sae}, %zmm11, %zmm0, %zmm1
+	vfmadd213pd {rn-sae}, %zmm13, %zmm0, %zmm1
+	vfmadd213pd {rn-sae}, %zmm14, %zmm0, %zmm1
+
+	/* Sl + (Sh*R)*Poly */
+	vfmadd213pd {rn-sae}, %zmm3, %zmm1, %zmm2
+
+	/*
+	 * branch-free
+	 * scaled_Th*(Sh+Sl+Sh*R*Poly)
+	 */
+	vaddpd	{rn-sae}, %zmm4, %zmm2, %zmm3
+	vmulpd	{rn-sae}, %zmm15, %zmm3, %zmm4
+	vorpd	%zmm6, %zmm4, %zmm0
+	ret
 
 END(_ZGVeN8v_cbrt_skx)
 
-        .section .rodata, "a"
-        .align 64
+	.section .rodata, "a"
+	.align	64
 
 #ifdef __svml_dcbrt_data_internal_avx512_typedef
 typedef unsigned int VUINT32;
 typedef struct {
-        __declspec(align(64)) VUINT32 etbl_H[8][2];
-        __declspec(align(64)) VUINT32 etbl_L[8][2];
-        __declspec(align(64)) VUINT32 cbrt_tbl_H[16][2];
-        __declspec(align(64)) VUINT32 BiasL[8][2];
-        __declspec(align(64)) VUINT32 SZero[8][2];
-        __declspec(align(64)) VUINT32 OneThird[8][2];
-        __declspec(align(64)) VUINT32 Bias3[8][2];
-        __declspec(align(64)) VUINT32 Three[8][2];
-        __declspec(align(64)) VUINT32 One[8][2];
-        __declspec(align(64)) VUINT32 poly_coeff10[8][2];
-        __declspec(align(64)) VUINT32 poly_coeff9[8][2];
-        __declspec(align(64)) VUINT32 poly_coeff8[8][2];
-        __declspec(align(64)) VUINT32 poly_coeff7[8][2];
-        __declspec(align(64)) VUINT32 poly_coeff6[8][2];
-        __declspec(align(64)) VUINT32 poly_coeff5[8][2];
-        __declspec(align(64)) VUINT32 poly_coeff4[8][2];
-        __declspec(align(64)) VUINT32 poly_coeff3[8][2];
-        __declspec(align(64)) VUINT32 poly_coeff2[8][2];
-        __declspec(align(64)) VUINT32 poly_coeff1[8][2];
-    } __svml_dcbrt_data_internal_avx512;
+	__declspec(align(64)) VUINT32 etbl_H[8][2];
+	__declspec(align(64)) VUINT32 etbl_L[8][2];
+	__declspec(align(64)) VUINT32 cbrt_tbl_H[16][2];
+	__declspec(align(64)) VUINT32 BiasL[8][2];
+	__declspec(align(64)) VUINT32 SZero[8][2];
+	__declspec(align(64)) VUINT32 OneThird[8][2];
+	__declspec(align(64)) VUINT32 Bias3[8][2];
+	__declspec(align(64)) VUINT32 Three[8][2];
+	__declspec(align(64)) VUINT32 One[8][2];
+	__declspec(align(64)) VUINT32 poly_coeff10[8][2];
+	__declspec(align(64)) VUINT32 poly_coeff9[8][2];
+	__declspec(align(64)) VUINT32 poly_coeff8[8][2];
+	__declspec(align(64)) VUINT32 poly_coeff7[8][2];
+	__declspec(align(64)) VUINT32 poly_coeff6[8][2];
+	__declspec(align(64)) VUINT32 poly_coeff5[8][2];
+	__declspec(align(64)) VUINT32 poly_coeff4[8][2];
+	__declspec(align(64)) VUINT32 poly_coeff3[8][2];
+	__declspec(align(64)) VUINT32 poly_coeff2[8][2];
+	__declspec(align(64)) VUINT32 poly_coeff1[8][2];
+} __svml_dcbrt_data_internal_avx512;
 #endif
 __svml_dcbrt_data_internal_avx512:
-        /*== etbl_H ==*/
-        .quad 0x3ff0000000000000
-        .quad 0x3ff428a2f98d728b
-        .quad 0x3ff965fea53d6e3d
-        .quad 0x0000000000000000
-        .quad 0xbff0000000000000
-        .quad 0xbff428a2f98d728b
-        .quad 0xbff965fea53d6e3d
-        .quad 0x0000000000000000
-        /*== etbl_L ==*/
-        .align 64
-        .quad 0x0000000000000000
-        .quad 0xbc7ddc22548ea41e
-        .quad 0xbc9f53e999952f09
-        .quad 0x0000000000000000
-        .quad 0x0000000000000000
-        .quad 0x3c7ddc22548ea41e
-        .quad 0x3c9f53e999952f09
-        .quad 0x0000000000000000
-        /*== cbrt_tbl_H ==*/
-        .align 64
-        .quad 0x3ff428a2f98d728b
-        .quad 0x3ff361f35ca116ff
-        .quad 0x3ff2b6b5edf6b54a
-        .quad 0x3ff220e6dd675180
-        .quad 0x3ff19c3b38e975a8
-        .quad 0x3ff12589c21fb842
-        .quad 0x3ff0ba6ee5f9aad4
-        .quad 0x3ff059123d3a9848
-        .quad 0x3ff0000000000000
-        .quad 0x0000000000000000
-        .quad 0x0000000000000000
-        .quad 0x0000000000000000
-        .quad 0x0000000000000000
-        .quad 0x0000000000000000
-        .quad 0x0000000000000000
-        .quad 0x0000000000000000
-        /*== BiasL ==*/
-        .align 64
-        .quad 0x4338000000000000, 0x4338000000000000, 0x4338000000000000, 0x4338000000000000, 0x4338000000000000, 0x4338000000000000, 0x4338000000000000, 0x4338000000000000
-        /*== Zero ==*/
-        .align 64
-        .quad 0x8000000000000000, 0x8000000000000000, 0x8000000000000000, 0x8000000000000000, 0x8000000000000000, 0x8000000000000000, 0x8000000000000000, 0x8000000000000000
-        /*== OneThird ==*/
-        .align 64
-        .quad 0x3fd5555555555556, 0x3fd5555555555556, 0x3fd5555555555556, 0x3fd5555555555556, 0x3fd5555555555556, 0x3fd5555555555556, 0x3fd5555555555556, 0x3fd5555555555556
-        /*== Bias3 ==*/
-        .align 64
-        .quad 0x4320000000000000, 0x4320000000000000, 0x4320000000000000, 0x4320000000000000, 0x4320000000000000, 0x4320000000000000, 0x4320000000000000, 0x4320000000000000
-        /*== Three ==*/
-        .align 64
-        .quad 0x4008000000000000, 0x4008000000000000, 0x4008000000000000, 0x4008000000000000, 0x4008000000000000, 0x4008000000000000, 0x4008000000000000, 0x4008000000000000
-        /*==One ==*/
-        .align 64
-        .quad 0x3ff0000000000000, 0x3ff0000000000000, 0x3ff0000000000000, 0x3ff0000000000000, 0x3ff0000000000000, 0x3ff0000000000000, 0x3ff0000000000000, 0x3ff0000000000000
-        /*== poly_coeff10 ==*/
-        .align 64
-        .quad 0xbf882e3b6adeca62, 0xbf882e3b6adeca62, 0xbf882e3b6adeca62, 0xbf882e3b6adeca62, 0xbf882e3b6adeca62, 0xbf882e3b6adeca62, 0xbf882e3b6adeca62, 0xbf882e3b6adeca62
-        /*== poly_coeff9 ==*/
-        .align 64
-        .quad 0x3f8bda24bae48875, 0x3f8bda24bae48875, 0x3f8bda24bae48875, 0x3f8bda24bae48875, 0x3f8bda24bae48875, 0x3f8bda24bae48875, 0x3f8bda24bae48875, 0x3f8bda24bae48875
-        /*== poly_coeff8 ==*/
-        .align 64
-        .quad 0xbf9036b87c71d55f, 0xbf9036b87c71d55f, 0xbf9036b87c71d55f, 0xbf9036b87c71d55f, 0xbf9036b87c71d55f, 0xbf9036b87c71d55f, 0xbf9036b87c71d55f, 0xbf9036b87c71d55f
-        /*== poly_coeff7 ==*/
-        .align 64
-        .quad 0x3f9374ed9398b914, 0x3f9374ed9398b914, 0x3f9374ed9398b914, 0x3f9374ed9398b914, 0x3f9374ed9398b914, 0x3f9374ed9398b914, 0x3f9374ed9398b914, 0x3f9374ed9398b914
-        /*== poly_coeff6 ==*/
-        .align 64
-        .quad 0xbf98090d77f2468e, 0xbf98090d77f2468e, 0xbf98090d77f2468e, 0xbf98090d77f2468e, 0xbf98090d77f2468e, 0xbf98090d77f2468e, 0xbf98090d77f2468e, 0xbf98090d77f2468e
-        /*== poly_coeff5 ==*/
-        .align 64
-        .quad 0x3f9ee71141dcf569, 0x3f9ee71141dcf569, 0x3f9ee71141dcf569, 0x3f9ee71141dcf569, 0x3f9ee71141dcf569, 0x3f9ee71141dcf569, 0x3f9ee71141dcf569, 0x3f9ee71141dcf569
-        /*== poly_coeff4 ==*/
-        .align 64
-        .quad 0xbfa511e8d2b0363e, 0xbfa511e8d2b0363e, 0xbfa511e8d2b0363e, 0xbfa511e8d2b0363e, 0xbfa511e8d2b0363e, 0xbfa511e8d2b0363e, 0xbfa511e8d2b0363e, 0xbfa511e8d2b0363e
-        /*== poly_coeff3 ==*/
-        .align 64
-        .quad 0x3faf9add3c0b7e31, 0x3faf9add3c0b7e31, 0x3faf9add3c0b7e31, 0x3faf9add3c0b7e31, 0x3faf9add3c0b7e31, 0x3faf9add3c0b7e31, 0x3faf9add3c0b7e31, 0x3faf9add3c0b7e31
-        /*== poly_coeff2 ==*/
-        .align 64
-        .quad 0xbfbc71c71c71c741, 0xbfbc71c71c71c741, 0xbfbc71c71c71c741, 0xbfbc71c71c71c741, 0xbfbc71c71c71c741, 0xbfbc71c71c71c741, 0xbfbc71c71c71c741, 0xbfbc71c71c71c741
-        /*== poly_coeff1 ==*/
-        .align 64
-        .quad 0x3fd5555555555557, 0x3fd5555555555557, 0x3fd5555555555557, 0x3fd5555555555557, 0x3fd5555555555557, 0x3fd5555555555557, 0x3fd5555555555557, 0x3fd5555555555557
-        .align 64
-        .type	__svml_dcbrt_data_internal_avx512,@object
-        .size	__svml_dcbrt_data_internal_avx512,.-__svml_dcbrt_data_internal_avx512
+	/* etbl_H */
+	.quad	0x3ff0000000000000
+	.quad	0x3ff428a2f98d728b
+	.quad	0x3ff965fea53d6e3d
+	.quad	0x0000000000000000
+	.quad	0xbff0000000000000
+	.quad	0xbff428a2f98d728b
+	.quad	0xbff965fea53d6e3d
+	.quad	0x0000000000000000
+	/* etbl_L */
+	.align	64
+	.quad	0x0000000000000000
+	.quad	0xbc7ddc22548ea41e
+	.quad	0xbc9f53e999952f09
+	.quad	0x0000000000000000
+	.quad	0x0000000000000000
+	.quad	0x3c7ddc22548ea41e
+	.quad	0x3c9f53e999952f09
+	.quad	0x0000000000000000
+	/* cbrt_tbl_H */
+	.align	64
+	.quad	0x3ff428a2f98d728b
+	.quad	0x3ff361f35ca116ff
+	.quad	0x3ff2b6b5edf6b54a
+	.quad	0x3ff220e6dd675180
+	.quad	0x3ff19c3b38e975a8
+	.quad	0x3ff12589c21fb842
+	.quad	0x3ff0ba6ee5f9aad4
+	.quad	0x3ff059123d3a9848
+	.quad	0x3ff0000000000000
+	.quad	0x0000000000000000
+	.quad	0x0000000000000000
+	.quad	0x0000000000000000
+	.quad	0x0000000000000000
+	.quad	0x0000000000000000
+	.quad	0x0000000000000000
+	.quad	0x0000000000000000
+	/* BiasL */
+	.align	64
+	.quad	0x4338000000000000, 0x4338000000000000, 0x4338000000000000, 0x4338000000000000, 0x4338000000000000, 0x4338000000000000, 0x4338000000000000, 0x4338000000000000
+	/* Zero */
+	.align	64
+	.quad	0x8000000000000000, 0x8000000000000000, 0x8000000000000000, 0x8000000000000000, 0x8000000000000000, 0x8000000000000000, 0x8000000000000000, 0x8000000000000000
+	/* OneThird */
+	.align	64
+	.quad	0x3fd5555555555556, 0x3fd5555555555556, 0x3fd5555555555556, 0x3fd5555555555556, 0x3fd5555555555556, 0x3fd5555555555556, 0x3fd5555555555556, 0x3fd5555555555556
+	/* Bias3 */
+	.align	64
+	.quad	0x4320000000000000, 0x4320000000000000, 0x4320000000000000, 0x4320000000000000, 0x4320000000000000, 0x4320000000000000, 0x4320000000000000, 0x4320000000000000
+	/* Three */
+	.align	64
+	.quad	0x4008000000000000, 0x4008000000000000, 0x4008000000000000, 0x4008000000000000, 0x4008000000000000, 0x4008000000000000, 0x4008000000000000, 0x4008000000000000
+	/* One */
+	.align	64
+	.quad	0x3ff0000000000000, 0x3ff0000000000000, 0x3ff0000000000000, 0x3ff0000000000000, 0x3ff0000000000000, 0x3ff0000000000000, 0x3ff0000000000000, 0x3ff0000000000000
+	/* poly_coeff10 */
+	.align	64
+	.quad	0xbf882e3b6adeca62, 0xbf882e3b6adeca62, 0xbf882e3b6adeca62, 0xbf882e3b6adeca62, 0xbf882e3b6adeca62, 0xbf882e3b6adeca62, 0xbf882e3b6adeca62, 0xbf882e3b6adeca62
+	/* poly_coeff9 */
+	.align	64
+	.quad	0x3f8bda24bae48875, 0x3f8bda24bae48875, 0x3f8bda24bae48875, 0x3f8bda24bae48875, 0x3f8bda24bae48875, 0x3f8bda24bae48875, 0x3f8bda24bae48875, 0x3f8bda24bae48875
+	/* poly_coeff8 */
+	.align	64
+	.quad	0xbf9036b87c71d55f, 0xbf9036b87c71d55f, 0xbf9036b87c71d55f, 0xbf9036b87c71d55f, 0xbf9036b87c71d55f, 0xbf9036b87c71d55f, 0xbf9036b87c71d55f, 0xbf9036b87c71d55f
+	/* poly_coeff7 */
+	.align	64
+	.quad	0x3f9374ed9398b914, 0x3f9374ed9398b914, 0x3f9374ed9398b914, 0x3f9374ed9398b914, 0x3f9374ed9398b914, 0x3f9374ed9398b914, 0x3f9374ed9398b914, 0x3f9374ed9398b914
+	/* poly_coeff6 */
+	.align	64
+	.quad	0xbf98090d77f2468e, 0xbf98090d77f2468e, 0xbf98090d77f2468e, 0xbf98090d77f2468e, 0xbf98090d77f2468e, 0xbf98090d77f2468e, 0xbf98090d77f2468e, 0xbf98090d77f2468e
+	/* poly_coeff5 */
+	.align	64
+	.quad	0x3f9ee71141dcf569, 0x3f9ee71141dcf569, 0x3f9ee71141dcf569, 0x3f9ee71141dcf569, 0x3f9ee71141dcf569, 0x3f9ee71141dcf569, 0x3f9ee71141dcf569, 0x3f9ee71141dcf569
+	/* poly_coeff4 */
+	.align	64
+	.quad	0xbfa511e8d2b0363e, 0xbfa511e8d2b0363e, 0xbfa511e8d2b0363e, 0xbfa511e8d2b0363e, 0xbfa511e8d2b0363e, 0xbfa511e8d2b0363e, 0xbfa511e8d2b0363e, 0xbfa511e8d2b0363e
+	/* poly_coeff3 */
+	.align	64
+	.quad	0x3faf9add3c0b7e31, 0x3faf9add3c0b7e31, 0x3faf9add3c0b7e31, 0x3faf9add3c0b7e31, 0x3faf9add3c0b7e31, 0x3faf9add3c0b7e31, 0x3faf9add3c0b7e31, 0x3faf9add3c0b7e31
+	/* poly_coeff2 */
+	.align	64
+	.quad	0xbfbc71c71c71c741, 0xbfbc71c71c71c741, 0xbfbc71c71c71c741, 0xbfbc71c71c71c741, 0xbfbc71c71c71c741, 0xbfbc71c71c71c741, 0xbfbc71c71c71c741, 0xbfbc71c71c71c741
+	/* poly_coeff1 */
+	.align	64
+	.quad	0x3fd5555555555557, 0x3fd5555555555557, 0x3fd5555555555557, 0x3fd5555555555557, 0x3fd5555555555557, 0x3fd5555555555557, 0x3fd5555555555557, 0x3fd5555555555557
+	.align	64
+	.type	__svml_dcbrt_data_internal_avx512, @object
+	.size	__svml_dcbrt_data_internal_avx512, .-__svml_dcbrt_data_internal_avx512