glibc 2.21 - Machine maintainers, please test your machines.
Commit Message
On Fri, Jan 23, 2015 at 05:40:16PM -0800, H.J. Lu wrote:
> On Fri, Jan 23, 2015 at 04:36:51PM -0800, H.J. Lu wrote:
> > On Fri, Jan 23, 2015 at 1:32 PM, Carlos O'Donell <carlos@redhat.com> wrote:
> > > Dear Machine Maintainers,
> > >
> > > Please start testing your machines against glibc
> > > master.
> > >
> > > Please update the glibc 2.21 release page with your
> > > testing results:
> > >
> > > https://sourceware.org/glibc/wiki/Release/2.21
> > >
> > > If nobody objects I want to cut the release as soon
> > > as we have results for all the machines.
> > >
> >
> > We need to update __init_cpu_features in
> > sysdeps/x86_64/multiarch/init-arch.c to support the current
> > Intel processors.
> >
> > Andrew, please find out the model numbers for the current
> > Ivy Bridge, Haswell, Broadwell and Silvermont server, desktop
> > and mobile processors.
> >
> >
>
> We only need to deal with Silvermont since Ivy Bridge, Haswell and
> Broadwell, which have AVX, are treated as Core i7. The new Silvermont
> model numbers are in
>
> http://www.intel.com/content/dam/www/public/us/en/documents/manuals/64-ia-32-architectures-optimization-manual.pdf
>
> I am testing this patch and I will check it in shortly.
>
This is what I checked in. Andrew, please check if it works on your
Silvermont machine.
H.J.
---
From d37d432b715cefb695c09b41676338f25a91d30f Mon Sep 17 00:00:00 2001
From: "H.J. Lu" <hjl.tools@gmail.com>
Date: Fri, 23 Jan 2015 17:27:09 -0800
Subject: [PATCH] Treat model numbers 0x4a/0x4d as Silvermont
* sysdeps/x86_64/multiarch/init-arch.c (__init_cpu_features):
Treat model numbers 0x4a/0x4d as Intel Silvermont architecture.
---
ChangeLog | 5 +++++
sysdeps/x86_64/multiarch/init-arch.c | 2 ++
2 files changed, 7 insertions(+)
@@ -1,5 +1,10 @@
2015-01-23 H.J. Lu <hongjiu.lu@intel.com>
+ * sysdeps/x86_64/multiarch/init-arch.c (__init_cpu_features):
+ Treat model numbers 0x4a/0x4d as Intel Silvermont architecture.
+
+2015-01-23 H.J. Lu <hongjiu.lu@intel.com>
+
[BZ #17870]
* nptl/sem_post.c (__new_sem_post): Replace unsigned long int
with uint64_t.
@@ -79,6 +79,8 @@ __init_cpu_features (void)
break;
case 0x37:
+ case 0x4a:
+ case 0x4d:
/* Unaligned load versions are faster than SSSE3
on Silvermont. */
#if index_Fast_Unaligned_Load != index_Prefer_PMINUB_for_stringop