mbox series

[0/7] Add ifunc support for existing Zbb optimizations

Message ID 20240422074403.2399529-1-christoph.muellner@vrull.eu
Headers
Series Add ifunc support for existing Zbb optimizations |

Message

Christoph Müllner April 22, 2024, 7:43 a.m. UTC 
  Glibc recently got hwprobe() support for RISC-V, which allows querying
avaiable extensions at runtime.  On top of that an optimized memcpy()
routine (for fast unaligned accesses) has been merged, which is built by
recompiling the generic C code with a different compiler flag.  An ifunc
resolver then detects which routine should be run using hwprobe().

This patchset follows this idea and recompiles the following functions
with the existing Zbb/orc.b optimization in riscv/string-fza.h enabled:
memchr, memrchr, strchrnul, strcmp, strlen, strncmp.

Recompilation is achieved by defining the `__riscv_zbb` macro, which
gates the use of orc.b.  As defining this macro on our own is not enough
to make GAS accept an 'orc.b' instruction, the first patch changes it
into the .insn directive form.

This series was tested by writing a simple test program to invoke the
libc routines (e.g. strcmp) and a modified QEMU that reports the
emulation of orc.b on stderr.  With that the QEMU can be used to test
if the optimized routines are executed (-cpu "rv64,zbb=[false,true]").
Further, this series was tested with SPEC CPU 2017 intrate with Zbb
enabled.

Christoph Müllner (7):
  RISC-V: Use .insn directive form for orc.b
  RISC-V: Add Zbb optimized memchr as ifunc
  RISC-V: Add Zbb optimized memrchr as ifunc
  RISC-V: Add Zbb optimized strchrnul as ifunc
  RISC-V: Add Zbb optimized strcmp as ifunc
  RISC-V: Add Zbb optimized strlen as ifunc
  RISC-V: Add Zbb optimized strncmp as ifunc

 sysdeps/riscv/multiarch/memchr-generic.c      | 26 ++++++++
 sysdeps/riscv/multiarch/memchr-zbb.c          | 30 +++++++++
 sysdeps/riscv/multiarch/memrchr-generic.c     | 26 ++++++++
 sysdeps/riscv/multiarch/memrchr-zbb.c         | 30 +++++++++
 sysdeps/riscv/multiarch/strchrnul-generic.c   | 26 ++++++++
 sysdeps/riscv/multiarch/strchrnul-zbb.c       | 30 +++++++++
 sysdeps/riscv/multiarch/strcmp-generic.c      | 26 ++++++++
 sysdeps/riscv/multiarch/strcmp-zbb.c          | 30 +++++++++
 sysdeps/riscv/multiarch/strlen-generic.c      | 26 ++++++++
 sysdeps/riscv/multiarch/strlen-zbb.c          | 30 +++++++++
 sysdeps/riscv/multiarch/strncmp-generic.c     | 26 ++++++++
 sysdeps/riscv/multiarch/strncmp-zbb.c         | 30 +++++++++
 sysdeps/riscv/string-fza.h                    |  3 +-
 .../unix/sysv/linux/riscv/multiarch/Makefile  | 18 ++++++
 .../linux/riscv/multiarch/ifunc-impl-list.c   | 51 ++++++++++++++--
 .../unix/sysv/linux/riscv/multiarch/memchr.c  | 57 +++++++++++++++++
 .../unix/sysv/linux/riscv/multiarch/memrchr.c | 61 +++++++++++++++++++
 .../sysv/linux/riscv/multiarch/strchrnul.c    | 61 +++++++++++++++++++
 .../unix/sysv/linux/riscv/multiarch/strcmp.c  | 57 +++++++++++++++++
 .../unix/sysv/linux/riscv/multiarch/strlen.c  | 57 +++++++++++++++++
 .../unix/sysv/linux/riscv/multiarch/strncmp.c | 57 +++++++++++++++++
 21 files changed, 752 insertions(+), 6 deletions(-)
 create mode 100644 sysdeps/riscv/multiarch/memchr-generic.c
 create mode 100644 sysdeps/riscv/multiarch/memchr-zbb.c
 create mode 100644 sysdeps/riscv/multiarch/memrchr-generic.c
 create mode 100644 sysdeps/riscv/multiarch/memrchr-zbb.c
 create mode 100644 sysdeps/riscv/multiarch/strchrnul-generic.c
 create mode 100644 sysdeps/riscv/multiarch/strchrnul-zbb.c
 create mode 100644 sysdeps/riscv/multiarch/strcmp-generic.c
 create mode 100644 sysdeps/riscv/multiarch/strcmp-zbb.c
 create mode 100644 sysdeps/riscv/multiarch/strlen-generic.c
 create mode 100644 sysdeps/riscv/multiarch/strlen-zbb.c
 create mode 100644 sysdeps/riscv/multiarch/strncmp-generic.c
 create mode 100644 sysdeps/riscv/multiarch/strncmp-zbb.c
 create mode 100644 sysdeps/unix/sysv/linux/riscv/multiarch/memchr.c
 create mode 100644 sysdeps/unix/sysv/linux/riscv/multiarch/memrchr.c
 create mode 100644 sysdeps/unix/sysv/linux/riscv/multiarch/strchrnul.c
 create mode 100644 sysdeps/unix/sysv/linux/riscv/multiarch/strcmp.c
 create mode 100644 sysdeps/unix/sysv/linux/riscv/multiarch/strlen.c
 create mode 100644 sysdeps/unix/sysv/linux/riscv/multiarch/strncmp.c