diff mbox series

[14/40] sim/frv: Add explicit casts

Message ID	e1baa1be3601612266dc6ae0bdde8426ff2a42c8.1666258361.git.research_trasio@irq.a4lg.com
State	Committed
Headers	DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org E359E38207CD To: Tsukasa OI <research_trasio@irq.a4lg.com>, Andrew Burgess <aburgess@redhat.com>, Mike Frysinger <vapier@gentoo.org>, Nick Clifton <nickc@redhat.com> Subject: [PATCH 14/40] sim/frv: Add explicit casts Date: Thu, 20 Oct 2022 09:32:19 +0000 Message-Id: <e1baa1be3601612266dc6ae0bdde8426ff2a42c8.1666258361.git.research_trasio@irq.a4lg.com> In-Reply-To: <cover.1666258361.git.research_trasio@irq.a4lg.com> References: <cover.1666258361.git.research_trasio@irq.a4lg.com> Mime-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: list From: Tsukasa OI via Gdb-patches <gdb-patches@sourceware.org> Reply-To: Tsukasa OI <research_trasio@irq.a4lg.com> Cc: gdb-patches@sourceware.org Errors-To: gdb-patches-bounces+patchwork=sourceware.org@sourceware.org Sender: "Gdb-patches" <gdb-patches-bounces+patchwork=sourceware.org@sourceware.org>
Series	sim+gdb: Suppress warnings if built with Clang (big batch 1) \| [00/40] sim+gdb: Suppress warnings if built with Clang (big batch 1) [01/40] gdb/unittests: PR28413, suppress warnings generated by Gnulib [02/40] sim: Check known getrusage declaration existence [03/40] sim/aarch64: Remove unused functions [04/40] cpu/cris: Initialize some variables on CRIS CPU [05/40] cpu/cris: Add u-stall virtual unit to CRIS v32 [06/40] sim/cris: Move declarations of f_specific_init [07/40] sim/cris: Regenerate with CGEN [08/40] sim/erc32: Insert void parameter [09/40] sim/erc32: Use int32_t as event callback argument [10/40] sim/erc32: Use int32_t as IRQ callback argument [11/40] cpu/frv: Initialize some variables [12/40] sim/frv: Initialize nesr variable [13/40] sim/frv: Initialize some variables [14/40] sim/frv: Add explicit casts [15/40] sim/h8300: Add "+ 0x0" to avoid self-assignments [16/40] sim/lm32: fix some missing function declaration warnings [17/40] sim/lm32: Add explicit casts [19/40] sim/m32r: Initialize "list" variable [20/40] sim/m32r: Prepare required functions [21/40] sim/m32r: Declare all required functions [22/40] sim/m32r: Fixes to Linux emulator [23/40] sim/m32r: Add explicit casts [24/40] sim/mips: Fix enum type-related issues on cp1.c [25/40] sim/mn10300: Add an explicit cast [26/40] sim/ppc: Remove getrusage declarations if possible [27/40] sim/ppc: Add extra parenthesis to avoid ambiguity [28/40] sim/ppc: Initialize stat type buffer [29/40] sim/ppc: Fix indentation on generated code [30/40] sim/ppc: Use TRACE with initialized entry_point [31/40] sim/ppc: Initialize help variables [32/40] sim/ppc: Add an explicit cast [33/40] sim/ppc: Initialize reg and control_nr [34/40] sim/rx: Mark unused function [35/40] sim/sh: Initialize some variables [36/40] sim/sh: Use fabs instead of abs [37/40] sim/sh: Remove redundant function declaration [38/40] sim/bpf: Add explicit casts [39/40] sim/iq2000: Add explicit casts [40/40] sim/or1k: Add explicit casts

Commit Message

Tsukasa OI Oct. 20, 2022, 9:32 a.m. UTC

  Clang generates a warning if there is an enum value with a mismatching type
without an explicit cast ("-Wenum-conversion").
On the default configuration, it causes a build failure
(unless "--disable-werror" is specified).

This commit adds explicit casts on the FR-V instruction decoder.

Note:
This commit touches CGEN-generated files directly.
Modifying CGEN is the best way to prevent this issue from happening again
but there is another known regression in CGEN to resolve.
---
 sim/frv/decode.c | 14 +++++++-------
 1 file changed, 7 insertions(+), 7 deletions(-)

Comments

Mike Frysinger Oct. 23, 2022, 2:40 p.m. UTC | #1

On 20 Oct 2022 09:32, Tsukasa OI wrote:
> Clang generates a warning if there is an enum value with a mismatching type
> without an explicit cast ("-Wenum-conversion").
> On the default configuration, it causes a build failure
> (unless "--disable-werror" is specified).
> 
> This commit adds explicit casts on the FR-V instruction decoder.
> 
> Note:
> This commit touches CGEN-generated files directly.
> Modifying CGEN is the best way to prevent this issue from happening again
> but there is another known regression in CGEN to resolve.

i don't know what regression you're referring to, but if the CGEN output does
this now, that's fine.  but if CGEN doesn't do this, we should get that fixed
first, or make sure the fix is in progress, not just reported.
-mike

diff mbox series

Patch

diff --git a/sim/frv/decode.c b/sim/frv/decode.c
index 307b593e148..9c4a97833ad 100644
--- a/sim/frv/decode.c
+++ b/sim/frv/decode.c
@@ -39,12 +39,12 @@  static IDESC frvbf_insn_data[FRVBF_INSN__MAX];
 
 static const struct insn_sem frvbf_insn_sem[] =
 {
-  { VIRTUAL_INSN_X_INVALID, FRVBF_INSN_X_INVALID, FRVBF_SFMT_EMPTY },
-  { VIRTUAL_INSN_X_AFTER, FRVBF_INSN_X_AFTER, FRVBF_SFMT_EMPTY },
-  { VIRTUAL_INSN_X_BEFORE, FRVBF_INSN_X_BEFORE, FRVBF_SFMT_EMPTY },
-  { VIRTUAL_INSN_X_CTI_CHAIN, FRVBF_INSN_X_CTI_CHAIN, FRVBF_SFMT_EMPTY },
-  { VIRTUAL_INSN_X_CHAIN, FRVBF_INSN_X_CHAIN, FRVBF_SFMT_EMPTY },
-  { VIRTUAL_INSN_X_BEGIN, FRVBF_INSN_X_BEGIN, FRVBF_SFMT_EMPTY },
+  { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_INVALID, FRVBF_INSN_X_INVALID, FRVBF_SFMT_EMPTY },
+  { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_AFTER, FRVBF_INSN_X_AFTER, FRVBF_SFMT_EMPTY },
+  { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_BEFORE, FRVBF_INSN_X_BEFORE, FRVBF_SFMT_EMPTY },
+  { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_CTI_CHAIN, FRVBF_INSN_X_CTI_CHAIN, FRVBF_SFMT_EMPTY },
+  { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_CHAIN, FRVBF_INSN_X_CHAIN, FRVBF_SFMT_EMPTY },
+  { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_BEGIN, FRVBF_INSN_X_BEGIN, FRVBF_SFMT_EMPTY },
   { FRV_INSN_ADD, FRVBF_INSN_ADD, FRVBF_SFMT_ADD },
   { FRV_INSN_SUB, FRVBF_INSN_SUB, FRVBF_SFMT_ADD },
   { FRV_INSN_AND, FRVBF_INSN_AND, FRVBF_SFMT_ADD },
@@ -792,7 +792,7 @@  static const struct insn_sem frvbf_insn_sem[] =
 
 static const struct insn_sem frvbf_insn_sem_invalid =
 {
-  VIRTUAL_INSN_X_INVALID, FRVBF_INSN_X_INVALID, FRVBF_SFMT_EMPTY
+  (CGEN_INSN_TYPE) VIRTUAL_INSN_X_INVALID, FRVBF_INSN_X_INVALID, FRVBF_SFMT_EMPTY
 };
 
 /* Initialize an IDESC from the compile-time computable parts.  */