This commit is part of a series which aims to share more of the target
description creation between GDB and gdbserver for x86/Linux.
After some refactoring, the previous commit actually started to share
some code, we added the shared x86_linux_tdesc_for_tid function into
nat/x86-linux-tdesc.c. However, this function still relies on
amd64_linux_read_description and i386_linux_read_description which are
implemented separately for both gdbserver and GDB. Given that at
their core, all these functions to is:
1. take an xcr0 value as input,
2. mask out some feature bits,
3. look for a cached pre-generated target description and return it
if found,
4. if no cached target description is found then call either
amd64_create_target_description or
i386_create_target_description to create a new target
description, which is then added to the cache. Return the newly
created target description.
The inner functions amd64_create_target_description and
i386_create_target_description are already shared between GDB and
gdbserver (in the gdb/arch/ directory), so the only thing that
the *_read_description functions really do is add the caching layer,
and it feels like this really could be shared.
However, we have a small problem.
On the GDB side we create target descriptions using a different set of
cpu features than on the gdbserver side! This means that for the
exact same target, we might get a different target description when
using native GDB vs using gdbserver. This surely feels like a
mistake, I would expect to get the same target description on each.
The table below shows the number of possible different target
descriptions that we can create on the GDB side vs on the gdbserver
side for each target type:
| GDB | gdbserver
------|-----|----------
i386 | 64 | 7
amd64 | 32 | 7
x32 | 16 | 7
So in theory, all I want to do is move the GDB version
of *_read_description into the nat/ directory and have gdbserver use
that, then both GDB and gdbserver would be able to create any of the
possible target descriptions.
Unfortunately it's a little more complex than that due to the in
process agent (IPA).
When the IPA is in use, gdbserver sends a target description index to
the IPA, and the IPA uses this to find the correct target description
to use.
** START OF AN ASIDE **
Back in the day I suspect this approach made perfect sense. However
since this commit:
commit a8806230241d201f808d856eaae4d44088117b0c
Date: Thu Dec 7 17:07:01 2017 +0000
Initialize target description early in IPA
I think passing the index is now more trouble than its worth.
We used to pass the index, and then use that index to lookup which
target description to instantiate and use. However, the above commit
fixed an issue where we can't call malloc() within (certain parts of)
the IPA (apparently), so instead we now pre-compute _every_ possible
target description within the IPA. The index is now only used to
lookup which of the (many) pre-computed target descriptions to use.
It would (I think) have been easier all around if the IPA just
self-inspected, figured out its own xcr0 value, and used that to
create the one target description that is required. So long as the
xcr0 to target description code is shared (at compile time) with
gdbserver, then we can be sure that the IPA will derive the same
target description as gdbserver, and we would avoid all this index
passing business, which has made this commit so very, very painful.
** END OF AN ASIDE **
Currently then for x86/linux, gdbserver sends a number between 0 and 7
to the IPA, and the IPA uses this to create a target description.
However, I am proposing that gdbserver should now create one of (up
to) 64 different target descriptions for i386, so this 0 to 7 index
isn't going to be good enough any more (amd64 and x32 have slightly
fewer possible target descriptions, but still more than 8, so the
problem is the same).
For a while I wondered if I was going to have to try and find some
backward compatible solution for this mess. But after seeing how
lightly the IPA is actually documented, I wonder if it is not the case
that there is a tight coupling between a version of gdbserver and a
version of the IPA? At least I'm hoping so.
In this commit I have thrown out the old IPA target description index
numbering scheme, and switched to a completely new numbering scheme.
Instead of the index that is passed being arbitrary, the index is
instead calculated from the set of cpu features that are present on
the target. Within the IPA we can then reverse this logic to recreate
the xcr0 value based on the index, and from the xcr0 value we can
create the correct target description.
With the gdbserver to IPA numbering scheme issue resolved I have then
update the gdbserver versions of amd64_linux_read_description and
i386_linux_read_description so that they create target descriptions
using the same set of cpu features as GDB itself.
After this gdbserver should now always come up with the same target
description as GDB does on any x86/Linux target.
This commit does not introduce any new code sharing between GDB and
gdbserver as previous commits in this series does. Instead this
commit is all about bringing GDB and gdbserver into alignment
functionally so that the next commit can merge the GDB and gdbserver
versions of these functions.
Approved-By: John Baldwin <jhb@FreeBSD.org>
---
gdbserver/linux-amd64-ipa.cc | 43 +----
gdbserver/linux-i386-ipa.cc | 23 +--
gdbserver/linux-x86-low.cc | 15 +-
gdbserver/linux-x86-tdesc.cc | 315 +++++++++++++++++++++++++----------
gdbserver/linux-x86-tdesc.h | 49 +++---
5 files changed, 277 insertions(+), 168 deletions(-)
@@ -169,47 +169,21 @@ supply_static_tracepoint_registers (struct regcache *regcache,
#endif /* HAVE_UST */
-#if !defined __ILP32__
-/* Map the tdesc index to xcr0 mask. */
-static uint64_t idx2mask[X86_TDESC_LAST] = {
- X86_XSTATE_X87_MASK,
- X86_XSTATE_SSE_MASK,
- X86_XSTATE_AVX_MASK,
- X86_XSTATE_MPX_MASK,
- X86_XSTATE_AVX_MPX_MASK,
- X86_XSTATE_AVX_AVX512_MASK,
- X86_XSTATE_AVX_MPX_AVX512_PKU_MASK,
-};
-#endif
-
/* Return target_desc to use for IPA, given the tdesc index passed by
gdbserver. */
const struct target_desc *
get_ipa_tdesc (int idx)
{
- if (idx >= X86_TDESC_LAST)
- {
- internal_error ("unknown ipa tdesc index: %d", idx);
- }
+ uint64_t xcr0 = x86_linux_tdesc_idx_to_xcr0 (idx);
#if defined __ILP32__
- switch (idx)
- {
- case X86_TDESC_SSE:
- return amd64_linux_read_description (X86_XSTATE_SSE_MASK, true);
- case X86_TDESC_AVX:
- return amd64_linux_read_description (X86_XSTATE_AVX_MASK, true);
- case X86_TDESC_AVX_AVX512:
- return amd64_linux_read_description (X86_XSTATE_AVX_AVX512_MASK, true);
- default:
- break;
- }
+ bool is_x32 = true;
#else
- return amd64_linux_read_description (idx2mask[idx], false);
+ bool is_x32 = false;
#endif
- internal_error ("unknown ipa tdesc index: %d", idx);
+ return amd64_linux_read_description (xcr0, is_x32);
}
/* Allocate buffer for the jump pads. The branch instruction has a
@@ -277,11 +251,10 @@ void
initialize_low_tracepoint (void)
{
#if defined __ILP32__
- amd64_linux_read_description (X86_XSTATE_SSE_MASK, true);
- amd64_linux_read_description (X86_XSTATE_AVX_MASK, true);
- amd64_linux_read_description (X86_XSTATE_AVX_AVX512_MASK, true);
+ for (auto i = 0; i < x86_linux_x32_ipa_tdesc_count (); i++)
+ amd64_linux_read_description (x86_linux_tdesc_idx_to_xcr0 (i), true);
#else
- for (auto i = 0; i < X86_TDESC_LAST; i++)
- amd64_linux_read_description (idx2mask[i], false);
+ for (auto i = 0; i < x86_linux_amd64_ipa_tdesc_count (); i++)
+ amd64_linux_read_description (x86_linux_tdesc_idx_to_xcr0 (i), false);
#endif
}
@@ -246,28 +246,15 @@ initialize_fast_tracepoint_trampoline_buffer (void)
}
}
-/* Map the tdesc index to xcr0 mask. */
-static uint64_t idx2mask[X86_TDESC_LAST] = {
- X86_XSTATE_X87_MASK,
- X86_XSTATE_SSE_MASK,
- X86_XSTATE_AVX_MASK,
- X86_XSTATE_MPX_MASK,
- X86_XSTATE_AVX_MPX_MASK,
- X86_XSTATE_AVX_AVX512_MASK,
- X86_XSTATE_AVX_MPX_AVX512_PKU_MASK,
-};
-
/* Return target_desc to use for IPA, given the tdesc index passed by
gdbserver. */
const struct target_desc *
get_ipa_tdesc (int idx)
{
- if (idx >= X86_TDESC_LAST)
- {
- internal_error ("unknown ipa tdesc index: %d", idx);
- }
- return i386_linux_read_description (idx2mask[idx]);
+ uint64_t xcr0 = x86_linux_tdesc_idx_to_xcr0 (idx);
+
+ return i386_linux_read_description (xcr0);
}
/* Allocate buffer for the jump pads. On i386, we can reach an arbitrary
@@ -289,6 +276,6 @@ void
initialize_low_tracepoint (void)
{
initialize_fast_tracepoint_trampoline_buffer ();
- for (auto i = 0; i < X86_TDESC_LAST; i++)
- i386_linux_read_description (idx2mask[i]);
+ for (auto i = 0; i < x86_linux_i386_ipa_tdesc_count (); i++)
+ i386_linux_read_description (x86_linux_tdesc_idx_to_xcr0 (i));
}
@@ -2892,14 +2892,17 @@ x86_target::get_ipa_tdesc_idx ()
struct regcache *regcache = get_thread_regcache (current_thread, 0);
const struct target_desc *tdesc = regcache->tdesc;
+ if (!use_xml)
+ {
+ if (tdesc == tdesc_i386_linux_no_xml.get ()
#ifdef __x86_64__
- return amd64_get_ipa_tdesc_idx (tdesc);
-#endif
-
- if (tdesc == tdesc_i386_linux_no_xml.get ())
- return X86_TDESC_SSE;
+ || tdesc == tdesc_amd64_linux_no_xml.get ()
+#endif /* __x86_64__ */
+ )
+ return x86_linux_xcr0_to_tdesc_idx (X86_XSTATE_SSE_MASK);
+ }
- return i386_get_ipa_tdesc_idx (tdesc);
+ return x86_linux_xcr0_to_tdesc_idx (xcr0_storage);
}
/* The linux target ops object. */
@@ -28,96 +28,277 @@
#include "x86-tdesc.h"
#include "nat/x86-linux-tdesc.h"
-/* Return the right x86_linux_tdesc index for a given XCR0. Return
- X86_TDESC_LAST if can't find a match. */
+/* A structure used to describe a single cpu feature that might, or might
+ not, be checked for when creating a target description for one of i386,
+ amd64, or x32. */
-static enum x86_linux_tdesc
-xcr0_to_tdesc_idx (uint64_t xcr0, bool is_x32)
+struct x86_tdesc_feature {
+ /* The cpu feature mask. This is a mask against an xcr0 value. */
+ uint64_t feature;
+
+ /* Is this feature checked when creating an i386 target description. */
+ bool is_i386;
+
+ /* Is this feature checked when creating an amd64 target description. */
+ bool is_amd64;
+
+ /* Is this feature checked when creating an x32 target description. */
+ bool is_x32;
+};
+
+/* A constant table that describes all of the cpu features that are
+ checked when building a target description for i386, amd64, or x32. */
+
+static constexpr x86_tdesc_feature x86_linux_all_tdesc_features[] = {
+ /* Feature, i386, amd64, x32. */
+ { X86_XSTATE_PKRU, true, true, true },
+ { X86_XSTATE_AVX512, true, true, true },
+ { X86_XSTATE_AVX, true, true, true },
+ { X86_XSTATE_MPX, true, true, false },
+ { X86_XSTATE_SSE, true, false, false },
+ { X86_XSTATE_X87, true, false, false }
+};
+
+/* Return a compile time constant which is a mask of all the cpu features
+ that are checked for when building an i386 target description. */
+
+static constexpr uint64_t
+x86_linux_i386_tdesc_feature_mask ()
{
- if (xcr0 & X86_XSTATE_PKRU)
- {
- if (is_x32)
- {
- /* No x32 MPX and PKU, fall back to avx_avx512. */
- return X86_TDESC_AVX_AVX512;
- }
- else
- return X86_TDESC_AVX_MPX_AVX512_PKU;
- }
- else if (xcr0 & X86_XSTATE_AVX512)
- return X86_TDESC_AVX_AVX512;
- else if ((xcr0 & X86_XSTATE_AVX_MPX_MASK) == X86_XSTATE_AVX_MPX_MASK)
+ uint64_t mask = 0;
+
+ for (const auto &entry : x86_linux_all_tdesc_features)
+ if (entry.is_i386)
+ mask |= entry.feature;
+
+ return mask;
+}
+
+/* Return a compile time constant which is a mask of all the cpu features
+ that are checked for when building an amd64 target description. */
+
+static constexpr uint64_t
+x86_linux_amd64_tdesc_feature_mask ()
+{
+ uint64_t mask = 0;
+
+ for (const auto &entry : x86_linux_all_tdesc_features)
+ if (entry.is_amd64)
+ mask |= entry.feature;
+
+ return mask;
+}
+
+/* Return a compile time constant which is a mask of all the cpu features
+ that are checked for when building an x32 target description. */
+
+static constexpr uint64_t
+x86_linux_x32_tdesc_feature_mask ()
+{
+ uint64_t mask = 0;
+
+ for (const auto &entry : x86_linux_all_tdesc_features)
+ if (entry.is_x32)
+ mask |= entry.feature;
+
+ return mask;
+}
+
+/* Return a compile time constant which is a count of the number of cpu
+ features that are checked for when building an i386 target description. */
+
+static constexpr int
+x86_linux_i386_tdesc_count ()
+{
+ uint64_t count = 0;
+
+ for (const auto &entry : x86_linux_all_tdesc_features)
+ if (entry.is_i386)
+ ++count;
+
+ gdb_assert (count > 0);
+
+ return (1 << count);
+}
+
+/* Return a compile time constant which is a count of the number of cpu
+ features that are checked for when building an amd64 target description. */
+
+static constexpr int
+x86_linux_amd64_tdesc_count ()
+{
+ uint64_t count = 0;
+
+ for (const auto &entry : x86_linux_all_tdesc_features)
+ if (entry.is_amd64)
+ ++count;
+
+ gdb_assert (count > 0);
+
+ return (1 << count);
+}
+
+/* Return a compile time constant which is a count of the number of cpu
+ features that are checked for when building an x32 target description. */
+
+static constexpr int
+x86_linux_x32_tdesc_count ()
+{
+ uint64_t count = 0;
+
+ for (const auto &entry : x86_linux_all_tdesc_features)
+ if (entry.is_x32)
+ ++count;
+
+ gdb_assert (count > 0);
+
+ return (1 << count);
+}
+
+#ifdef IN_PROCESS_AGENT
+
+/* See linux-x86-tdesc.h. */
+
+int
+x86_linux_amd64_ipa_tdesc_count ()
+{
+ return x86_linux_amd64_tdesc_count ();
+}
+
+/* See linux-x86-tdesc.h. */
+
+int
+x86_linux_x32_ipa_tdesc_count ()
+{
+ return x86_linux_x32_tdesc_count ();
+}
+
+/* See linux-x86-tdesc.h. */
+
+int
+x86_linux_i386_ipa_tdesc_count ()
+{
+ return x86_linux_i386_tdesc_count ();
+}
+
+#endif /* IN_PROCESS_AGENT */
+
+/* Convert an xcr0 value into an integer. The integer will be passed to
+ the in-process-agent where it will then be passed to
+ x86_linux_tdesc_idx_to_xcr0 to get back the xcr0 value. */
+
+int
+x86_linux_xcr0_to_tdesc_idx (uint64_t xcr0)
+{
+ /* The following table shows which features are checked for when creating
+ the target descriptions (see nat/x86-linux-tdesc.c), the feature order
+ represents the bit order within the generated index number.
+
+ i386 | x87 sse mpx avx avx512 pkru
+ amd64 | mpx avx avx512 pkru
+ i32 | avx avx512 pkru
+
+ The features are ordered so that for each mode (i386, amd64, i32) the
+ generated index will form a continuous range. */
+
+ int idx = 0;
+
+ for (int i = 0; i < ARRAY_SIZE (x86_linux_all_tdesc_features); ++i)
{
- if (is_x32) /* No MPX on x32. */
- return X86_TDESC_AVX;
- else
- return X86_TDESC_AVX_MPX;
+ if ((xcr0 & x86_linux_all_tdesc_features[i].feature) != 0)
+ idx |= (1 << i);
}
- else if (xcr0 & X86_XSTATE_MPX)
+
+ return idx;
+}
+
+
+#ifdef IN_PROCESS_AGENT
+
+/* Convert an index number (as returned from x86_linux_xcr0_to_tdesc_idx)
+ into an xcr0 value which can then be used to create a target
+ description. */
+
+uint64_t
+x86_linux_tdesc_idx_to_xcr0 (int idx)
+{
+ uint64_t xcr0 = 0;
+
+ for (int i = 0; i < ARRAY_SIZE (x86_linux_all_tdesc_features); ++i)
{
- if (is_x32) /* No MPX on x32. */
- return X86_TDESC_AVX;
- else
- return X86_TDESC_MPX;
+ if ((idx & (1 << i)) != 0)
+ xcr0 |= x86_linux_all_tdesc_features[i].feature;
}
- else if (xcr0 & X86_XSTATE_AVX)
- return X86_TDESC_AVX;
- else if (xcr0 & X86_XSTATE_SSE)
- return X86_TDESC_SSE;
- else if (xcr0 & X86_XSTATE_X87)
- return X86_TDESC_MMX;
- else
- return X86_TDESC_LAST;
+
+ return xcr0;
}
+#endif /* IN_PROCESS_AGENT */
+
#if defined __i386__ || !defined IN_PROCESS_AGENT
-static struct target_desc *i386_tdescs[X86_TDESC_LAST] = { };
+/* A cache of all possible i386 target descriptions. */
-/* Return the target description according to XCR0. */
+static struct target_desc *i386_tdescs[x86_linux_i386_tdesc_count ()] = { };
+
+/* See nat/x86-linux-tdesc.h. */
const struct target_desc *
i386_linux_read_description (uint64_t xcr0)
{
- enum x86_linux_tdesc idx = xcr0_to_tdesc_idx (xcr0, false);
+ xcr0 &= x86_linux_i386_tdesc_feature_mask ();
+ int idx = x86_linux_xcr0_to_tdesc_idx (xcr0);
- if (idx == X86_TDESC_LAST)
- return NULL;
+ gdb_assert (idx >= 0 && idx < x86_linux_i386_tdesc_count ());
- struct target_desc **tdesc = &i386_tdescs[idx];
+ target_desc **tdesc = &i386_tdescs[idx];
- if (*tdesc == NULL)
+ if (*tdesc == nullptr)
{
*tdesc = i386_create_target_description (xcr0, true, false);
init_target_desc (*tdesc, i386_expedite_regs);
}
- return *tdesc;;
+ return *tdesc;
}
#endif
#ifdef __x86_64__
-static target_desc *amd64_tdescs[X86_TDESC_LAST] = { };
-static target_desc *x32_tdescs[X86_TDESC_LAST] = { };
+/* A cache of all possible amd64 target descriptions. */
+
+static target_desc *amd64_tdescs[x86_linux_amd64_tdesc_count ()] = { };
+
+/* A cache of all possible x32 target descriptions. */
+
+static target_desc *x32_tdescs[x86_linux_x32_tdesc_count ()] = { };
+
+/* See nat/x86-linux-tdesc.h. */
const struct target_desc *
amd64_linux_read_description (uint64_t xcr0, bool is_x32)
{
- enum x86_linux_tdesc idx = xcr0_to_tdesc_idx (xcr0, is_x32);
+ if (is_x32)
+ xcr0 &= x86_linux_x32_tdesc_feature_mask ();
+ else
+ xcr0 &= x86_linux_amd64_tdesc_feature_mask ();
+
+ int idx = x86_linux_xcr0_to_tdesc_idx (xcr0);
- if (idx == X86_TDESC_LAST)
- return NULL;
+ if (is_x32)
+ gdb_assert (idx >= 0 && idx < x86_linux_x32_tdesc_count ());
+ else
+ gdb_assert (idx >= 0 && idx < x86_linux_amd64_tdesc_count ());
- struct target_desc **tdesc = NULL;
+ target_desc **tdesc = nullptr;
if (is_x32)
tdesc = &x32_tdescs[idx];
else
tdesc = &amd64_tdescs[idx];
- if (*tdesc == NULL)
+ if (*tdesc == nullptr)
{
*tdesc = amd64_create_target_description (xcr0, is_x32, true, true);
@@ -127,39 +308,3 @@ amd64_linux_read_description (uint64_t xcr0, bool is_x32)
}
#endif
-
-#ifndef IN_PROCESS_AGENT
-
-int
-i386_get_ipa_tdesc_idx (const struct target_desc *tdesc)
-{
- for (int i = 0; i < X86_TDESC_LAST; i++)
- {
- if (tdesc == i386_tdescs[i])
- return i;
- }
-
- /* If none tdesc is found, return the one with minimum features. */
- return X86_TDESC_MMX;
-}
-
-#if defined __x86_64__
-int
-amd64_get_ipa_tdesc_idx (const struct target_desc *tdesc)
-{
- for (int i = 0; i < X86_TDESC_LAST; i++)
- {
- if (tdesc == amd64_tdescs[i])
- return i;
- }
- for (int i = 0; i < X86_TDESC_LAST; i++)
- {
- if (tdesc == x32_tdescs[i])
- return i;
- }
-
- return X86_TDESC_SSE;
-}
-
-#endif
-#endif
@@ -21,29 +21,30 @@
#ifndef GDBSERVER_LINUX_X86_TDESC_H
#define GDBSERVER_LINUX_X86_TDESC_H
-/* Note: since IPA obviously knows what ABI it's running on (i386 vs x86_64
- vs x32), it's sufficient to pass only the register set here. This,
- together with the ABI known at IPA compile time, maps to a tdesc. */
-
-enum x86_linux_tdesc {
- X86_TDESC_MMX = 0,
- X86_TDESC_SSE = 1,
- X86_TDESC_AVX = 2,
- X86_TDESC_MPX = 3,
- X86_TDESC_AVX_MPX = 4,
- X86_TDESC_AVX_AVX512 = 5,
- X86_TDESC_AVX_MPX_AVX512_PKU = 6,
- X86_TDESC_LAST = 7,
-};
-
-#if defined __i386__ || !defined IN_PROCESS_AGENT
-int i386_get_ipa_tdesc_idx (const struct target_desc *tdesc);
-#endif
-
-#if defined __x86_64__ && !defined IN_PROCESS_AGENT
-int amd64_get_ipa_tdesc_idx (const struct target_desc *tdesc);
-#endif
-
-const struct target_desc *i386_get_ipa_tdesc (int idx);
+/* Convert an xcr0 value into an integer. The integer will be passed to
+ the in-process-agent where it will then be passed to
+ x86_linux_tdesc_idx_to_xcr0 to get back the xcr0 value. */
+
+extern int x86_linux_xcr0_to_tdesc_idx (uint64_t xcr0);
+
+#ifdef IN_PROCESS_AGENT
+
+/* Convert an index number (as returned from x86_linux_xcr0_to_tdesc_idx)
+ into an xcr0 value which can then be used to create a target
+ description. */
+
+extern uint64_t x86_linux_tdesc_idx_to_xcr0 (int idx);
+
+/* Within the in-process-agent we need to pre-initialise all of the target
+ descriptions, to do this we need to know how many target descriptions
+ there are for each different target type. These functions return the
+ target description count for the relevant target. */
+
+extern int x86_linux_amd64_ipa_tdesc_count ();
+extern int x86_linux_x32_ipa_tdesc_count ();
+extern int x86_linux_i386_ipa_tdesc_count ();
+
+
+#endif /* IN_PROCESS_AGENT */
#endif /* GDBSERVER_LINUX_X86_TDESC_H */