[PATCHv6,1/9] gdb/gdbserver: share I386_LINUX_XSAVE_XCR0_OFFSET definition
Checks
| Context |
Check |
Description |
| linaro-tcwg-bot/tcwg_gdb_build--master-aarch64 |
success
|
Testing passed
|
| linaro-tcwg-bot/tcwg_gdb_build--master-arm |
success
|
Testing passed
|
| linaro-tcwg-bot/tcwg_gdb_check--master-aarch64 |
success
|
Testing passed
|
Commit Message
Share the definition of I386_LINUX_XSAVE_XCR0_OFFSET between GDB and
gdbserver.
This commit moves the definition into gdbsupport/x86-xstate.h, which
allows the #define to be shared.
There should be no user visible changes after this commit.
Approved-By: Felix Willgerodt <felix.willgerodt@intel.com>
---
gdb/i386-linux-tdep.h | 20 --------------------
gdbserver/linux-x86-low.cc | 21 ---------------------
gdbsupport/x86-xstate.h | 20 ++++++++++++++++++++
3 files changed, 20 insertions(+), 41 deletions(-)
@@ -58,26 +58,6 @@ extern void i386_linux_report_signal_info (struct gdbarch *gdbarch,
/* Return the target description according to XCR0. */
extern const struct target_desc *i386_linux_read_description (uint64_t xcr0);
-/* Format of XSAVE extended state is:
- struct
- {
- fxsave_bytes[0..463]
- sw_usable_bytes[464..511]
- xstate_hdr_bytes[512..575]
- extended state regions (AVX, MPX, AVX512, PKRU, etc.)
- };
-
- Same memory layout will be used for the coredump NT_X86_XSTATE
- representing the XSAVE extended state registers.
-
- The first 8 bytes of the sw_usable_bytes[464..467] is the OS enabled
- extended state mask, which is the same as the extended control register
- 0 (the XFEATURE_ENABLED_MASK register), XCR0. We can use this mask
- together with the mask saved in the xstate_hdr_bytes to determine what
- states the processor/OS supports and what state, used or initialized,
- the process/thread is in. */
-#define I386_LINUX_XSAVE_XCR0_OFFSET 464
-
extern int i386_linux_gregset_reg_offset[];
/* Return x86 siginfo type. */
@@ -831,27 +831,6 @@ x86_target::low_siginfo_fixup (siginfo_t *ptrace, gdb_byte *inf, int direction)
static int use_xml;
-/* Format of XSAVE extended state is:
- struct
- {
- fxsave_bytes[0..463]
- sw_usable_bytes[464..511]
- xstate_hdr_bytes[512..575]
- avx_bytes[576..831]
- future_state etc
- };
-
- Same memory layout will be used for the coredump NT_X86_XSTATE
- representing the XSAVE extended state registers.
-
- The first 8 bytes of the sw_usable_bytes[464..467] is the OS enabled
- extended state mask, which is the same as the extended control register
- 0 (the XFEATURE_ENABLED_MASK register), XCR0. We can use this mask
- together with the mask saved in the xstate_hdr_bytes to determine what
- states the processor/OS supports and what state, used or initialized,
- the process/thread is in. */
-#define I386_LINUX_XSAVE_XCR0_OFFSET 464
-
/* Does the current host support the GETFPXREGS request? The header
file may or may not define it, and even if it is defined, the
kernel will return EIO if it's running on a pre-SSE processor. */
@@ -120,4 +120,24 @@ constexpr bool operator!= (const x86_xsave_layout &lhs,
#define I387_MXCSR_INIT_VAL 0x1f80
+/* Format of XSAVE extended state is:
+ struct
+ {
+ fxsave_bytes[0..463]
+ sw_usable_bytes[464..511]
+ xstate_hdr_bytes[512..575]
+ extended state regions (AVX, MPX, AVX512, PKRU, etc.)
+ };
+
+ Same memory layout will be used for the coredump NT_X86_XSTATE
+ representing the XSAVE extended state registers.
+
+ The first 8 bytes of the sw_usable_bytes[464..467] is the OS enabled
+ extended state mask, which is the same as the extended control register
+ 0 (the XFEATURE_ENABLED_MASK register), XCR0. We can use this mask
+ together with the mask saved in the xstate_hdr_bytes to determine what
+ states the processor/OS supports and what state, used or initialized,
+ the process/thread is in. */
+#define I386_LINUX_XSAVE_XCR0_OFFSET 464
+
#endif /* COMMON_X86_XSTATE_H */