Record support for sahf/lahf opcodes on x86_64

Message ID CAF4+tmpRtHOw_wYc4tqOZKZjO-WHb4R5=Ck1_n6eKTvDhX8k+w@mail.gmail.com
State New, archived
Headers

Commit Message

Bogdan Harjoc Aug. 2, 2019, 12:11 p.m. UTC
  GDB currently stops with the message

"Process record does not support instruction 0x9f at address 0x..."

when encountering a lahf instruction in x86_64 code (and similar, 0x9e
for sahf). If I understand correctly, the code that handles lahf:

    case 0x9f:    /* lahf */
      if (ir.regmap[X86_RECORD_R8_REGNUM])
        {
          ir.addr -= 1;
          goto no_support;
        }

is meant to reject lahf/sahf unless running in 32-bit mode. But
lahf/sahf are valid on 64-bit too, so would it be ok to remove the
checks from i386-tdep.c ? Patch is attached.

Regards,
Bogdan
  

Patch

diff --git a/gdb/i386-tdep.c b/gdb/i386-tdep.c
index ccec6d171b..72058bfb5c 100644
--- a/gdb/i386-tdep.c
+++ b/gdb/i386-tdep.c
@@ -6696,11 +6696,6 @@  Do you want to stop the program?"),
       break;
 
     case 0x9e:    /* sahf */
-      if (ir.regmap[X86_RECORD_R8_REGNUM])
-        {
-          ir.addr -= 1;
-          goto no_support;
-        }
       /* FALLTHROUGH */
     case 0xf5:    /* cmc */
     case 0xf8:    /* clc */
@@ -6711,11 +6706,6 @@  Do you want to stop the program?"),
       break;
 
     case 0x9f:    /* lahf */
-      if (ir.regmap[X86_RECORD_R8_REGNUM])
-        {
-          ir.addr -= 1;
-          goto no_support;
-        }
       I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
       I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM);
       break;