RFA: RX sim: Add support for new operand types.
Commit Message
Hi DJ,
A couple of recent patches to the RX disassembler have created some
new operand types. Unfortunately I forgot to add these types to the
RX simulator, which consequently broke. So here is a patch to add
them.
OK to apply ?
Cheers
Nick
sim/rx/ChangeLog
2015-11-09 Nick Clifton <nickc@redhat.com>
* rx.c (id_names): Add nop4, nop5, nop6 and nop7.
(decode_opcode): Likewise.
(get_op): Handle RX_Operand_Zero_Indirect.
Handle RX_Bad_Size and RX_MAX_SIZE.
(put_op): Likewise.
Comments
> sim/rx/ChangeLog
> 2015-11-09 Nick Clifton <nickc@redhat.com>
>
> * rx.c (id_names): Add nop4, nop5, nop6 and nop7.
> (decode_opcode): Likewise.
> (get_op): Handle RX_Operand_Zero_Indirect.
> Handle RX_Bad_Size and RX_MAX_SIZE.
> (put_op): Likewise.
Ok. Thanks!
@@ -80,6 +80,10 @@ static const char * id_names[] = {
"RXO_nop",
"RXO_nop2",
"RXO_nop3",
+ "RXO_nop4",
+ "RXO_nop5",
+ "RXO_nop6",
+ "RXO_nop7",
"RXO_scmpu",
"RXO_smovu",
@@ -406,6 +410,7 @@ get_op (const RX_Opcode_Decoded *rd, int i)
put_reg (o->reg, get_reg (o->reg) - size2bytes[o->size]);
/* fall through */
case RX_Operand_Postinc: /* [Rn+] */
+ case RX_Operand_Zero_Indirect: /* [Rn + 0] */
case RX_Operand_Indirect: /* [Rn + addend] */
case RX_Operand_TwoReg: /* [Rn + scale * R2] */
#ifdef CYCLE_ACCURATE
@@ -433,6 +438,7 @@ get_op (const RX_Opcode_Decoded *rd, int i)
switch (o->size)
{
+ default:
case RX_AnySize:
rx_abort ();
@@ -473,6 +479,7 @@ get_op (const RX_Opcode_Decoded *rd, int i)
to the size. */
switch (o->size)
{
+ default:
case RX_AnySize:
rx_abort ();
@@ -518,6 +525,7 @@ put_op (const RX_Opcode_Decoded *rd, int i, int v)
switch (o->size)
{
+ default:
case RX_AnySize:
if (o->type != RX_Operand_Register)
rx_abort ();
@@ -574,6 +582,7 @@ put_op (const RX_Opcode_Decoded *rd, int i, int v)
put_reg (o->reg, get_reg (o->reg) - size2bytes[o->size]);
/* fall through */
case RX_Operand_Postinc: /* [Rn+] */
+ case RX_Operand_Zero_Indirect: /* [Rn + 0] */
case RX_Operand_Indirect: /* [Rn + addend] */
case RX_Operand_TwoReg: /* [Rn + scale * R2] */
@@ -597,6 +606,7 @@ put_op (const RX_Opcode_Decoded *rd, int i, int v)
switch (o->size)
{
+ default:
case RX_AnySize:
rx_abort ();
@@ -1504,6 +1514,10 @@ decode_opcode ()
case RXO_nop:
case RXO_nop2:
case RXO_nop3:
+ case RXO_nop4:
+ case RXO_nop5:
+ case RXO_nop6:
+ case RXO_nop7:
E1;
break;