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gdb: Add XMM16–XMM31 and K0-K1 DWARF register number mapping

Message ID 20240214135916.30504-1-hjl.tools@gmail.com
State Superseded
Headers
Series gdb: Add XMM16–XMM31 and K0-K1 DWARF register number mapping |

Checks

Context Check Description
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linaro-tcwg-bot/tcwg_gdb_build--master-arm success Testing passed
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Commit Message

H.J. Lu Feb. 14, 2024, 1:59 p.m. UTC 
  Add XMM16–XMM31 and K0-K1 DWARF register number mapping to
amd64_dwarf_regmap.
---
 gdb/amd64-tdep.c | 23 ++++++++++++++++++++++-
 1 file changed, 22 insertions(+), 1 deletion(-)
diff mbox series

Patch

diff --git a/gdb/amd64-tdep.c b/gdb/amd64-tdep.c
index a8ff9246b8a..637b36270cb 100644
--- a/gdb/amd64-tdep.c
+++ b/gdb/amd64-tdep.c
@@ -235,7 +235,28 @@  static int amd64_dwarf_regmap[] =
   /* Floating Point Control Registers.  */
   AMD64_MXCSR_REGNUM,
   AMD64_FCTRL_REGNUM,
-  AMD64_FSTAT_REGNUM
+  AMD64_FSTAT_REGNUM,
+
+  /* XMM16–XMM31.  */
+  AMD64_XMM16_REGNUM + 0, AMD64_XMM16_REGNUM + 1,
+  AMD64_XMM16_REGNUM + 2, AMD64_XMM16_REGNUM + 3,
+  AMD64_XMM16_REGNUM + 4, AMD64_XMM16_REGNUM + 5,
+  AMD64_XMM16_REGNUM + 6, AMD64_XMM16_REGNUM + 7,
+  AMD64_XMM16_REGNUM + 8, AMD64_XMM16_REGNUM + 9,
+  AMD64_XMM16_REGNUM + 10, AMD64_XMM16_REGNUM + 11,
+  AMD64_XMM16_REGNUM + 12, AMD64_XMM16_REGNUM + 13,
+  AMD64_XMM16_REGNUM + 14, AMD64_XMM16_REGNUM + 15,
+
+  /* Reserved.  */
+  -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
+  -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
+  -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
+
+  /* Mask Registers.  */
+  AMD64_K0_REGNUM + 0, AMD64_K0_REGNUM + 1,
+  AMD64_K0_REGNUM + 2, AMD64_K0_REGNUM + 3,
+  AMD64_K0_REGNUM + 4, AMD64_K0_REGNUM + 5,
+  AMD64_K0_REGNUM + 6, AMD64_K0_REGNUM + 7
 };
 
 static const int amd64_dwarf_regmap_len =