diff mbox series

[PATCH/committed] sim: sh: add missing breaks to bit processing

Message ID 20231221064626.15388-1-vapier@gentoo.org
State New
Headers
Series [PATCH/committed] sim: sh: add missing breaks to bit processing |

Checks

Context Check Description
linaro-tcwg-bot/tcwg_gdb_build--master-arm warning Patch is already merged
linaro-tcwg-bot/tcwg_gdb_build--master-aarch64 warning Patch is already merged

Commit Message

Mike Frysinger Dec. 21, 2023, 6:46 a.m. UTC 
  Doesn't seem like we want to cascade in this section when bit processing.
---
 sim/sh/gencode.c | 6 ++++++
 1 file changed, 6 insertions(+)
diff mbox series

Patch

diff --git a/sim/sh/gencode.c b/sim/sh/gencode.c
index 2522ec124f86..1835cf92ff3f 100644
--- a/sim/sh/gencode.c
+++ b/sim/sh/gencode.c
@@ -3359,16 +3359,22 @@  ppi_gensim (void)
   printf ("    {\n");
   printf ("    case 0: /* Carry Mode */\n");
   printf ("      DSR |= carry;\n");
+  printf ("      break;\n");
   printf ("    case 1: /* Negative Value Mode */\n");
   printf ("      DSR |= res_grd >> 7 & 1;\n");
+  printf ("      break;\n");
   printf ("    case 2: /* Zero Value Mode */\n");
   printf ("      DSR |= DSR >> 6 & 1;\n");
+  printf ("      break;\n");
   printf ("    case 3: /* Overflow mode */\n");
   printf ("      DSR |= overflow >> 4;\n");
+  printf ("      break;\n");
   printf ("    case 4: /* Signed Greater Than Mode */\n");
   printf ("      DSR |= DSR >> 7 & 1;\n");
+  printf ("      break;\n");
   printf ("    case 5: /* Signed Greater Than Or Equal Mode */\n");
   printf ("      DSR |= greater_equal >> 7;\n");
+  printf ("      break;\n");
   printf ("    }\n");
   printf (" assign_z:\n");
   printf ("  if (0xa05f >> z & 1)\n");