diff mbox series

[PATCH/committed] sim: cr16: add missing break statement

Message ID 20231221064215.5428-1-vapier@gentoo.org
State New
Headers
Series [PATCH/committed] sim: cr16: add missing break statement |

Checks

Context Check Description
linaro-tcwg-bot/tcwg_gdb_build--master-aarch64 success Testing passed
linaro-tcwg-bot/tcwg_gdb_build--master-arm warning Patch is already merged
linaro-tcwg-bot/tcwg_gdb_check--master-aarch64 success Testing passed

Commit Message

Mike Frysinger Dec. 21, 2023, 6:42 a.m. UTC 
  Doesn't seem to make sense for this to fall through
(although I'm not an expert in this ISA).
---
 sim/cr16/interp.c | 1 +
 1 file changed, 1 insertion(+)
diff mbox series

Patch

diff --git a/sim/cr16/interp.c b/sim/cr16/interp.c
index 9a2363a6d528..0fa9a91c0132 100644
--- a/sim/cr16/interp.c
+++ b/sim/cr16/interp.c
@@ -288,6 +288,7 @@  get_operands (operand_desc *s, uint64_t ins, int isize, int nops)
             OP[i] = (ins) & 0x3FFF;
             OP[++i] = (ins >> 14) & 0x1;     /* get 1 bit for index-reg.  */
             OP[++i] = (ins >> 16) & 0xF;     /* get 4 bit for reg.  */
+            break;
           case rindex7_abs20:
           case rindex8_abs20:
             OP[i] = (ins) & 0xFFFFF;