diff mbox series

sim: mips: merge mips64vr4300 with existing multi-run build

Message ID 20221222034538.10335-1-vapier@gentoo.org
State Committed
Commit 2ac6aa431ecf8bf6afdc18020f3d6e55458df223
Headers
Series sim: mips: merge mips64vr4300 with existing multi-run build |

Commit Message

Mike Frysinger Dec. 22, 2022, 3:45 a.m. UTC 
  The existing mips64vr-* multi-run build already handles mips4300
targets, so reuse that for mips64vr43* targets too.  This moves
more logic from build-time to runtime so we can have a single
binary that supports many targets.
---
 sim/mips/configure    | 5 +----
 sim/mips/configure.ac | 5 +----
 2 files changed, 2 insertions(+), 8 deletions(-)
diff mbox series

Patch

diff --git a/sim/mips/configure b/sim/mips/configure
index 80963681d4ef..bc762fc04f84 100755
--- a/sim/mips/configure
+++ b/sim/mips/configure
@@ -1847,9 +1847,6 @@  case "${target}" in
 			sim_igen_filter="32,f"
 			sim_igen_machine="-M r3900"
 			;;
-  mips64vr43*)		sim_gen=IGEN
-			sim_igen_machine="-M mipsIV"
-			;;
   mips64vr5*)		sim_gen=IGEN
 			sim_igen_machine="-M vr5000"
 			;;
@@ -1859,7 +1856,7 @@  case "${target}" in
 			sim_igen_filter="32,64,f"
 			sim_m16_filter="16"
                         ;;
-  mips64vr-* | mips64vrel-*)
+  mips64vr43* | mips64vr-* | mips64vrel-*)
 			sim_gen=MULTI
 			sim_multi_configs="\
 			  vr4100:mipsIII,mips16,vr4100:32,64:mips4100,mips4111\
diff --git a/sim/mips/configure.ac b/sim/mips/configure.ac
index bdea84e821cd..a09e9a14c798 100644
--- a/sim/mips/configure.ac
+++ b/sim/mips/configure.ac
@@ -20,9 +20,6 @@  case "${target}" in
 			sim_igen_filter="32,f"
 			sim_igen_machine="-M r3900"
 			;;
-  mips64vr43*)		sim_gen=IGEN
-			sim_igen_machine="-M mipsIV"
-			;;
   mips64vr5*)		sim_gen=IGEN
 			sim_igen_machine="-M vr5000"
 			;;
@@ -32,7 +29,7 @@  case "${target}" in
 			sim_igen_filter="32,64,f"
 			sim_m16_filter="16"
                         ;;
-  mips64vr-* | mips64vrel-*)
+  mips64vr43* | mips64vr-* | mips64vrel-*)
 			sim_gen=MULTI
 			sim_multi_configs="\
 			  vr4100:mipsIII,mips16,vr4100:32,64:mips4100,mips4111\