gdb/arm: Don't rely on loop detection to stop unwind

Message ID 20221014134559.721433-1-torbjorn.svensson@foss.st.com
State Committed
Commit 619cce4cac9b7ad5f4604cd5a63933e71515e16f
Headers
Series gdb/arm: Don't rely on loop detection to stop unwind |

Commit Message

Torbjorn SVENSSON Oct. 14, 2022, 1:46 p.m. UTC
  Setting SP of the next frame to the same address as the current frame
is an ugly way to stop the unwind.  A cleaner way is to rely on the
frame_unwind_stop_reason function to return UNWIND_OUTERMOST.

Signed-off-by: Torbjörn SVENSSON <torbjorn.svensson@foss.st.com>
---
 gdb/arm-tdep.c | 13 ++++++-------
 1 file changed, 6 insertions(+), 7 deletions(-)
  

Comments

Luis Machado Oct. 14, 2022, 5:13 p.m. UTC | #1
On 10/14/22 14:46, Torbjörn SVENSSON wrote:
> Setting SP of the next frame to the same address as the current frame
> is an ugly way to stop the unwind.  A cleaner way is to rely on the

stop the unwind -> stop the unwinding.

> frame_unwind_stop_reason function to return UNWIND_OUTERMOST.
> 
> Signed-off-by: Torbjörn SVENSSON <torbjorn.svensson@foss.st.com>
> ---
>   gdb/arm-tdep.c | 13 ++++++-------
>   1 file changed, 6 insertions(+), 7 deletions(-)
> 
> diff --git a/gdb/arm-tdep.c b/gdb/arm-tdep.c
> index fa6b08e4a54..b5facae8a5e 100644
> --- a/gdb/arm-tdep.c
> +++ b/gdb/arm-tdep.c
> @@ -3356,7 +3356,6 @@ arm_m_exception_cache (frame_info_ptr this_frame)
>        to the exception and if FPU is used (causing extended stack frame).  */
>   
>     CORE_ADDR lr = get_frame_register_unsigned (this_frame, ARM_LR_REGNUM);
> -  CORE_ADDR sp = get_frame_register_unsigned (this_frame, ARM_SP_REGNUM);
>   
>     /* ARMv7-M Architecture Reference "A2.3.1 Arm core registers"
>        states that LR is set to 0xffffffff on reset.  ARMv8-M Architecture
> @@ -3364,8 +3363,8 @@ arm_m_exception_cache (frame_info_ptr this_frame)
>        reset if Main Extension is implemented, otherwise the value is unknown.  */
>     if (lr == 0xffffffff)
>       {
> -      /* Terminate any further stack unwinding by referring to self.  */
> -      arm_cache_set_active_sp_value (cache, tdep, sp);
> +      /* Terminate any further stack unwinding.  */
> +      arm_cache_set_active_sp_value (cache, tdep, 0);
>         return cache;
>       }
>   
> @@ -3387,8 +3386,8 @@ arm_m_exception_cache (frame_info_ptr this_frame)
>   	{
>   	  warning (_("Non-secure to secure stack unwinding disabled."));
>   
> -	  /* Terminate any further stack unwinding by referring to self.  */
> -	  arm_cache_set_active_sp_value (cache, tdep, sp);
> +	  /* Terminate any further stack unwinding.  */
> +	  arm_cache_set_active_sp_value (cache, tdep, 0);
>   	  return cache;
>   	}
>   
> @@ -3452,8 +3451,8 @@ arm_m_exception_cache (frame_info_ptr this_frame)
>   	    {
>   	      warning (_("Non-secure to secure stack unwinding disabled."));
>   
> -	      /* Terminate any further stack unwinding by referring to self.  */
> -	      arm_cache_set_active_sp_value (cache, tdep, sp);
> +	      /* Terminate any further stack unwinding.  */
> +	      arm_cache_set_active_sp_value (cache, tdep, 0);
>   	      return cache;
>   	    }
>   
LGTM. Thanks.
  
Torbjorn SVENSSON Oct. 15, 2022, 9:40 a.m. UTC | #2
On 2022-10-14 19:13, Luis Machado wrote:
> On 10/14/22 14:46, Torbjörn SVENSSON wrote:
>> Setting SP of the next frame to the same address as the current frame
>> is an ugly way to stop the unwind.  A cleaner way is to rely on the
> 
> stop the unwind -> stop the unwinding.
> 
>> frame_unwind_stop_reason function to return UNWIND_OUTERMOST.
>>
>> Signed-off-by: Torbjörn SVENSSON <torbjorn.svensson@foss.st.com>
>> ---
>>   gdb/arm-tdep.c | 13 ++++++-------
>>   1 file changed, 6 insertions(+), 7 deletions(-)
>>
>> diff --git a/gdb/arm-tdep.c b/gdb/arm-tdep.c
>> index fa6b08e4a54..b5facae8a5e 100644
>> --- a/gdb/arm-tdep.c
>> +++ b/gdb/arm-tdep.c
>> @@ -3356,7 +3356,6 @@ arm_m_exception_cache (frame_info_ptr this_frame)
>>        to the exception and if FPU is used (causing extended stack 
>> frame).  */
>>     CORE_ADDR lr = get_frame_register_unsigned (this_frame, 
>> ARM_LR_REGNUM);
>> -  CORE_ADDR sp = get_frame_register_unsigned (this_frame, 
>> ARM_SP_REGNUM);
>>     /* ARMv7-M Architecture Reference "A2.3.1 Arm core registers"
>>        states that LR is set to 0xffffffff on reset.  ARMv8-M 
>> Architecture
>> @@ -3364,8 +3363,8 @@ arm_m_exception_cache (frame_info_ptr this_frame)
>>        reset if Main Extension is implemented, otherwise the value is 
>> unknown.  */
>>     if (lr == 0xffffffff)
>>       {
>> -      /* Terminate any further stack unwinding by referring to self.  */
>> -      arm_cache_set_active_sp_value (cache, tdep, sp);
>> +      /* Terminate any further stack unwinding.  */
>> +      arm_cache_set_active_sp_value (cache, tdep, 0);
>>         return cache;
>>       }
>> @@ -3387,8 +3386,8 @@ arm_m_exception_cache (frame_info_ptr this_frame)
>>       {
>>         warning (_("Non-secure to secure stack unwinding disabled."));
>> -      /* Terminate any further stack unwinding by referring to self.  */
>> -      arm_cache_set_active_sp_value (cache, tdep, sp);
>> +      /* Terminate any further stack unwinding.  */
>> +      arm_cache_set_active_sp_value (cache, tdep, 0);
>>         return cache;
>>       }
>> @@ -3452,8 +3451,8 @@ arm_m_exception_cache (frame_info_ptr this_frame)
>>           {
>>             warning (_("Non-secure to secure stack unwinding 
>> disabled."));
>> -          /* Terminate any further stack unwinding by referring to 
>> self.  */
>> -          arm_cache_set_active_sp_value (cache, tdep, sp);
>> +          /* Terminate any further stack unwinding.  */
>> +          arm_cache_set_active_sp_value (cache, tdep, 0);
>>             return cache;
>>           }
> LGTM. Thanks.

Pushed.
  

Patch

diff --git a/gdb/arm-tdep.c b/gdb/arm-tdep.c
index fa6b08e4a54..b5facae8a5e 100644
--- a/gdb/arm-tdep.c
+++ b/gdb/arm-tdep.c
@@ -3356,7 +3356,6 @@  arm_m_exception_cache (frame_info_ptr this_frame)
      to the exception and if FPU is used (causing extended stack frame).  */
 
   CORE_ADDR lr = get_frame_register_unsigned (this_frame, ARM_LR_REGNUM);
-  CORE_ADDR sp = get_frame_register_unsigned (this_frame, ARM_SP_REGNUM);
 
   /* ARMv7-M Architecture Reference "A2.3.1 Arm core registers"
      states that LR is set to 0xffffffff on reset.  ARMv8-M Architecture
@@ -3364,8 +3363,8 @@  arm_m_exception_cache (frame_info_ptr this_frame)
      reset if Main Extension is implemented, otherwise the value is unknown.  */
   if (lr == 0xffffffff)
     {
-      /* Terminate any further stack unwinding by referring to self.  */
-      arm_cache_set_active_sp_value (cache, tdep, sp);
+      /* Terminate any further stack unwinding.  */
+      arm_cache_set_active_sp_value (cache, tdep, 0);
       return cache;
     }
 
@@ -3387,8 +3386,8 @@  arm_m_exception_cache (frame_info_ptr this_frame)
 	{
 	  warning (_("Non-secure to secure stack unwinding disabled."));
 
-	  /* Terminate any further stack unwinding by referring to self.  */
-	  arm_cache_set_active_sp_value (cache, tdep, sp);
+	  /* Terminate any further stack unwinding.  */
+	  arm_cache_set_active_sp_value (cache, tdep, 0);
 	  return cache;
 	}
 
@@ -3452,8 +3451,8 @@  arm_m_exception_cache (frame_info_ptr this_frame)
 	    {
 	      warning (_("Non-secure to secure stack unwinding disabled."));
 
-	      /* Terminate any further stack unwinding by referring to self.  */
-	      arm_cache_set_active_sp_value (cache, tdep, sp);
+	      /* Terminate any further stack unwinding.  */
+	      arm_cache_set_active_sp_value (cache, tdep, 0);
 	      return cache;
 	    }