diff mbox

[16/17,PowerPC] Add support for EBB and PMU registers

Message ID 20180713135226.2321-17-pedromfc@linux.ibm.com
State New
Headers show

Commit Message

Pedro Franco de Carvalho July 13, 2018, 1:52 p.m. UTC 
From: Edjunior Barbosa Machado <emachado@linux.vnet.ibm.com>

This patch adds support for registers of the Event Based Branching and
Performance Monitoring Units for the powerpc linux native and core
file targets.

All three EBB registers are accessible. Only a subset of the PMU
registers can be accessed through ptrace. Because of this, the PMU
registers are enumerated indivitually in gdbarch_tdep, as opposed to
having a single "have_pmu" flag. This is intended to make it easier to
add additional PMU registers in the future, since checking a
"have_pmu" flag elsewhere in the code would no longer be correct.

It's unclear if it makes sense to save and restore these registers
across function calls, since some of them can be modified
asynchronously. They are also not tracked in record-replay mode.

Currently, the kernel can return ENODATA when ptrace is used to get
the EBB registers, unless a linux performance event that uses EBB is
open in the inferior. However, EBB registers are always saved and
restored by the kernel, but not the PMU registers, so the ENODATA
might have been meant for the PMU registers. For this reason GDB
handles ENODATA for both regsets.

Like for the previous patches, configure.srv is updated here to avoid
breaking the build at this patch.

gdb/ChangeLog:
YYYY-MM-DD  Edjunior Barbosa Machado  <emachado@linux.vnet.ibm.com>
	    Pedro Franco de Carvalho  <pedromfc@linux.ibm.com>

	* arch/ppc-linux-common.h (PPC_LINUX_SIZEOF_EBBREGSET)
	(PPC_LINUX_SIZEOF_PMUREGSET): Declare.
	* nat/ppc-linux.h (PPC_FEATURE2_EBB, NT_PPC_EBB, NT_PPC_PMU):
	Define if not already defined.
	* features/rs6000/power-ebb.xml: New file.
	* features/rs6000/power-pmu.xml: New file.
	* features/rs6000/powerpc-isa207-vsx32l.xml: Include ebb and pmu
	features.
	* features/rs6000/powerpc-isa207-vsx64l.xml: Likewise.
	* features/rs6000/powerpc-isa207-htm-vsx32l.xml: Likewise.
	* features/rs6000/powerpc-isa207-htm-vsx64l.xml: Likewise.
	* features/rs6000/powerpc-isa207-vsx32l.c: Re-generate.
	* features/rs6000/powerpc-isa207-vsx64l.c: Re-generate.
	* features/rs6000/powerpc-isa207-htm-vsx32l.c: Re-generate.
	* features/rs6000/powerpc-isa207-htm-vsx64l.c: Re-generate.
	* regformats/rs6000/powerpc-isa207-vsx32l.dat: Re-generate.
	* regformats/rs6000/powerpc-isa207-vsx64l.dat: Re-generate.
	* regformats/rs6000/powerpc-isa207-htm-vsx32l.dat: Re-generate.
	* regformats/rs6000/powerpc-isa207-htm-vsx64l.dat: Re-generate.
	* ppc-linux-nat.c (fetch_register, fetch_ppc_registers): Call
	fetch_regset with ebb and pmu regsets.
	(store_register, store_ppc_registers): Call store_regset with ebb
	and pmu regsets.
	(ppc_linux_nat_target::read_description): Set isa207 field in the
	features struct if ebb and pmu are avaiable.
	* ppc-linux-tdep.c (ppc32_regmap_ebb, ppc32_regmap_pmu)
	(ppc32_linux_ebbregset, ppc32_linux_pmuregset): New globals.
	(ppc_linux_iterate_over_regset_sections): Call back with the ebb
	and pmu regsets.
	(ppc_linux_core_read_description): Add comment.
	* ppc-linux-tdep.h (ppc32_linux_ebbregset, ppc32_linux_pmuregset):
	Declare.
	* ppc-tdep.h (struct gdbarch_tdep) <ppc_mmcr0_regnum>: New field.
	<ppc_mmcr2_regnum, ppc_siar_regnum, ppc_sdar_regnum>: New fields.
	<ppc_sier_regnum>: New field.
	(enum): <PPC_BESCR_REGNUM, PPC_EBBHR_REGNUM, PPC_EBBRR_REGNUM>:
	New enum values.
	<PPC_MMCR0_REGNUM, PPC_MMCR2_REGNUM, PPC_SIAR_REGNUM>: New enum
	values.
	<PPC_SDAR_REGNUM, PPC_SIER_REGNUM>: New enum values.
	(PPC_IS_EBB_REGNUM, PPC_IS_PMU_REGNUM): Define.
	* rs6000-tdep.c (rs6000_gdbarch_init): Look for and validate the
	ebb and pmu features.

gdb/gdbserver/ChangeLog:
YYYY-MM-DD  Pedro Franco de Carvalho  <pedromfc@linux.ibm.com>

	* configure.srv (powerpc*-*-linux*): Add rs6000/power-ebb.xml and
	rs6000/power-pmu.xml to srv_xmlfiles.
---
 gdb/arch/ppc-linux-common.h                        |   2 +
 gdb/features/rs6000/power-ebb.xml                  |  14 +
 gdb/features/rs6000/power-pmu.xml                  |  16 ++
 gdb/features/rs6000/powerpc-isa207-htm-vsx32l.c    | 294 +++++++++++----------
 gdb/features/rs6000/powerpc-isa207-htm-vsx32l.xml  |   2 +
 gdb/features/rs6000/powerpc-isa207-htm-vsx64l.c    | 294 +++++++++++----------
 gdb/features/rs6000/powerpc-isa207-htm-vsx64l.xml  |   2 +
 gdb/features/rs6000/powerpc-isa207-vsx32l.c        |  12 +
 gdb/features/rs6000/powerpc-isa207-vsx32l.xml      |   2 +
 gdb/features/rs6000/powerpc-isa207-vsx64l.c        |  12 +
 gdb/features/rs6000/powerpc-isa207-vsx64l.xml      |   2 +
 gdb/gdbserver/configure.srv                        |   2 +
 gdb/nat/ppc-linux.h                                |  13 +
 gdb/ppc-linux-nat.c                                |  64 ++++-
 gdb/ppc-linux-tdep.c                               |  52 ++++
 gdb/ppc-linux-tdep.h                               |   2 +
 gdb/ppc-tdep.h                                     |  59 +++--
 .../rs6000/powerpc-isa207-htm-vsx32l.dat           |   8 +
 .../rs6000/powerpc-isa207-htm-vsx64l.dat           |   8 +
 gdb/regformats/rs6000/powerpc-isa207-vsx32l.dat    |   8 +
 gdb/regformats/rs6000/powerpc-isa207-vsx64l.dat    |   8 +
 gdb/rs6000-tdep.c                                  |  65 ++++-
 22 files changed, 640 insertions(+), 301 deletions(-)
 create mode 100644 gdb/features/rs6000/power-ebb.xml
 create mode 100644 gdb/features/rs6000/power-pmu.xml
diff mbox

Patch

diff --git a/gdb/arch/ppc-linux-common.h b/gdb/arch/ppc-linux-common.h
index 71e2d5d173..9ecb02bcf6 100644
--- a/gdb/arch/ppc-linux-common.h
+++ b/gdb/arch/ppc-linux-common.h
@@ -33,6 +33,8 @@  struct target_desc;
 #define PPC_LINUX_SIZEOF_PPRREGSET 8
 #define PPC_LINUX_SIZEOF_DSCRREGSET 8
 #define PPC_LINUX_SIZEOF_TARREGSET 8
+#define PPC_LINUX_SIZEOF_EBBREGSET (3*8)
+#define PPC_LINUX_SIZEOF_PMUREGSET (5*8)
 #define PPC_LINUX_SIZEOF_TM_SPRREGSET (3*8)
 #define PPC32_LINUX_SIZEOF_CGPRREGSET (48*4)
 #define PPC64_LINUX_SIZEOF_CGPRREGSET (48*8)
diff --git a/gdb/features/rs6000/power-ebb.xml b/gdb/features/rs6000/power-ebb.xml
new file mode 100644
index 0000000000..7bec21f916
--- /dev/null
+++ b/gdb/features/rs6000/power-ebb.xml
@@ -0,0 +1,14 @@ 
+<?xml version="1.0"?>
+<!-- Copyright (C) 2018 Free Software Foundation, Inc.
+
+     Copying and distribution of this file, with or without modification,
+     are permitted in any medium without royalty provided the copyright
+     notice and this notice are preserved.  -->
+
+<!-- POWER8 Event-based Branching Registers.  -->
+<!DOCTYPE feature SYSTEM "gdb-target.dtd">
+<feature name="org.gnu.gdb.power.ebb">
+  <reg name="bescr" bitsize="64" type="uint64" save-restore="no"/>
+  <reg name="ebbhr" bitsize="64" type="uint64" save-restore="no"/>
+  <reg name="ebbrr" bitsize="64" type="uint64" save-restore="no"/>
+</feature>
diff --git a/gdb/features/rs6000/power-pmu.xml b/gdb/features/rs6000/power-pmu.xml
new file mode 100644
index 0000000000..8f20c5df07
--- /dev/null
+++ b/gdb/features/rs6000/power-pmu.xml
@@ -0,0 +1,16 @@ 
+<?xml version="1.0"?>
+<!-- Copyright (C) 2018 Free Software Foundation, Inc.
+
+     Copying and distribution of this file, with or without modification,
+     are permitted in any medium without royalty provided the copyright
+     notice and this notice are preserved.  -->
+
+<!-- POWER8 Performance Monitor Registers.  -->
+<!DOCTYPE feature SYSTEM "gdb-target.dtd">
+<feature name="org.gnu.gdb.power.pmu">
+  <reg name="mmcr0" bitsize="64" type="uint64" save-restore="no"/>
+  <reg name="mmcr2" bitsize="64" type="uint64" save-restore="no"/>
+  <reg name="siar" bitsize="64" type="uint64" save-restore="no"/>
+  <reg name="sdar" bitsize="64" type="uint64" save-restore="no"/>
+  <reg name="sier" bitsize="64" type="uint64" save-restore="no"/>
+</feature>
diff --git a/gdb/features/rs6000/powerpc-isa207-htm-vsx32l.c b/gdb/features/rs6000/powerpc-isa207-htm-vsx32l.c
index 99c6a7feb7..4c3b977d82 100644
--- a/gdb/features/rs6000/powerpc-isa207-htm-vsx32l.c
+++ b/gdb/features/rs6000/powerpc-isa207-htm-vsx32l.c
@@ -199,6 +199,18 @@  initialize_tdesc_powerpc_isa207_htm_vsx32l (void)
   feature = tdesc_create_feature (result, "org.gnu.gdb.power.tar");
   tdesc_create_reg (feature, "tar", 141, 1, NULL, 64, "uint64");
 
+  feature = tdesc_create_feature (result, "org.gnu.gdb.power.ebb");
+  tdesc_create_reg (feature, "bescr", 142, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "ebbhr", 143, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "ebbrr", 144, 0, NULL, 64, "uint64");
+
+  feature = tdesc_create_feature (result, "org.gnu.gdb.power.pmu");
+  tdesc_create_reg (feature, "mmcr0", 145, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "mmcr2", 146, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "siar", 147, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "sdar", 148, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "sier", 149, 0, NULL, 64, "uint64");
+
   feature = tdesc_create_feature (result, "org.gnu.gdb.power.htm");
   element_type = tdesc_named_type (feature, "ieee_single");
   tdesc_create_vector (feature, "v4f", element_type, 4);
@@ -224,147 +236,147 @@  initialize_tdesc_powerpc_isa207_htm_vsx32l (void)
   field_type = tdesc_named_type (feature, "v16i8");
   tdesc_add_field (type_with_fields, "v16_int8", field_type);
 
-  tdesc_create_reg (feature, "tfhar", 142, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "texasr", 143, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "tfiar", 144, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "cr0", 145, 0, NULL, 32, "uint32");
-  tdesc_create_reg (feature, "cr1", 146, 0, NULL, 32, "uint32");
-  tdesc_create_reg (feature, "cr2", 147, 0, NULL, 32, "uint32");
-  tdesc_create_reg (feature, "cr3", 148, 0, NULL, 32, "uint32");
-  tdesc_create_reg (feature, "cr4", 149, 0, NULL, 32, "uint32");
-  tdesc_create_reg (feature, "cr5", 150, 0, NULL, 32, "uint32");
-  tdesc_create_reg (feature, "cr6", 151, 0, NULL, 32, "uint32");
-  tdesc_create_reg (feature, "cr7", 152, 0, NULL, 32, "uint32");
-  tdesc_create_reg (feature, "cr8", 153, 0, NULL, 32, "uint32");
-  tdesc_create_reg (feature, "cr9", 154, 0, NULL, 32, "uint32");
-  tdesc_create_reg (feature, "cr10", 155, 0, NULL, 32, "uint32");
-  tdesc_create_reg (feature, "cr11", 156, 0, NULL, 32, "uint32");
-  tdesc_create_reg (feature, "cr12", 157, 0, NULL, 32, "uint32");
-  tdesc_create_reg (feature, "cr13", 158, 0, NULL, 32, "uint32");
-  tdesc_create_reg (feature, "cr14", 159, 0, NULL, 32, "uint32");
-  tdesc_create_reg (feature, "cr15", 160, 0, NULL, 32, "uint32");
-  tdesc_create_reg (feature, "cr16", 161, 0, NULL, 32, "uint32");
-  tdesc_create_reg (feature, "cr17", 162, 0, NULL, 32, "uint32");
-  tdesc_create_reg (feature, "cr18", 163, 0, NULL, 32, "uint32");
-  tdesc_create_reg (feature, "cr19", 164, 0, NULL, 32, "uint32");
-  tdesc_create_reg (feature, "cr20", 165, 0, NULL, 32, "uint32");
-  tdesc_create_reg (feature, "cr21", 166, 0, NULL, 32, "uint32");
-  tdesc_create_reg (feature, "cr22", 167, 0, NULL, 32, "uint32");
-  tdesc_create_reg (feature, "cr23", 168, 0, NULL, 32, "uint32");
-  tdesc_create_reg (feature, "cr24", 169, 0, NULL, 32, "uint32");
-  tdesc_create_reg (feature, "cr25", 170, 0, NULL, 32, "uint32");
-  tdesc_create_reg (feature, "cr26", 171, 0, NULL, 32, "uint32");
-  tdesc_create_reg (feature, "cr27", 172, 0, NULL, 32, "uint32");
-  tdesc_create_reg (feature, "cr28", 173, 0, NULL, 32, "uint32");
-  tdesc_create_reg (feature, "cr29", 174, 0, NULL, 32, "uint32");
-  tdesc_create_reg (feature, "cr30", 175, 0, NULL, 32, "uint32");
-  tdesc_create_reg (feature, "cr31", 176, 0, NULL, 32, "uint32");
-  tdesc_create_reg (feature, "ccr", 177, 0, NULL, 32, "uint32");
-  tdesc_create_reg (feature, "cxer", 178, 0, NULL, 32, "uint32");
-  tdesc_create_reg (feature, "clr", 179, 0, NULL, 32, "code_ptr");
-  tdesc_create_reg (feature, "cctr", 180, 0, NULL, 32, "uint32");
-  tdesc_create_reg (feature, "cf0", 181, 0, NULL, 64, "ieee_double");
-  tdesc_create_reg (feature, "cf1", 182, 0, NULL, 64, "ieee_double");
-  tdesc_create_reg (feature, "cf2", 183, 0, NULL, 64, "ieee_double");
-  tdesc_create_reg (feature, "cf3", 184, 0, NULL, 64, "ieee_double");
-  tdesc_create_reg (feature, "cf4", 185, 0, NULL, 64, "ieee_double");
-  tdesc_create_reg (feature, "cf5", 186, 0, NULL, 64, "ieee_double");
-  tdesc_create_reg (feature, "cf6", 187, 0, NULL, 64, "ieee_double");
-  tdesc_create_reg (feature, "cf7", 188, 0, NULL, 64, "ieee_double");
-  tdesc_create_reg (feature, "cf8", 189, 0, NULL, 64, "ieee_double");
-  tdesc_create_reg (feature, "cf9", 190, 0, NULL, 64, "ieee_double");
-  tdesc_create_reg (feature, "cf10", 191, 0, NULL, 64, "ieee_double");
-  tdesc_create_reg (feature, "cf11", 192, 0, NULL, 64, "ieee_double");
-  tdesc_create_reg (feature, "cf12", 193, 0, NULL, 64, "ieee_double");
-  tdesc_create_reg (feature, "cf13", 194, 0, NULL, 64, "ieee_double");
-  tdesc_create_reg (feature, "cf14", 195, 0, NULL, 64, "ieee_double");
-  tdesc_create_reg (feature, "cf15", 196, 0, NULL, 64, "ieee_double");
-  tdesc_create_reg (feature, "cf16", 197, 0, NULL, 64, "ieee_double");
-  tdesc_create_reg (feature, "cf17", 198, 0, NULL, 64, "ieee_double");
-  tdesc_create_reg (feature, "cf18", 199, 0, NULL, 64, "ieee_double");
-  tdesc_create_reg (feature, "cf19", 200, 0, NULL, 64, "ieee_double");
-  tdesc_create_reg (feature, "cf20", 201, 0, NULL, 64, "ieee_double");
-  tdesc_create_reg (feature, "cf21", 202, 0, NULL, 64, "ieee_double");
-  tdesc_create_reg (feature, "cf22", 203, 0, NULL, 64, "ieee_double");
-  tdesc_create_reg (feature, "cf23", 204, 0, NULL, 64, "ieee_double");
-  tdesc_create_reg (feature, "cf24", 205, 0, NULL, 64, "ieee_double");
-  tdesc_create_reg (feature, "cf25", 206, 0, NULL, 64, "ieee_double");
-  tdesc_create_reg (feature, "cf26", 207, 0, NULL, 64, "ieee_double");
-  tdesc_create_reg (feature, "cf27", 208, 0, NULL, 64, "ieee_double");
-  tdesc_create_reg (feature, "cf28", 209, 0, NULL, 64, "ieee_double");
-  tdesc_create_reg (feature, "cf29", 210, 0, NULL, 64, "ieee_double");
-  tdesc_create_reg (feature, "cf30", 211, 0, NULL, 64, "ieee_double");
-  tdesc_create_reg (feature, "cf31", 212, 0, NULL, 64, "ieee_double");
-  tdesc_create_reg (feature, "cfpscr", 213, 0, "float", 64, "uint64");
-  tdesc_create_reg (feature, "cvr0", 214, 0, NULL, 128, "vec128");
-  tdesc_create_reg (feature, "cvr1", 215, 0, NULL, 128, "vec128");
-  tdesc_create_reg (feature, "cvr2", 216, 0, NULL, 128, "vec128");
-  tdesc_create_reg (feature, "cvr3", 217, 0, NULL, 128, "vec128");
-  tdesc_create_reg (feature, "cvr4", 218, 0, NULL, 128, "vec128");
-  tdesc_create_reg (feature, "cvr5", 219, 0, NULL, 128, "vec128");
-  tdesc_create_reg (feature, "cvr6", 220, 0, NULL, 128, "vec128");
-  tdesc_create_reg (feature, "cvr7", 221, 0, NULL, 128, "vec128");
-  tdesc_create_reg (feature, "cvr8", 222, 0, NULL, 128, "vec128");
-  tdesc_create_reg (feature, "cvr9", 223, 0, NULL, 128, "vec128");
-  tdesc_create_reg (feature, "cvr10", 224, 0, NULL, 128, "vec128");
-  tdesc_create_reg (feature, "cvr11", 225, 0, NULL, 128, "vec128");
-  tdesc_create_reg (feature, "cvr12", 226, 0, NULL, 128, "vec128");
-  tdesc_create_reg (feature, "cvr13", 227, 0, NULL, 128, "vec128");
-  tdesc_create_reg (feature, "cvr14", 228, 0, NULL, 128, "vec128");
-  tdesc_create_reg (feature, "cvr15", 229, 0, NULL, 128, "vec128");
-  tdesc_create_reg (feature, "cvr16", 230, 0, NULL, 128, "vec128");
-  tdesc_create_reg (feature, "cvr17", 231, 0, NULL, 128, "vec128");
-  tdesc_create_reg (feature, "cvr18", 232, 0, NULL, 128, "vec128");
-  tdesc_create_reg (feature, "cvr19", 233, 0, NULL, 128, "vec128");
-  tdesc_create_reg (feature, "cvr20", 234, 0, NULL, 128, "vec128");
-  tdesc_create_reg (feature, "cvr21", 235, 0, NULL, 128, "vec128");
-  tdesc_create_reg (feature, "cvr22", 236, 0, NULL, 128, "vec128");
-  tdesc_create_reg (feature, "cvr23", 237, 0, NULL, 128, "vec128");
-  tdesc_create_reg (feature, "cvr24", 238, 0, NULL, 128, "vec128");
-  tdesc_create_reg (feature, "cvr25", 239, 0, NULL, 128, "vec128");
-  tdesc_create_reg (feature, "cvr26", 240, 0, NULL, 128, "vec128");
-  tdesc_create_reg (feature, "cvr27", 241, 0, NULL, 128, "vec128");
-  tdesc_create_reg (feature, "cvr28", 242, 0, NULL, 128, "vec128");
-  tdesc_create_reg (feature, "cvr29", 243, 0, NULL, 128, "vec128");
-  tdesc_create_reg (feature, "cvr30", 244, 0, NULL, 128, "vec128");
-  tdesc_create_reg (feature, "cvr31", 245, 0, NULL, 128, "vec128");
-  tdesc_create_reg (feature, "cvscr", 246, 0, NULL, 32, "int");
-  tdesc_create_reg (feature, "cvrsave", 247, 0, NULL, 32, "int");
-  tdesc_create_reg (feature, "cvs0h", 248, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "cvs1h", 249, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "cvs2h", 250, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "cvs3h", 251, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "cvs4h", 252, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "cvs5h", 253, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "cvs6h", 254, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "cvs7h", 255, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "cvs8h", 256, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "cvs9h", 257, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "cvs10h", 258, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "cvs11h", 259, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "cvs12h", 260, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "cvs13h", 261, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "cvs14h", 262, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "cvs15h", 263, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "cvs16h", 264, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "cvs17h", 265, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "cvs18h", 266, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "cvs19h", 267, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "cvs20h", 268, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "cvs21h", 269, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "cvs22h", 270, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "cvs23h", 271, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "cvs24h", 272, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "cvs25h", 273, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "cvs26h", 274, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "cvs27h", 275, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "cvs28h", 276, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "cvs29h", 277, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "cvs30h", 278, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "cvs31h", 279, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "cppr", 280, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "cdscr", 281, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "ctar", 282, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "tfhar", 150, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "texasr", 151, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "tfiar", 152, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "cr0", 153, 0, NULL, 32, "uint32");
+  tdesc_create_reg (feature, "cr1", 154, 0, NULL, 32, "uint32");
+  tdesc_create_reg (feature, "cr2", 155, 0, NULL, 32, "uint32");
+  tdesc_create_reg (feature, "cr3", 156, 0, NULL, 32, "uint32");
+  tdesc_create_reg (feature, "cr4", 157, 0, NULL, 32, "uint32");
+  tdesc_create_reg (feature, "cr5", 158, 0, NULL, 32, "uint32");
+  tdesc_create_reg (feature, "cr6", 159, 0, NULL, 32, "uint32");
+  tdesc_create_reg (feature, "cr7", 160, 0, NULL, 32, "uint32");
+  tdesc_create_reg (feature, "cr8", 161, 0, NULL, 32, "uint32");
+  tdesc_create_reg (feature, "cr9", 162, 0, NULL, 32, "uint32");
+  tdesc_create_reg (feature, "cr10", 163, 0, NULL, 32, "uint32");
+  tdesc_create_reg (feature, "cr11", 164, 0, NULL, 32, "uint32");
+  tdesc_create_reg (feature, "cr12", 165, 0, NULL, 32, "uint32");
+  tdesc_create_reg (feature, "cr13", 166, 0, NULL, 32, "uint32");
+  tdesc_create_reg (feature, "cr14", 167, 0, NULL, 32, "uint32");
+  tdesc_create_reg (feature, "cr15", 168, 0, NULL, 32, "uint32");
+  tdesc_create_reg (feature, "cr16", 169, 0, NULL, 32, "uint32");
+  tdesc_create_reg (feature, "cr17", 170, 0, NULL, 32, "uint32");
+  tdesc_create_reg (feature, "cr18", 171, 0, NULL, 32, "uint32");
+  tdesc_create_reg (feature, "cr19", 172, 0, NULL, 32, "uint32");
+  tdesc_create_reg (feature, "cr20", 173, 0, NULL, 32, "uint32");
+  tdesc_create_reg (feature, "cr21", 174, 0, NULL, 32, "uint32");
+  tdesc_create_reg (feature, "cr22", 175, 0, NULL, 32, "uint32");
+  tdesc_create_reg (feature, "cr23", 176, 0, NULL, 32, "uint32");
+  tdesc_create_reg (feature, "cr24", 177, 0, NULL, 32, "uint32");
+  tdesc_create_reg (feature, "cr25", 178, 0, NULL, 32, "uint32");
+  tdesc_create_reg (feature, "cr26", 179, 0, NULL, 32, "uint32");
+  tdesc_create_reg (feature, "cr27", 180, 0, NULL, 32, "uint32");
+  tdesc_create_reg (feature, "cr28", 181, 0, NULL, 32, "uint32");
+  tdesc_create_reg (feature, "cr29", 182, 0, NULL, 32, "uint32");
+  tdesc_create_reg (feature, "cr30", 183, 0, NULL, 32, "uint32");
+  tdesc_create_reg (feature, "cr31", 184, 0, NULL, 32, "uint32");
+  tdesc_create_reg (feature, "ccr", 185, 0, NULL, 32, "uint32");
+  tdesc_create_reg (feature, "cxer", 186, 0, NULL, 32, "uint32");
+  tdesc_create_reg (feature, "clr", 187, 0, NULL, 32, "code_ptr");
+  tdesc_create_reg (feature, "cctr", 188, 0, NULL, 32, "uint32");
+  tdesc_create_reg (feature, "cf0", 189, 0, NULL, 64, "ieee_double");
+  tdesc_create_reg (feature, "cf1", 190, 0, NULL, 64, "ieee_double");
+  tdesc_create_reg (feature, "cf2", 191, 0, NULL, 64, "ieee_double");
+  tdesc_create_reg (feature, "cf3", 192, 0, NULL, 64, "ieee_double");
+  tdesc_create_reg (feature, "cf4", 193, 0, NULL, 64, "ieee_double");
+  tdesc_create_reg (feature, "cf5", 194, 0, NULL, 64, "ieee_double");
+  tdesc_create_reg (feature, "cf6", 195, 0, NULL, 64, "ieee_double");
+  tdesc_create_reg (feature, "cf7", 196, 0, NULL, 64, "ieee_double");
+  tdesc_create_reg (feature, "cf8", 197, 0, NULL, 64, "ieee_double");
+  tdesc_create_reg (feature, "cf9", 198, 0, NULL, 64, "ieee_double");
+  tdesc_create_reg (feature, "cf10", 199, 0, NULL, 64, "ieee_double");
+  tdesc_create_reg (feature, "cf11", 200, 0, NULL, 64, "ieee_double");
+  tdesc_create_reg (feature, "cf12", 201, 0, NULL, 64, "ieee_double");
+  tdesc_create_reg (feature, "cf13", 202, 0, NULL, 64, "ieee_double");
+  tdesc_create_reg (feature, "cf14", 203, 0, NULL, 64, "ieee_double");
+  tdesc_create_reg (feature, "cf15", 204, 0, NULL, 64, "ieee_double");
+  tdesc_create_reg (feature, "cf16", 205, 0, NULL, 64, "ieee_double");
+  tdesc_create_reg (feature, "cf17", 206, 0, NULL, 64, "ieee_double");
+  tdesc_create_reg (feature, "cf18", 207, 0, NULL, 64, "ieee_double");
+  tdesc_create_reg (feature, "cf19", 208, 0, NULL, 64, "ieee_double");
+  tdesc_create_reg (feature, "cf20", 209, 0, NULL, 64, "ieee_double");
+  tdesc_create_reg (feature, "cf21", 210, 0, NULL, 64, "ieee_double");
+  tdesc_create_reg (feature, "cf22", 211, 0, NULL, 64, "ieee_double");
+  tdesc_create_reg (feature, "cf23", 212, 0, NULL, 64, "ieee_double");
+  tdesc_create_reg (feature, "cf24", 213, 0, NULL, 64, "ieee_double");
+  tdesc_create_reg (feature, "cf25", 214, 0, NULL, 64, "ieee_double");
+  tdesc_create_reg (feature, "cf26", 215, 0, NULL, 64, "ieee_double");
+  tdesc_create_reg (feature, "cf27", 216, 0, NULL, 64, "ieee_double");
+  tdesc_create_reg (feature, "cf28", 217, 0, NULL, 64, "ieee_double");
+  tdesc_create_reg (feature, "cf29", 218, 0, NULL, 64, "ieee_double");
+  tdesc_create_reg (feature, "cf30", 219, 0, NULL, 64, "ieee_double");
+  tdesc_create_reg (feature, "cf31", 220, 0, NULL, 64, "ieee_double");
+  tdesc_create_reg (feature, "cfpscr", 221, 0, "float", 64, "uint64");
+  tdesc_create_reg (feature, "cvr0", 222, 0, NULL, 128, "vec128");
+  tdesc_create_reg (feature, "cvr1", 223, 0, NULL, 128, "vec128");
+  tdesc_create_reg (feature, "cvr2", 224, 0, NULL, 128, "vec128");
+  tdesc_create_reg (feature, "cvr3", 225, 0, NULL, 128, "vec128");
+  tdesc_create_reg (feature, "cvr4", 226, 0, NULL, 128, "vec128");
+  tdesc_create_reg (feature, "cvr5", 227, 0, NULL, 128, "vec128");
+  tdesc_create_reg (feature, "cvr6", 228, 0, NULL, 128, "vec128");
+  tdesc_create_reg (feature, "cvr7", 229, 0, NULL, 128, "vec128");
+  tdesc_create_reg (feature, "cvr8", 230, 0, NULL, 128, "vec128");
+  tdesc_create_reg (feature, "cvr9", 231, 0, NULL, 128, "vec128");
+  tdesc_create_reg (feature, "cvr10", 232, 0, NULL, 128, "vec128");
+  tdesc_create_reg (feature, "cvr11", 233, 0, NULL, 128, "vec128");
+  tdesc_create_reg (feature, "cvr12", 234, 0, NULL, 128, "vec128");
+  tdesc_create_reg (feature, "cvr13", 235, 0, NULL, 128, "vec128");
+  tdesc_create_reg (feature, "cvr14", 236, 0, NULL, 128, "vec128");
+  tdesc_create_reg (feature, "cvr15", 237, 0, NULL, 128, "vec128");
+  tdesc_create_reg (feature, "cvr16", 238, 0, NULL, 128, "vec128");
+  tdesc_create_reg (feature, "cvr17", 239, 0, NULL, 128, "vec128");
+  tdesc_create_reg (feature, "cvr18", 240, 0, NULL, 128, "vec128");
+  tdesc_create_reg (feature, "cvr19", 241, 0, NULL, 128, "vec128");
+  tdesc_create_reg (feature, "cvr20", 242, 0, NULL, 128, "vec128");
+  tdesc_create_reg (feature, "cvr21", 243, 0, NULL, 128, "vec128");
+  tdesc_create_reg (feature, "cvr22", 244, 0, NULL, 128, "vec128");
+  tdesc_create_reg (feature, "cvr23", 245, 0, NULL, 128, "vec128");
+  tdesc_create_reg (feature, "cvr24", 246, 0, NULL, 128, "vec128");
+  tdesc_create_reg (feature, "cvr25", 247, 0, NULL, 128, "vec128");
+  tdesc_create_reg (feature, "cvr26", 248, 0, NULL, 128, "vec128");
+  tdesc_create_reg (feature, "cvr27", 249, 0, NULL, 128, "vec128");
+  tdesc_create_reg (feature, "cvr28", 250, 0, NULL, 128, "vec128");
+  tdesc_create_reg (feature, "cvr29", 251, 0, NULL, 128, "vec128");
+  tdesc_create_reg (feature, "cvr30", 252, 0, NULL, 128, "vec128");
+  tdesc_create_reg (feature, "cvr31", 253, 0, NULL, 128, "vec128");
+  tdesc_create_reg (feature, "cvscr", 254, 0, NULL, 32, "int");
+  tdesc_create_reg (feature, "cvrsave", 255, 0, NULL, 32, "int");
+  tdesc_create_reg (feature, "cvs0h", 256, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "cvs1h", 257, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "cvs2h", 258, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "cvs3h", 259, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "cvs4h", 260, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "cvs5h", 261, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "cvs6h", 262, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "cvs7h", 263, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "cvs8h", 264, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "cvs9h", 265, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "cvs10h", 266, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "cvs11h", 267, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "cvs12h", 268, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "cvs13h", 269, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "cvs14h", 270, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "cvs15h", 271, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "cvs16h", 272, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "cvs17h", 273, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "cvs18h", 274, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "cvs19h", 275, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "cvs20h", 276, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "cvs21h", 277, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "cvs22h", 278, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "cvs23h", 279, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "cvs24h", 280, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "cvs25h", 281, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "cvs26h", 282, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "cvs27h", 283, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "cvs28h", 284, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "cvs29h", 285, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "cvs30h", 286, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "cvs31h", 287, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "cppr", 288, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "cdscr", 289, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "ctar", 290, 0, NULL, 64, "uint64");
 
   tdesc_powerpc_isa207_htm_vsx32l = result;
 }
diff --git a/gdb/features/rs6000/powerpc-isa207-htm-vsx32l.xml b/gdb/features/rs6000/powerpc-isa207-htm-vsx32l.xml
index 84192b0c38..778372d305 100644
--- a/gdb/features/rs6000/powerpc-isa207-htm-vsx32l.xml
+++ b/gdb/features/rs6000/powerpc-isa207-htm-vsx32l.xml
@@ -16,5 +16,7 @@ 
   <xi:include href="power-ppr.xml"/>
   <xi:include href="power-dscr.xml"/>
   <xi:include href="power-tar.xml"/>
+  <xi:include href="power-ebb.xml"/>
+  <xi:include href="power-pmu.xml"/>
   <xi:include href="power-htm.xml"/>
 </target>
diff --git a/gdb/features/rs6000/powerpc-isa207-htm-vsx64l.c b/gdb/features/rs6000/powerpc-isa207-htm-vsx64l.c
index 2647a077dd..ef0cdece20 100644
--- a/gdb/features/rs6000/powerpc-isa207-htm-vsx64l.c
+++ b/gdb/features/rs6000/powerpc-isa207-htm-vsx64l.c
@@ -199,6 +199,18 @@  initialize_tdesc_powerpc_isa207_htm_vsx64l (void)
   feature = tdesc_create_feature (result, "org.gnu.gdb.power.tar");
   tdesc_create_reg (feature, "tar", 141, 1, NULL, 64, "uint64");
 
+  feature = tdesc_create_feature (result, "org.gnu.gdb.power.ebb");
+  tdesc_create_reg (feature, "bescr", 142, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "ebbhr", 143, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "ebbrr", 144, 0, NULL, 64, "uint64");
+
+  feature = tdesc_create_feature (result, "org.gnu.gdb.power.pmu");
+  tdesc_create_reg (feature, "mmcr0", 145, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "mmcr2", 146, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "siar", 147, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "sdar", 148, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "sier", 149, 0, NULL, 64, "uint64");
+
   feature = tdesc_create_feature (result, "org.gnu.gdb.power.htm");
   element_type = tdesc_named_type (feature, "ieee_single");
   tdesc_create_vector (feature, "v4f", element_type, 4);
@@ -224,147 +236,147 @@  initialize_tdesc_powerpc_isa207_htm_vsx64l (void)
   field_type = tdesc_named_type (feature, "v16i8");
   tdesc_add_field (type_with_fields, "v16_int8", field_type);
 
-  tdesc_create_reg (feature, "tfhar", 142, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "texasr", 143, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "tfiar", 144, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "cr0", 145, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "cr1", 146, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "cr2", 147, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "cr3", 148, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "cr4", 149, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "cr5", 150, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "cr6", 151, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "cr7", 152, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "cr8", 153, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "cr9", 154, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "cr10", 155, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "cr11", 156, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "cr12", 157, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "cr13", 158, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "cr14", 159, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "cr15", 160, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "cr16", 161, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "cr17", 162, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "cr18", 163, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "cr19", 164, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "cr20", 165, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "cr21", 166, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "cr22", 167, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "cr23", 168, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "cr24", 169, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "cr25", 170, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "cr26", 171, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "cr27", 172, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "cr28", 173, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "cr29", 174, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "cr30", 175, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "cr31", 176, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "ccr", 177, 0, NULL, 32, "uint32");
-  tdesc_create_reg (feature, "cxer", 178, 0, NULL, 32, "uint32");
-  tdesc_create_reg (feature, "clr", 179, 0, NULL, 64, "code_ptr");
-  tdesc_create_reg (feature, "cctr", 180, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "cf0", 181, 0, NULL, 64, "ieee_double");
-  tdesc_create_reg (feature, "cf1", 182, 0, NULL, 64, "ieee_double");
-  tdesc_create_reg (feature, "cf2", 183, 0, NULL, 64, "ieee_double");
-  tdesc_create_reg (feature, "cf3", 184, 0, NULL, 64, "ieee_double");
-  tdesc_create_reg (feature, "cf4", 185, 0, NULL, 64, "ieee_double");
-  tdesc_create_reg (feature, "cf5", 186, 0, NULL, 64, "ieee_double");
-  tdesc_create_reg (feature, "cf6", 187, 0, NULL, 64, "ieee_double");
-  tdesc_create_reg (feature, "cf7", 188, 0, NULL, 64, "ieee_double");
-  tdesc_create_reg (feature, "cf8", 189, 0, NULL, 64, "ieee_double");
-  tdesc_create_reg (feature, "cf9", 190, 0, NULL, 64, "ieee_double");
-  tdesc_create_reg (feature, "cf10", 191, 0, NULL, 64, "ieee_double");
-  tdesc_create_reg (feature, "cf11", 192, 0, NULL, 64, "ieee_double");
-  tdesc_create_reg (feature, "cf12", 193, 0, NULL, 64, "ieee_double");
-  tdesc_create_reg (feature, "cf13", 194, 0, NULL, 64, "ieee_double");
-  tdesc_create_reg (feature, "cf14", 195, 0, NULL, 64, "ieee_double");
-  tdesc_create_reg (feature, "cf15", 196, 0, NULL, 64, "ieee_double");
-  tdesc_create_reg (feature, "cf16", 197, 0, NULL, 64, "ieee_double");
-  tdesc_create_reg (feature, "cf17", 198, 0, NULL, 64, "ieee_double");
-  tdesc_create_reg (feature, "cf18", 199, 0, NULL, 64, "ieee_double");
-  tdesc_create_reg (feature, "cf19", 200, 0, NULL, 64, "ieee_double");
-  tdesc_create_reg (feature, "cf20", 201, 0, NULL, 64, "ieee_double");
-  tdesc_create_reg (feature, "cf21", 202, 0, NULL, 64, "ieee_double");
-  tdesc_create_reg (feature, "cf22", 203, 0, NULL, 64, "ieee_double");
-  tdesc_create_reg (feature, "cf23", 204, 0, NULL, 64, "ieee_double");
-  tdesc_create_reg (feature, "cf24", 205, 0, NULL, 64, "ieee_double");
-  tdesc_create_reg (feature, "cf25", 206, 0, NULL, 64, "ieee_double");
-  tdesc_create_reg (feature, "cf26", 207, 0, NULL, 64, "ieee_double");
-  tdesc_create_reg (feature, "cf27", 208, 0, NULL, 64, "ieee_double");
-  tdesc_create_reg (feature, "cf28", 209, 0, NULL, 64, "ieee_double");
-  tdesc_create_reg (feature, "cf29", 210, 0, NULL, 64, "ieee_double");
-  tdesc_create_reg (feature, "cf30", 211, 0, NULL, 64, "ieee_double");
-  tdesc_create_reg (feature, "cf31", 212, 0, NULL, 64, "ieee_double");
-  tdesc_create_reg (feature, "cfpscr", 213, 0, "float", 64, "uint64");
-  tdesc_create_reg (feature, "cvr0", 214, 0, NULL, 128, "vec128");
-  tdesc_create_reg (feature, "cvr1", 215, 0, NULL, 128, "vec128");
-  tdesc_create_reg (feature, "cvr2", 216, 0, NULL, 128, "vec128");
-  tdesc_create_reg (feature, "cvr3", 217, 0, NULL, 128, "vec128");
-  tdesc_create_reg (feature, "cvr4", 218, 0, NULL, 128, "vec128");
-  tdesc_create_reg (feature, "cvr5", 219, 0, NULL, 128, "vec128");
-  tdesc_create_reg (feature, "cvr6", 220, 0, NULL, 128, "vec128");
-  tdesc_create_reg (feature, "cvr7", 221, 0, NULL, 128, "vec128");
-  tdesc_create_reg (feature, "cvr8", 222, 0, NULL, 128, "vec128");
-  tdesc_create_reg (feature, "cvr9", 223, 0, NULL, 128, "vec128");
-  tdesc_create_reg (feature, "cvr10", 224, 0, NULL, 128, "vec128");
-  tdesc_create_reg (feature, "cvr11", 225, 0, NULL, 128, "vec128");
-  tdesc_create_reg (feature, "cvr12", 226, 0, NULL, 128, "vec128");
-  tdesc_create_reg (feature, "cvr13", 227, 0, NULL, 128, "vec128");
-  tdesc_create_reg (feature, "cvr14", 228, 0, NULL, 128, "vec128");
-  tdesc_create_reg (feature, "cvr15", 229, 0, NULL, 128, "vec128");
-  tdesc_create_reg (feature, "cvr16", 230, 0, NULL, 128, "vec128");
-  tdesc_create_reg (feature, "cvr17", 231, 0, NULL, 128, "vec128");
-  tdesc_create_reg (feature, "cvr18", 232, 0, NULL, 128, "vec128");
-  tdesc_create_reg (feature, "cvr19", 233, 0, NULL, 128, "vec128");
-  tdesc_create_reg (feature, "cvr20", 234, 0, NULL, 128, "vec128");
-  tdesc_create_reg (feature, "cvr21", 235, 0, NULL, 128, "vec128");
-  tdesc_create_reg (feature, "cvr22", 236, 0, NULL, 128, "vec128");
-  tdesc_create_reg (feature, "cvr23", 237, 0, NULL, 128, "vec128");
-  tdesc_create_reg (feature, "cvr24", 238, 0, NULL, 128, "vec128");
-  tdesc_create_reg (feature, "cvr25", 239, 0, NULL, 128, "vec128");
-  tdesc_create_reg (feature, "cvr26", 240, 0, NULL, 128, "vec128");
-  tdesc_create_reg (feature, "cvr27", 241, 0, NULL, 128, "vec128");
-  tdesc_create_reg (feature, "cvr28", 242, 0, NULL, 128, "vec128");
-  tdesc_create_reg (feature, "cvr29", 243, 0, NULL, 128, "vec128");
-  tdesc_create_reg (feature, "cvr30", 244, 0, NULL, 128, "vec128");
-  tdesc_create_reg (feature, "cvr31", 245, 0, NULL, 128, "vec128");
-  tdesc_create_reg (feature, "cvscr", 246, 0, NULL, 32, "int");
-  tdesc_create_reg (feature, "cvrsave", 247, 0, NULL, 32, "int");
-  tdesc_create_reg (feature, "cvs0h", 248, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "cvs1h", 249, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "cvs2h", 250, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "cvs3h", 251, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "cvs4h", 252, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "cvs5h", 253, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "cvs6h", 254, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "cvs7h", 255, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "cvs8h", 256, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "cvs9h", 257, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "cvs10h", 258, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "cvs11h", 259, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "cvs12h", 260, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "cvs13h", 261, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "cvs14h", 262, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "cvs15h", 263, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "cvs16h", 264, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "cvs17h", 265, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "cvs18h", 266, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "cvs19h", 267, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "cvs20h", 268, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "cvs21h", 269, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "cvs22h", 270, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "cvs23h", 271, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "cvs24h", 272, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "cvs25h", 273, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "cvs26h", 274, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "cvs27h", 275, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "cvs28h", 276, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "cvs29h", 277, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "cvs30h", 278, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "cvs31h", 279, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "cppr", 280, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "cdscr", 281, 0, NULL, 64, "uint64");
-  tdesc_create_reg (feature, "ctar", 282, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "tfhar", 150, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "texasr", 151, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "tfiar", 152, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "cr0", 153, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "cr1", 154, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "cr2", 155, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "cr3", 156, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "cr4", 157, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "cr5", 158, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "cr6", 159, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "cr7", 160, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "cr8", 161, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "cr9", 162, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "cr10", 163, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "cr11", 164, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "cr12", 165, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "cr13", 166, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "cr14", 167, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "cr15", 168, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "cr16", 169, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "cr17", 170, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "cr18", 171, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "cr19", 172, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "cr20", 173, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "cr21", 174, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "cr22", 175, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "cr23", 176, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "cr24", 177, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "cr25", 178, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "cr26", 179, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "cr27", 180, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "cr28", 181, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "cr29", 182, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "cr30", 183, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "cr31", 184, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "ccr", 185, 0, NULL, 32, "uint32");
+  tdesc_create_reg (feature, "cxer", 186, 0, NULL, 32, "uint32");
+  tdesc_create_reg (feature, "clr", 187, 0, NULL, 64, "code_ptr");
+  tdesc_create_reg (feature, "cctr", 188, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "cf0", 189, 0, NULL, 64, "ieee_double");
+  tdesc_create_reg (feature, "cf1", 190, 0, NULL, 64, "ieee_double");
+  tdesc_create_reg (feature, "cf2", 191, 0, NULL, 64, "ieee_double");
+  tdesc_create_reg (feature, "cf3", 192, 0, NULL, 64, "ieee_double");
+  tdesc_create_reg (feature, "cf4", 193, 0, NULL, 64, "ieee_double");
+  tdesc_create_reg (feature, "cf5", 194, 0, NULL, 64, "ieee_double");
+  tdesc_create_reg (feature, "cf6", 195, 0, NULL, 64, "ieee_double");
+  tdesc_create_reg (feature, "cf7", 196, 0, NULL, 64, "ieee_double");
+  tdesc_create_reg (feature, "cf8", 197, 0, NULL, 64, "ieee_double");
+  tdesc_create_reg (feature, "cf9", 198, 0, NULL, 64, "ieee_double");
+  tdesc_create_reg (feature, "cf10", 199, 0, NULL, 64, "ieee_double");
+  tdesc_create_reg (feature, "cf11", 200, 0, NULL, 64, "ieee_double");
+  tdesc_create_reg (feature, "cf12", 201, 0, NULL, 64, "ieee_double");
+  tdesc_create_reg (feature, "cf13", 202, 0, NULL, 64, "ieee_double");
+  tdesc_create_reg (feature, "cf14", 203, 0, NULL, 64, "ieee_double");
+  tdesc_create_reg (feature, "cf15", 204, 0, NULL, 64, "ieee_double");
+  tdesc_create_reg (feature, "cf16", 205, 0, NULL, 64, "ieee_double");
+  tdesc_create_reg (feature, "cf17", 206, 0, NULL, 64, "ieee_double");
+  tdesc_create_reg (feature, "cf18", 207, 0, NULL, 64, "ieee_double");
+  tdesc_create_reg (feature, "cf19", 208, 0, NULL, 64, "ieee_double");
+  tdesc_create_reg (feature, "cf20", 209, 0, NULL, 64, "ieee_double");
+  tdesc_create_reg (feature, "cf21", 210, 0, NULL, 64, "ieee_double");
+  tdesc_create_reg (feature, "cf22", 211, 0, NULL, 64, "ieee_double");
+  tdesc_create_reg (feature, "cf23", 212, 0, NULL, 64, "ieee_double");
+  tdesc_create_reg (feature, "cf24", 213, 0, NULL, 64, "ieee_double");
+  tdesc_create_reg (feature, "cf25", 214, 0, NULL, 64, "ieee_double");
+  tdesc_create_reg (feature, "cf26", 215, 0, NULL, 64, "ieee_double");
+  tdesc_create_reg (feature, "cf27", 216, 0, NULL, 64, "ieee_double");
+  tdesc_create_reg (feature, "cf28", 217, 0, NULL, 64, "ieee_double");
+  tdesc_create_reg (feature, "cf29", 218, 0, NULL, 64, "ieee_double");
+  tdesc_create_reg (feature, "cf30", 219, 0, NULL, 64, "ieee_double");
+  tdesc_create_reg (feature, "cf31", 220, 0, NULL, 64, "ieee_double");
+  tdesc_create_reg (feature, "cfpscr", 221, 0, "float", 64, "uint64");
+  tdesc_create_reg (feature, "cvr0", 222, 0, NULL, 128, "vec128");
+  tdesc_create_reg (feature, "cvr1", 223, 0, NULL, 128, "vec128");
+  tdesc_create_reg (feature, "cvr2", 224, 0, NULL, 128, "vec128");
+  tdesc_create_reg (feature, "cvr3", 225, 0, NULL, 128, "vec128");
+  tdesc_create_reg (feature, "cvr4", 226, 0, NULL, 128, "vec128");
+  tdesc_create_reg (feature, "cvr5", 227, 0, NULL, 128, "vec128");
+  tdesc_create_reg (feature, "cvr6", 228, 0, NULL, 128, "vec128");
+  tdesc_create_reg (feature, "cvr7", 229, 0, NULL, 128, "vec128");
+  tdesc_create_reg (feature, "cvr8", 230, 0, NULL, 128, "vec128");
+  tdesc_create_reg (feature, "cvr9", 231, 0, NULL, 128, "vec128");
+  tdesc_create_reg (feature, "cvr10", 232, 0, NULL, 128, "vec128");
+  tdesc_create_reg (feature, "cvr11", 233, 0, NULL, 128, "vec128");
+  tdesc_create_reg (feature, "cvr12", 234, 0, NULL, 128, "vec128");
+  tdesc_create_reg (feature, "cvr13", 235, 0, NULL, 128, "vec128");
+  tdesc_create_reg (feature, "cvr14", 236, 0, NULL, 128, "vec128");
+  tdesc_create_reg (feature, "cvr15", 237, 0, NULL, 128, "vec128");
+  tdesc_create_reg (feature, "cvr16", 238, 0, NULL, 128, "vec128");
+  tdesc_create_reg (feature, "cvr17", 239, 0, NULL, 128, "vec128");
+  tdesc_create_reg (feature, "cvr18", 240, 0, NULL, 128, "vec128");
+  tdesc_create_reg (feature, "cvr19", 241, 0, NULL, 128, "vec128");
+  tdesc_create_reg (feature, "cvr20", 242, 0, NULL, 128, "vec128");
+  tdesc_create_reg (feature, "cvr21", 243, 0, NULL, 128, "vec128");
+  tdesc_create_reg (feature, "cvr22", 244, 0, NULL, 128, "vec128");
+  tdesc_create_reg (feature, "cvr23", 245, 0, NULL, 128, "vec128");
+  tdesc_create_reg (feature, "cvr24", 246, 0, NULL, 128, "vec128");
+  tdesc_create_reg (feature, "cvr25", 247, 0, NULL, 128, "vec128");
+  tdesc_create_reg (feature, "cvr26", 248, 0, NULL, 128, "vec128");
+  tdesc_create_reg (feature, "cvr27", 249, 0, NULL, 128, "vec128");
+  tdesc_create_reg (feature, "cvr28", 250, 0, NULL, 128, "vec128");
+  tdesc_create_reg (feature, "cvr29", 251, 0, NULL, 128, "vec128");
+  tdesc_create_reg (feature, "cvr30", 252, 0, NULL, 128, "vec128");
+  tdesc_create_reg (feature, "cvr31", 253, 0, NULL, 128, "vec128");
+  tdesc_create_reg (feature, "cvscr", 254, 0, NULL, 32, "int");
+  tdesc_create_reg (feature, "cvrsave", 255, 0, NULL, 32, "int");
+  tdesc_create_reg (feature, "cvs0h", 256, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "cvs1h", 257, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "cvs2h", 258, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "cvs3h", 259, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "cvs4h", 260, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "cvs5h", 261, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "cvs6h", 262, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "cvs7h", 263, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "cvs8h", 264, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "cvs9h", 265, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "cvs10h", 266, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "cvs11h", 267, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "cvs12h", 268, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "cvs13h", 269, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "cvs14h", 270, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "cvs15h", 271, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "cvs16h", 272, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "cvs17h", 273, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "cvs18h", 274, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "cvs19h", 275, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "cvs20h", 276, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "cvs21h", 277, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "cvs22h", 278, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "cvs23h", 279, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "cvs24h", 280, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "cvs25h", 281, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "cvs26h", 282, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "cvs27h", 283, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "cvs28h", 284, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "cvs29h", 285, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "cvs30h", 286, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "cvs31h", 287, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "cppr", 288, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "cdscr", 289, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "ctar", 290, 0, NULL, 64, "uint64");
 
   tdesc_powerpc_isa207_htm_vsx64l = result;
 }
diff --git a/gdb/features/rs6000/powerpc-isa207-htm-vsx64l.xml b/gdb/features/rs6000/powerpc-isa207-htm-vsx64l.xml
index e1649d0d9e..2ee2675abd 100644
--- a/gdb/features/rs6000/powerpc-isa207-htm-vsx64l.xml
+++ b/gdb/features/rs6000/powerpc-isa207-htm-vsx64l.xml
@@ -16,5 +16,7 @@ 
   <xi:include href="power-ppr.xml"/>
   <xi:include href="power-dscr.xml"/>
   <xi:include href="power-tar.xml"/>
+  <xi:include href="power-ebb.xml"/>
+  <xi:include href="power-pmu.xml"/>
   <xi:include href="power64-htm.xml"/>
 </target>
diff --git a/gdb/features/rs6000/powerpc-isa207-vsx32l.c b/gdb/features/rs6000/powerpc-isa207-vsx32l.c
index 73c7a01077..e9853829e6 100644
--- a/gdb/features/rs6000/powerpc-isa207-vsx32l.c
+++ b/gdb/features/rs6000/powerpc-isa207-vsx32l.c
@@ -199,5 +199,17 @@  initialize_tdesc_powerpc_isa207_vsx32l (void)
   feature = tdesc_create_feature (result, "org.gnu.gdb.power.tar");
   tdesc_create_reg (feature, "tar", 141, 1, NULL, 64, "uint64");
 
+  feature = tdesc_create_feature (result, "org.gnu.gdb.power.ebb");
+  tdesc_create_reg (feature, "bescr", 142, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "ebbhr", 143, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "ebbrr", 144, 0, NULL, 64, "uint64");
+
+  feature = tdesc_create_feature (result, "org.gnu.gdb.power.pmu");
+  tdesc_create_reg (feature, "mmcr0", 145, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "mmcr2", 146, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "siar", 147, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "sdar", 148, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "sier", 149, 0, NULL, 64, "uint64");
+
   tdesc_powerpc_isa207_vsx32l = result;
 }
diff --git a/gdb/features/rs6000/powerpc-isa207-vsx32l.xml b/gdb/features/rs6000/powerpc-isa207-vsx32l.xml
index 599e6a24a2..a3a2454929 100644
--- a/gdb/features/rs6000/powerpc-isa207-vsx32l.xml
+++ b/gdb/features/rs6000/powerpc-isa207-vsx32l.xml
@@ -16,4 +16,6 @@ 
   <xi:include href="power-ppr.xml"/>
   <xi:include href="power-dscr.xml"/>
   <xi:include href="power-tar.xml"/>
+  <xi:include href="power-ebb.xml"/>
+  <xi:include href="power-pmu.xml"/>
 </target>
diff --git a/gdb/features/rs6000/powerpc-isa207-vsx64l.c b/gdb/features/rs6000/powerpc-isa207-vsx64l.c
index 9c735522d2..0e94d9c243 100644
--- a/gdb/features/rs6000/powerpc-isa207-vsx64l.c
+++ b/gdb/features/rs6000/powerpc-isa207-vsx64l.c
@@ -199,5 +199,17 @@  initialize_tdesc_powerpc_isa207_vsx64l (void)
   feature = tdesc_create_feature (result, "org.gnu.gdb.power.tar");
   tdesc_create_reg (feature, "tar", 141, 1, NULL, 64, "uint64");
 
+  feature = tdesc_create_feature (result, "org.gnu.gdb.power.ebb");
+  tdesc_create_reg (feature, "bescr", 142, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "ebbhr", 143, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "ebbrr", 144, 0, NULL, 64, "uint64");
+
+  feature = tdesc_create_feature (result, "org.gnu.gdb.power.pmu");
+  tdesc_create_reg (feature, "mmcr0", 145, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "mmcr2", 146, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "siar", 147, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "sdar", 148, 0, NULL, 64, "uint64");
+  tdesc_create_reg (feature, "sier", 149, 0, NULL, 64, "uint64");
+
   tdesc_powerpc_isa207_vsx64l = result;
 }
diff --git a/gdb/features/rs6000/powerpc-isa207-vsx64l.xml b/gdb/features/rs6000/powerpc-isa207-vsx64l.xml
index 42a23cc001..d91ce5e9cf 100644
--- a/gdb/features/rs6000/powerpc-isa207-vsx64l.xml
+++ b/gdb/features/rs6000/powerpc-isa207-vsx64l.xml
@@ -16,4 +16,6 @@ 
   <xi:include href="power-ppr.xml"/>
   <xi:include href="power-dscr.xml"/>
   <xi:include href="power-tar.xml"/>
+  <xi:include href="power-ebb.xml"/>
+  <xi:include href="power-pmu.xml"/>
 </target>
diff --git a/gdb/gdbserver/configure.srv b/gdb/gdbserver/configure.srv
index 6559ab1643..570fc0762f 100644
--- a/gdb/gdbserver/configure.srv
+++ b/gdb/gdbserver/configure.srv
@@ -252,6 +252,8 @@  case "${target}" in
 			srv_xmlfiles="${srv_xmlfiles} rs6000/power-dscr.xml"
 			srv_xmlfiles="${srv_xmlfiles} rs6000/power-ppr.xml"
 			srv_xmlfiles="${srv_xmlfiles} rs6000/power-tar.xml"
+			srv_xmlfiles="${srv_xmlfiles} rs6000/power-ebb.xml"
+			srv_xmlfiles="${srv_xmlfiles} rs6000/power-pmu.xml"
 			srv_xmlfiles="${srv_xmlfiles} rs6000/power-htm.xml"
 			srv_xmlfiles="${srv_xmlfiles} rs6000/powerpc-e500l.xml"
 			srv_xmlfiles="${srv_xmlfiles} rs6000/power-spe.xml"
diff --git a/gdb/nat/ppc-linux.h b/gdb/nat/ppc-linux.h
index 44b76e2891..65c60cb158 100644
--- a/gdb/nat/ppc-linux.h
+++ b/gdb/nat/ppc-linux.h
@@ -60,6 +60,9 @@ 
 #ifndef PPC_FEATURE2_TAR
 #define PPC_FEATURE2_TAR 0x04000000
 #endif
+#ifndef PPC_FEATURE2_EBB
+#define PPC_FEATURE2_EBB 0x10000000
+#endif
 #ifndef PPC_FEATURE2_HTM
 #define PPC_FEATURE2_HTM 0x40000000
 #endif
@@ -109,6 +112,16 @@ 
 #define NT_PPC_DSCR 0x105
 #endif
 
+/* Event Based Branch Registers.  */
+#ifndef NT_PPC_EBB
+#define NT_PPC_EBB 0x106
+#endif
+
+/* Performance Monitor Registers.  */
+#ifndef NT_PPC_PMU
+#define NT_PPC_PMU 0x107
+#endif
+
 /* TM checkpointed GPR Registers.  */
 #ifndef NT_PPC_TM_CGPR
 #define NT_PPC_TM_CGPR 0x108
diff --git a/gdb/ppc-linux-nat.c b/gdb/ppc-linux-nat.c
index b084934b22..32ace7219d 100644
--- a/gdb/ppc-linux-nat.c
+++ b/gdb/ppc-linux-nat.c
@@ -667,6 +667,24 @@  fetch_register (struct regcache *regcache, int tid, int regno)
 		    &ppc32_linux_tarregset);
       return;
     }
+  else if (PPC_IS_EBB_REGNUM (regno))
+    {
+      gdb_assert (tdep->have_ebb);
+
+      fetch_regset (regcache, tid, NT_PPC_EBB,
+		    PPC_LINUX_SIZEOF_EBBREGSET,
+		    &ppc32_linux_ebbregset);
+      return;
+    }
+  else if (PPC_IS_PMU_REGNUM (regno))
+    {
+      gdb_assert (tdep->ppc_mmcr0_regnum != -1);
+
+      fetch_regset (regcache, tid, NT_PPC_PMU,
+		    PPC_LINUX_SIZEOF_PMUREGSET,
+		    &ppc32_linux_pmuregset);
+      return;
+    }
   else if (PPC_IS_TMSPR_REGNUM (regno))
     {
       gdb_assert (tdep->have_htm);
@@ -953,6 +971,15 @@  fetch_ppc_registers (struct regcache *regcache, int tid)
 		  PPC_LINUX_SIZEOF_TARREGSET,
 		  &ppc32_linux_tarregset);
 
+  if (tdep->have_ebb)
+    fetch_regset (regcache, tid, NT_PPC_EBB,
+		  PPC_LINUX_SIZEOF_EBBREGSET,
+		  &ppc32_linux_ebbregset);
+  if (tdep->ppc_mmcr0_regnum != -1)
+    fetch_regset (regcache, tid, NT_PPC_PMU,
+		  PPC_LINUX_SIZEOF_PMUREGSET,
+		  &ppc32_linux_pmuregset);
+
   if (tdep->have_htm)
     {
       fetch_regset (regcache, tid, NT_PPC_TM_SPR,
@@ -1196,6 +1223,24 @@  store_register (const struct regcache *regcache, int tid, int regno)
 		    &ppc32_linux_tarregset);
       return;
     }
+  else if (PPC_IS_EBB_REGNUM (regno))
+    {
+      gdb_assert (tdep->have_ebb);
+
+      store_regset (regcache, tid, regno, NT_PPC_EBB,
+		    PPC_LINUX_SIZEOF_EBBREGSET,
+		    &ppc32_linux_ebbregset);
+      return;
+    }
+  else if (PPC_IS_PMU_REGNUM (regno))
+    {
+      gdb_assert (tdep->ppc_mmcr0_regnum != -1);
+
+      store_regset (regcache, tid, regno, NT_PPC_PMU,
+		    PPC_LINUX_SIZEOF_PMUREGSET,
+		    &ppc32_linux_pmuregset);
+      return;
+    }
   else if (PPC_IS_TMSPR_REGNUM (regno))
     {
       gdb_assert (tdep->have_htm);
@@ -1544,6 +1589,19 @@  store_ppc_registers (const struct regcache *regcache, int tid)
 		  PPC_LINUX_SIZEOF_TARREGSET,
 		  &ppc32_linux_tarregset);
 
+  /* EBB/PMU registers can be unavailable.  */
+  if (tdep->have_ebb
+      && ppc_linux_regset_available_p (regcache, &ppc32_linux_ebbregset))
+    store_regset (regcache, tid, -1, NT_PPC_EBB,
+		  PPC_LINUX_SIZEOF_EBBREGSET,
+		  &ppc32_linux_ebbregset);
+
+  if (tdep->ppc_mmcr0_regnum != -1
+      && ppc_linux_regset_available_p (regcache, &ppc32_linux_pmuregset))
+    store_regset (regcache, tid, -1, NT_PPC_PMU,
+		  PPC_LINUX_SIZEOF_PMUREGSET,
+		  &ppc32_linux_pmuregset);
+
   if (tdep->have_htm)
     {
       store_regset (regcache, tid, -1, NT_PPC_TM_SPR,
@@ -2734,7 +2792,11 @@  ppc_linux_nat_target::read_description ()
       features.ppr_dscr = true;
       if ((hwcap2 & PPC_FEATURE2_ARCH_2_07)
 	  && (hwcap2 & PPC_FEATURE2_TAR)
-	  && check_regset (tid, NT_PPC_TAR, PPC_LINUX_SIZEOF_TARREGSET))
+	  && (hwcap2 & PPC_FEATURE2_EBB)
+	  && check_regset (tid, NT_PPC_TAR, PPC_LINUX_SIZEOF_TARREGSET)
+	  && check_regset (tid, NT_PPC_EBB, PPC_LINUX_SIZEOF_EBBREGSET)
+	  && check_regset (tid, NT_PPC_PMU, PPC_LINUX_SIZEOF_PMUREGSET))
+
 	{
 	  features.isa207 = true;
 	  if ((hwcap2 & PPC_FEATURE2_HTM)
diff --git a/gdb/ppc-linux-tdep.c b/gdb/ppc-linux-tdep.c
index 74e4eec413..e9e710ac6b 100644
--- a/gdb/ppc-linux-tdep.c
+++ b/gdb/ppc-linux-tdep.c
@@ -541,6 +541,24 @@  static const struct regcache_map_entry ppc32_regmap_tar[] =
       { 0 }
   };
 
+static const struct regcache_map_entry ppc32_regmap_ebb[] =
+  {
+      { 1, PPC_EBBRR_REGNUM, 8 },
+      { 1, PPC_EBBHR_REGNUM, 8 },
+      { 1, PPC_BESCR_REGNUM, 8 },
+      { 0 }
+  };
+
+static const struct regcache_map_entry ppc32_regmap_pmu[] =
+  {
+      { 1, PPC_SIAR_REGNUM, 8 },
+      { 1, PPC_SDAR_REGNUM, 8 },
+      { 1, PPC_SIER_REGNUM, 8 },
+      { 1, PPC_MMCR2_REGNUM, 8 },
+      { 1, PPC_MMCR0_REGNUM, 8 },
+      { 0 }
+  };
+
 static const struct regcache_map_entry ppc32_regmap_tm_spr[] =
   {
       { 1, PPC_TFHAR_REGNUM, 8 },
@@ -731,6 +749,18 @@  const struct regset ppc32_linux_tarregset = {
   regcache_collect_regset
 };
 
+const struct regset ppc32_linux_ebbregset = {
+  ppc32_regmap_ebb,
+  regcache_supply_regset,
+  regcache_collect_regset
+};
+
+const struct regset ppc32_linux_pmuregset = {
+  ppc32_regmap_pmu,
+  regcache_supply_regset,
+  regcache_collect_regset
+};
+
 const struct regset ppc32_linux_tm_sprregset = {
   ppc32_regmap_tm_spr,
   regcache_supply_regset,
@@ -892,6 +922,23 @@  ppc_linux_iterate_over_regset_sections (struct gdbarch *gdbarch,
     cb (".reg-ppc-tar", PPC_LINUX_SIZEOF_TARREGSET,
 	&ppc32_linux_tarregset, "Target Address Register", cb_data);
 
+  /* EBB/PMU registers are unavailable when ptrace returns ENODATA.
+     Check availability when generating a core file (regcache !=
+     NULL).  */
+  if (tdep->have_ebb)
+    if (regcache == NULL
+	|| REG_VALID == regcache->get_register_status (PPC_BESCR_REGNUM))
+      cb (".reg-ppc-ebb", PPC_LINUX_SIZEOF_EBBREGSET,
+	  &ppc32_linux_ebbregset, "Event-based Branching Registers",
+	  cb_data);
+
+  if (tdep->ppc_mmcr0_regnum != -1)
+    if (regcache == NULL
+	|| REG_VALID == regcache->get_register_status (PPC_MMCR0_REGNUM))
+      cb (".reg-ppc-pmu", PPC_LINUX_SIZEOF_PMUREGSET,
+	  &ppc32_linux_pmuregset, "Performance Monitor Registers",
+	  cb_data);
+
   if (tdep->have_htm)
     {
       cb (".reg-ppc-tm-spr", PPC_LINUX_SIZEOF_TM_SPRREGSET,
@@ -1407,6 +1454,11 @@  ppc_linux_core_read_description (struct gdbarch *gdbarch,
   if (ppr && dscr)
     {
       features.ppr_dscr = true;
+
+      /* We don't require the EBB or PMU note sections to be present
+	 in the core file to select isa207 because these registers
+	 could have been unavailable when the core file was created.
+	 They will be in the tdep but will show as unavailable.  */
       if (tar)
 	{
 	  features.isa207 = true;
diff --git a/gdb/ppc-linux-tdep.h b/gdb/ppc-linux-tdep.h
index a68eca6d42..4c19d4a39a 100644
--- a/gdb/ppc-linux-tdep.h
+++ b/gdb/ppc-linux-tdep.h
@@ -59,6 +59,8 @@  int ppc_linux_trap_reg_p (struct gdbarch *gdbarch);
 extern const struct regset ppc32_linux_pprregset;
 extern const struct regset ppc32_linux_dscrregset;
 extern const struct regset ppc32_linux_tarregset;
+extern const struct regset ppc32_linux_ebbregset;
+extern const struct regset ppc32_linux_pmuregset;
 extern const struct regset ppc32_linux_tm_sprregset;
 extern const struct regset ppc32_linux_cfprregset;
 extern const struct regset ppc32_linux_cvsxregset;
diff --git a/gdb/ppc-tdep.h b/gdb/ppc-tdep.h
index ddb1c5e84b..f1ba4b6246 100644
--- a/gdb/ppc-tdep.h
+++ b/gdb/ppc-tdep.h
@@ -262,6 +262,15 @@  struct gdbarch_tdep
     /* Target Address Register.  */
     int ppc_tar_regnum;
 
+    int have_ebb;
+
+    /* PMU registers.  */
+    int ppc_mmcr0_regnum;
+    int ppc_mmcr2_regnum;
+    int ppc_siar_regnum;
+    int ppc_sdar_regnum;
+    int ppc_sier_regnum;
+
     int have_htm;
 
     /* HTM pseudo registers.  */
@@ -326,36 +335,52 @@  enum {
   PPC_PPR_REGNUM = 172,
   PPC_DSCR_REGNUM = 173,
   PPC_TAR_REGNUM = 174,
+  /* EBB registers.  */
+  PPC_BESCR_REGNUM = 175,
+  PPC_EBBHR_REGNUM = 176,
+  PPC_EBBRR_REGNUM = 177,
+  /* PMU registers.  */
+  PPC_MMCR0_REGNUM = 178,
+  PPC_MMCR2_REGNUM = 179,
+  PPC_SIAR_REGNUM = 180,
+  PPC_SDAR_REGNUM = 181,
+  PPC_SIER_REGNUM = 182,
 
   /* Hardware transactional memory registers.  */
-  PPC_TFHAR_REGNUM = 175,
-  PPC_TEXASR_REGNUM = 176,
-  PPC_TFIAR_REGNUM = 177,
+  PPC_TFHAR_REGNUM = 183,
+  PPC_TEXASR_REGNUM = 184,
+  PPC_TFIAR_REGNUM = 185,
 
-  PPC_CR0_REGNUM = 178,
-  PPC_CCR_REGNUM = 210,
-  PPC_CXER_REGNUM = 211,
-  PPC_CLR_REGNUM = 212,
-  PPC_CCTR_REGNUM = 213,
+  PPC_CR0_REGNUM = 186,
+  PPC_CCR_REGNUM = 218,
+  PPC_CXER_REGNUM = 219,
+  PPC_CLR_REGNUM = 220,
+  PPC_CCTR_REGNUM = 221,
 
-  PPC_CF0_REGNUM = 214,
-  PPC_CFPSCR_REGNUM = 246,
+  PPC_CF0_REGNUM = 222,
+  PPC_CFPSCR_REGNUM = 254,
 
-  PPC_CVR0_REGNUM = 247,
-  PPC_CVSCR_REGNUM = 279,
-  PPC_CVRSAVE_REGNUM = 280,
+  PPC_CVR0_REGNUM = 255,
+  PPC_CVSCR_REGNUM = 287,
+  PPC_CVRSAVE_REGNUM = 288,
 
-  PPC_CVS0H_REGNUM = 281,
+  PPC_CVS0H_REGNUM = 289,
 
-  PPC_CPPR_REGNUM = 313,
-  PPC_CDSCR_REGNUM = 314,
-  PPC_CTAR_REGNUM = 315,
+  PPC_CPPR_REGNUM = 321,
+  PPC_CDSCR_REGNUM = 322,
+  PPC_CTAR_REGNUM = 323,
   PPC_NUM_REGS
 };
 
 /* Big enough to hold the size of the largest register in bytes.  */
 #define PPC_MAX_REGISTER_SIZE	64
 
+#define PPC_IS_EBB_REGNUM(i) \
+	((i) >= PPC_BESCR_REGNUM && (i) <= PPC_EBBRR_REGNUM)
+
+#define PPC_IS_PMU_REGNUM(i) \
+	((i) >= PPC_MMCR0_REGNUM && (i) <= PPC_SIER_REGNUM)
+
 #define PPC_IS_TMSPR_REGNUM(i) \
   ((i) >= PPC_TFHAR_REGNUM && (i) <= PPC_TFIAR_REGNUM)
 
diff --git a/gdb/regformats/rs6000/powerpc-isa207-htm-vsx32l.dat b/gdb/regformats/rs6000/powerpc-isa207-htm-vsx32l.dat
index 6f5bbad28f..c19416db86 100644
--- a/gdb/regformats/rs6000/powerpc-isa207-htm-vsx32l.dat
+++ b/gdb/regformats/rs6000/powerpc-isa207-htm-vsx32l.dat
@@ -145,6 +145,14 @@  expedite:r1,pc
 64:ppr
 64:dscr
 64:tar
+64:bescr
+64:ebbhr
+64:ebbrr
+64:mmcr0
+64:mmcr2
+64:siar
+64:sdar
+64:sier
 64:tfhar
 64:texasr
 64:tfiar
diff --git a/gdb/regformats/rs6000/powerpc-isa207-htm-vsx64l.dat b/gdb/regformats/rs6000/powerpc-isa207-htm-vsx64l.dat
index 2f3d21c4c6..38359959fd 100644
--- a/gdb/regformats/rs6000/powerpc-isa207-htm-vsx64l.dat
+++ b/gdb/regformats/rs6000/powerpc-isa207-htm-vsx64l.dat
@@ -145,6 +145,14 @@  expedite:r1,pc
 64:ppr
 64:dscr
 64:tar
+64:bescr
+64:ebbhr
+64:ebbrr
+64:mmcr0
+64:mmcr2
+64:siar
+64:sdar
+64:sier
 64:tfhar
 64:texasr
 64:tfiar
diff --git a/gdb/regformats/rs6000/powerpc-isa207-vsx32l.dat b/gdb/regformats/rs6000/powerpc-isa207-vsx32l.dat
index 2b6e0a9c8d..0718d72d93 100644
--- a/gdb/regformats/rs6000/powerpc-isa207-vsx32l.dat
+++ b/gdb/regformats/rs6000/powerpc-isa207-vsx32l.dat
@@ -145,3 +145,11 @@  expedite:r1,pc
 64:ppr
 64:dscr
 64:tar
+64:bescr
+64:ebbhr
+64:ebbrr
+64:mmcr0
+64:mmcr2
+64:siar
+64:sdar
+64:sier
diff --git a/gdb/regformats/rs6000/powerpc-isa207-vsx64l.dat b/gdb/regformats/rs6000/powerpc-isa207-vsx64l.dat
index 095bd7f2d3..510c6c87da 100644
--- a/gdb/regformats/rs6000/powerpc-isa207-vsx64l.dat
+++ b/gdb/regformats/rs6000/powerpc-isa207-vsx64l.dat
@@ -145,3 +145,11 @@  expedite:r1,pc
 64:ppr
 64:dscr
 64:tar
+64:bescr
+64:ebbhr
+64:ebbrr
+64:mmcr0
+64:mmcr2
+64:siar
+64:sdar
+64:sier
diff --git a/gdb/rs6000-tdep.c b/gdb/rs6000-tdep.c
index 6687e20d2b..0c19a4c557 100644
--- a/gdb/rs6000-tdep.c
+++ b/gdb/rs6000-tdep.c
@@ -5954,7 +5954,7 @@  rs6000_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
   enum powerpc_elf_abi elf_abi = POWERPC_ELF_AUTO;
   int have_fpu = 0, have_spe = 0, have_mq = 0, have_altivec = 0;
   int have_dfp = 0, have_vsx = 0, have_ppr = 0, have_dscr = 0;
-  int have_tar = 0, have_htm = 0;
+  int have_tar = 0, have_ebb = 0, have_pmu = 0, have_htm = 0;
   int tdesc_wordsize = -1;
   const struct target_desc *tdesc = info.target_desc;
   struct tdesc_arch_data *tdesc_data = NULL;
@@ -6295,6 +6295,54 @@  rs6000_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
       else
 	have_tar = 0;
 
+      /* Event-based Branching Registers.  */
+      feature = tdesc_find_feature (tdesc,
+				    "org.gnu.gdb.power.ebb");
+      if (feature != NULL)
+	{
+	  static const char *const ebb_regs[] = {
+	    "bescr", "ebbhr", "ebbrr"
+	  };
+
+	  valid_p = 1;
+	  for (i = 0; i < ARRAY_SIZE (ebb_regs); i++)
+	    valid_p &= tdesc_numbered_register (feature, tdesc_data,
+						PPC_BESCR_REGNUM + i,
+						ebb_regs[i]);
+	  if (!valid_p)
+	    {
+	      tdesc_data_cleanup (tdesc_data);
+	      return NULL;
+	    }
+	  have_ebb = 1;
+	}
+      else
+	have_ebb = 0;
+
+      /* Performance Monitor Registers.  */
+      feature = tdesc_find_feature (tdesc,
+				    "org.gnu.gdb.power.pmu");
+      if (feature != NULL)
+	{
+	  static const char *const pmu_regs[] = {
+	    "mmcr0", "mmcr2", "siar", "sdar", "sier"
+	  };
+
+	  valid_p = 1;
+	  for (i = 0; i < ARRAY_SIZE (pmu_regs); i++)
+	    valid_p &= tdesc_numbered_register (feature, tdesc_data,
+						PPC_MMCR0_REGNUM + i,
+						pmu_regs[i]);
+	  if (!valid_p)
+	    {
+	      tdesc_data_cleanup (tdesc_data);
+	      return NULL;
+	    }
+	  have_pmu = 1;
+	}
+      else
+	have_pmu = 0;
+
       /* Hardware Transactional Memory Registers.  */
       feature = tdesc_find_feature (tdesc,
 				    "org.gnu.gdb.power.htm");
@@ -6582,6 +6630,21 @@  rs6000_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
   tdep->ppc_ppr_regnum = have_ppr ? PPC_PPR_REGNUM : -1;
   tdep->ppc_dscr_regnum = have_dscr ? PPC_DSCR_REGNUM : -1;
   tdep->ppc_tar_regnum = have_tar ? PPC_TAR_REGNUM : -1;
+  tdep->have_ebb = have_ebb;
+
+  /* If additional pmu registers are added, care must be taken when
+     setting new fields in the tdep below, to maintain compatibility
+     with features that only provide some of the registers.  Currently
+     gdb access to the pmu registers is only supported in linux, and
+     linux only provides a subset of the pmu registers defined in the
+     architecture.  */
+
+  tdep->ppc_mmcr0_regnum = have_pmu ? PPC_MMCR0_REGNUM : -1;
+  tdep->ppc_mmcr2_regnum = have_pmu ? PPC_MMCR2_REGNUM : -1;
+  tdep->ppc_siar_regnum = have_pmu ? PPC_SIAR_REGNUM : -1;
+  tdep->ppc_sdar_regnum = have_pmu ? PPC_SDAR_REGNUM : -1;
+  tdep->ppc_sier_regnum = have_pmu ? PPC_SIER_REGNUM : -1;
+
   tdep->have_htm = have_htm;
 
   set_gdbarch_pc_regnum (gdbarch, PPC_PC_REGNUM);