Patchwork aarch64: Add tunable glibc.memset.dc_zva_threshold

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Submitter Wilco Dijkstra
Date Aug. 13, 2019, 1:10 p.m.
Message ID <VI1PR0801MB21278074A691DC6E82F1BD8483D20@VI1PR0801MB2127.eurprd08.prod.outlook.com>
Download mbox | patch
Permalink /patch/34070/
State New
Headers show

Comments

Wilco Dijkstra - Aug. 13, 2019, 1:10 p.m.
Hi Feng,

> This version disable DC ZVA in emag.

That looks good to me.


OK

Wilco

Patch

diff --git a/sysdeps/aarch64/multiarch/memset_base64.S b/sysdeps/aarch64/multiarch/memset_base64.S
index 9a62325..c0cccba 100644
--- a/sysdeps/aarch64/multiarch/memset_base64.S
+++ b/sysdeps/aarch64/multiarch/memset_base64.S
@@ -23,6 +23,7 @@ 
 # define MEMSET __memset_base64
 #endif

+/* To disable DC ZVA, set this threshold to 0. */
 #ifndef DC_ZVA_THRESHOLD
 # define DC_ZVA_THRESHOLD 512
 #endif
@@ -91,11 +92,12 @@  L(set96):
        .p2align 4
 L(set_long):
        stp     val, val, [dstin]
+       bic     dst, dstin, 15
+#if DC_ZVA_THRESHOLD
        cmp     count, DC_ZVA_THRESHOLD
        ccmp    val, 0, 0, cs
-       bic     dst, dstin, 15
        b.eq    L(zva_64)
-
+#endif
        /* Small-size or non-zero memset does not use DC ZVA. */
        sub     count, dstend, dst

@@ -105,7 +107,11 @@  L(set_long):
         * count is less than 33 bytes, so as to bypass 2 unneccesary stps.
         */
        sub     count, count, 64+16+1
+
+#if DC_ZVA_THRESHOLD
+       /* Align loop on 16-byte boundary, this might be friendly to i-cache. */
        nop
+#endif

 1:     stp     val, val, [dst, 16]
        stp     val, val, [dst, 32]
@@ -121,6 +127,7 @@  L(set_long):
        stp     val, val, [dstend, -16]
        ret

+#if DC_ZVA_THRESHOLD
        .p2align 3
 L(zva_64):
        stp     val, val, [dst, 16]
@@ -173,6 +180,7 @@  L(zva_64):
 1:     stp     val, val, [dstend, -32]
        stp     val, val, [dstend, -16]
        ret
+#endif

 END (MEMSET)
 libc_hidden_builtin_def (MEMSET)
diff --git a/sysdeps/aarch64/multiarch/memset_emag.S b/sysdeps/aarch64/multiarch/memset_emag.S
index 1c1fabc..c2aed62 100644
--- a/sysdeps/aarch64/multiarch/memset_emag.S
+++ b/sysdeps/aarch64/multiarch/memset_emag.S
@@ -21,12 +21,14 @@ 
 # define MEMSET __memset_emag

 /*
- * Using dc zva to zero memory does not produce better performance if
+ * Using DC ZVA to zero memory does not produce better performance if
  * memory size is not very large, especially when there are multiple
- * processes/threads contending memory/cache. Here we use a somewhat
- * large threshold to trigger usage of dc zva.
-*/
-# define DC_ZVA_THRESHOLD 1024
+ * processes/threads contending memory/cache. Here we set threshold to
+ * zero to disable using DC ZVA, which is good for multi-process/thread
+ * workloads.
+ */
+
+# define DC_ZVA_THRESHOLD 0

 # include "./memset_base64.S"
 #endif