Patchwork [v2,10/10] Remove reg2 section from Aarch64 SVE cores

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Submitter Alan Hayward
Date June 6, 2018, 3:16 p.m.
Message ID <20180606151629.36602-11-alan.hayward@arm.com>
Download mbox | patch
Permalink /patch/27668/
State New
Headers show

Comments

Alan Hayward - June 6, 2018, 3:16 p.m.
reg2 sections in SVE binaries will cause gdb to segfault on loading
due to miscalculating the register size.

For now, simply remove reg2 from SVE core files. This results in
core files without any vector/float register. Full core support
for SVE will come in a later set of patches.

2018-06-06  Alan Hayward  <alan.hayward@arm.com>

gdb/
	* aarch64-linux-tdep.c
	(aarch64_linux_iterate_over_regset_sections): Check for SVE.
---
 gdb/aarch64-linux-tdep.c | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)
Simon Marchi - June 11, 2018, 2:47 a.m.
On 2018-06-06 11:16 AM, Alan Hayward wrote:
> reg2 sections in SVE binaries will cause gdb to segfault on loading
> due to miscalculating the register size.
> 
> For now, simply remove reg2 from SVE core files. This results in
> core files without any vector/float register. Full core support
> for SVE will come in a later set of patches.
> 
> 2018-06-06  Alan Hayward  <alan.hayward@arm.com>
> 
> gdb/
> 	* aarch64-linux-tdep.c
> 	(aarch64_linux_iterate_over_regset_sections): Check for SVE.
> ---
>  gdb/aarch64-linux-tdep.c | 7 +++++--
>  1 file changed, 5 insertions(+), 2 deletions(-)
> 
> diff --git a/gdb/aarch64-linux-tdep.c b/gdb/aarch64-linux-tdep.c
> index 96dc8a1132..b05bb49ae8 100644
> --- a/gdb/aarch64-linux-tdep.c
> +++ b/gdb/aarch64-linux-tdep.c
> @@ -227,10 +227,13 @@ aarch64_linux_iterate_over_regset_sections (struct gdbarch *gdbarch,
>  					    void *cb_data,
>  					    const struct regcache *regcache)
>  {
> +  struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
> +
>    cb (".reg", AARCH64_LINUX_SIZEOF_GREGSET, &aarch64_linux_gregset,
>        NULL, cb_data);
> -  cb (".reg2", AARCH64_LINUX_SIZEOF_FPREGSET, &aarch64_linux_fpregset,
> -      NULL, cb_data);
> +  if (!tdep->has_sve ())
> +    cb (".reg2", AARCH64_LINUX_SIZEOF_FPREGSET, &aarch64_linux_fpregset,
> +	NULL, cb_data);
>  }
>  
>  /* Implement the "core_read_description" gdbarch method.  SVE not yet
> 

IIUC, this doesn't remove existing features?  If a program was using the neon
registers, they will still be available?

If so, this LGTM.

Simon
Alan Hayward - June 11, 2018, 4:36 p.m.
> On 11 Jun 2018, at 03:47, Simon Marchi <simark@simark.ca> wrote:

> 

> On 2018-06-06 11:16 AM, Alan Hayward wrote:

>> reg2 sections in SVE binaries will cause gdb to segfault on loading

>> due to miscalculating the register size.

>> 

>> For now, simply remove reg2 from SVE core files. This results in

>> core files without any vector/float register. Full core support

>> for SVE will come in a later set of patches.

>> 

>> 2018-06-06  Alan Hayward  <alan.hayward@arm.com>

>> 

>> gdb/

>> 	* aarch64-linux-tdep.c

>> 	(aarch64_linux_iterate_over_regset_sections): Check for SVE.

>> ---

>> gdb/aarch64-linux-tdep.c | 7 +++++--

>> 1 file changed, 5 insertions(+), 2 deletions(-)

>> 

>> diff --git a/gdb/aarch64-linux-tdep.c b/gdb/aarch64-linux-tdep.c

>> index 96dc8a1132..b05bb49ae8 100644

>> --- a/gdb/aarch64-linux-tdep.c

>> +++ b/gdb/aarch64-linux-tdep.c

>> @@ -227,10 +227,13 @@ aarch64_linux_iterate_over_regset_sections (struct gdbarch *gdbarch,

>> 					    void *cb_data,

>> 					    const struct regcache *regcache)

>> {

>> +  struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);

>> +

>>   cb (".reg", AARCH64_LINUX_SIZEOF_GREGSET, &aarch64_linux_gregset,

>>       NULL, cb_data);

>> -  cb (".reg2", AARCH64_LINUX_SIZEOF_FPREGSET, &aarch64_linux_fpregset,

>> -      NULL, cb_data);

>> +  if (!tdep->has_sve ())

>> +    cb (".reg2", AARCH64_LINUX_SIZEOF_FPREGSET, &aarch64_linux_fpregset,

>> +	NULL, cb_data);

>> }

>> 

>> /* Implement the "core_read_description" gdbarch method.  SVE not yet

>> 

> 

> IIUC, this doesn't remove existing features?  If a program was using the neon

> registers, they will still be available?

> 

> If so, this LGTM.

> 


With this patch, on SVE systems, gdb will create cores without any sve OR neon
registers. Whilst not ideal that’s better than gdb segfaulting.

...However, this got me thinking.

SVE core files produced by the kernel will have both FP and SVE sections, even
though the FP section is essentially redundant. So, gdb does need to support
that.

I'm working my way through fixing that. It’ll mostly be a change to regcache
to handle mismatched register sizes to core file slot sizes. I’ll drop this patch
for now, and will hopefully have a new patch posted Tuesday.


Alan.

Patch

diff --git a/gdb/aarch64-linux-tdep.c b/gdb/aarch64-linux-tdep.c
index 96dc8a1132..b05bb49ae8 100644
--- a/gdb/aarch64-linux-tdep.c
+++ b/gdb/aarch64-linux-tdep.c
@@ -227,10 +227,13 @@  aarch64_linux_iterate_over_regset_sections (struct gdbarch *gdbarch,
 					    void *cb_data,
 					    const struct regcache *regcache)
 {
+  struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+
   cb (".reg", AARCH64_LINUX_SIZEOF_GREGSET, &aarch64_linux_gregset,
       NULL, cb_data);
-  cb (".reg2", AARCH64_LINUX_SIZEOF_FPREGSET, &aarch64_linux_fpregset,
-      NULL, cb_data);
+  if (!tdep->has_sve ())
+    cb (".reg2", AARCH64_LINUX_SIZEOF_FPREGSET, &aarch64_linux_fpregset,
+	NULL, cb_data);
 }
 
 /* Implement the "core_read_description" gdbarch method.  SVE not yet