From patchwork Thu Jun 2 06:24:31 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roger Sayle X-Patchwork-Id: 54708 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id DE6CE38F8622 for ; Thu, 2 Jun 2022 06:24:52 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from server.nextmovesoftware.com (server.nextmovesoftware.com [162.254.253.69]) by sourceware.org (Postfix) with ESMTPS id 3B2AB385E036 for ; Thu, 2 Jun 2022 06:24:34 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 3B2AB385E036 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=nextmovesoftware.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=nextmovesoftware.com DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=nextmovesoftware.com; s=default; h=Content-Type:MIME-Version:Message-ID: Date:Subject:Cc:To:From:Sender:Reply-To:Content-Transfer-Encoding:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:In-Reply-To:References:List-Id:List-Help:List-Unsubscribe: List-Subscribe:List-Post:List-Owner:List-Archive; bh=IhorPXMM+pFk+wkAO2wDYNhgFeIwcaoBhZfL11z06LE=; b=f9NhfCwM9BJqQvl+V99CC0sGo7 M67gPMTgKr/npk1gpsL264tkwoGtOf2SUz/Hk3UEitEfjblDglAC5wVhq26dVQgy1Y4WIuNlSgKbB qX8m/SohpwF1TPBFHLu34WJodojmGzwfyF67hpm13uXH7JMBSXPHDLIsdqERvAzTEhHkRnvUTVr/Y TB9n6ES7BOIV7ozePfwcRZEKJcGmCQdOqMAR7cCddgirg1hgeT4Sv+49mlHD44FoR3fs5P5ayN+r5 bgSUAcEtqoNbtI/AwkZMOmAigyxjBLqvCmnXuE57CHKL+LPEXH0y/3ShK/f1tAaQDTFsc4BpNwird hOpyNDkA==; Received: from host109-154-46-241.range109-154.btcentralplus.com ([109.154.46.241]:54501 helo=Dell) by server.nextmovesoftware.com with esmtpsa (TLS1.2) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1nweG1-0001SP-E3; Thu, 02 Jun 2022 02:24:33 -0400 From: "Roger Sayle" To: "'GCC Patches'" Subject: [x86_64 PATCH] PR target/105791: Add V1TI to V_128_256 for xop_pcmov_v1ti. Date: Thu, 2 Jun 2022 07:24:31 +0100 Message-ID: <02ca01d87649$6c862350$459269f0$@nextmovesoftware.com> MIME-Version: 1.0 X-Mailer: Microsoft Outlook 16.0 Thread-Index: Adh2SOOf36mR0w2dTACISGTT2V9zsQ== Content-Language: en-gb X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - server.nextmovesoftware.com X-AntiAbuse: Original Domain - gcc.gnu.org X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - nextmovesoftware.com X-Get-Message-Sender-Via: server.nextmovesoftware.com: authenticated_id: roger@nextmovesoftware.com X-Authenticated-Sender: server.nextmovesoftware.com: roger@nextmovesoftware.com X-Source: X-Source-Args: X-Source-Dir: X-Spam-Status: No, score=-12.5 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org Sender: "Gcc-patches" This patch resolves PR target/105791 which is a regression that was accidentally introduced for my workaround to PR tree-optimization/10566. (a deeper problem in GCC's vectorizer creating VEC_COND_EXPR when it shouldn't). The latest issues is that by providing a vcond_mask_v1tiv1ti pattern in sse.md, the backend now calls ix86_expand_sse_movcc with V1TImode operands, which has a special case for TARGET_XOP to generate a vpcmov instruction. Unfortunately, there wasn't previously a V1TImode variant, xop_pcmov_v1ti, so we'd ICE. This is easily fixed by adding V1TImode (and V2TImode) to V_128_256 which is only used for defining XOP's vpcmov instruction. This in turn requires V1TI (and V2TI) to be supported by (though the use if in the names xop_pcmov_ seems unnecessary; the mode makes the name unique). This patch has been tested on x86_64-pc-linux-gnu with make bootstrap and make -k check, both with and without --target_board=unix{-m32}, with no new failures. Ok for mainline? 2022-06-02 Roger Sayle gcc/ChangeLog PR target/105791 * config/i386/sse.md (V_128_256):Add V1TI and V2TI. (define_mode_attr avxsizesuffix): Add support for V1TI and V2TI. gcc/testsuite/ChangeLog PR target/105791 * gcc.target/i386/pr105791.c: New test case. Thanks in advance. Sorry for the inconvenience/breakage. Roger diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index c2e046e8..8b3163f 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -301,7 +301,8 @@ ;; All 128bit and 256bit vector modes (define_mode_iterator V_128_256 - [V32QI V16QI V16HI V8HI V8SI V4SI V4DI V2DI V16HF V8HF V8SF V4SF V4DF V2DF]) + [V32QI V16QI V16HI V8HI V8SI V4SI V4DI V2DI V2TI V1TI + V16HF V8HF V8SF V4SF V4DF V2DF]) ;; All 512bit vector modes (define_mode_iterator V_512 [V64QI V32HI V16SI V8DI V16SF V8DF]) @@ -897,9 +898,9 @@ (V8HI "sse4_1") (V16HI "avx")]) (define_mode_attr avxsizesuffix - [(V64QI "512") (V32HI "512") (V16SI "512") (V8DI "512") - (V32QI "256") (V16HI "256") (V8SI "256") (V4DI "256") - (V16QI "") (V8HI "") (V4SI "") (V2DI "") + [(V64QI "512") (V32HI "512") (V16SI "512") (V8DI "512") (V4TI "512") + (V32QI "256") (V16HI "256") (V8SI "256") (V4DI "256") (V2TI "256") + (V16QI "") (V8HI "") (V4SI "") (V2DI "") (V1TI "") (V32HF "512") (V16SF "512") (V8DF "512") (V16HF "256") (V8SF "256") (V4DF "256") (V8HF "") (V4SF "") (V2DF "")]) diff --git a/gcc/testsuite/gcc.target/i386/pr105791.c b/gcc/testsuite/gcc.target/i386/pr105791.c new file mode 100644 index 0000000..55e278b --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr105791.c @@ -0,0 +1,13 @@ +/* { dg-do compile { target int128 } } */ +/* { dg-options "-O2 -mxop" } */ +typedef __int128 __attribute__((__vector_size__ (sizeof (__int128)))) U; +typedef int __attribute__((__vector_size__ (sizeof (int)))) V; + +U u; +V v; + +U +foo (void) +{ + return (0 != __builtin_convertvector (v, U)) <= (0 != u); +}