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Win64; x64; rv:91.0) Gecko/20100101 Thunderbird/91.9.0 Content-Language: en-US To: gcc-patches@gcc.gnu.org Subject: [PATCH 1/5] xtensa: Simplify EXTUI instruction maskimm validations X-Spam-Status: No, score=-13.0 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_ENVFROM_END_DIGIT, FREEMAIL_FROM, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Takayuki 'January June' Suwa via Gcc-patches From: Takayuki 'January June' Suwa Reply-To: Takayuki 'January June' Suwa Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org Sender: "Gcc-patches" No functional changes. gcc/ChangeLog: * gcc/config/xtensa/predicates.md (extui_fldsz_operand): Simplify. * gcc/config/xtensa/xtensa.cc (xtensa_mask_immediate, print_operand): Ditto. --- gcc/config/xtensa/predicates.md | 2 +- gcc/config/xtensa/xtensa.cc | 24 +++--------------------- 2 files changed, 4 insertions(+), 22 deletions(-) diff --git a/gcc/config/xtensa/predicates.md b/gcc/config/xtensa/predicates.md index 01226a2b3c7..daea63b182c 100644 --- a/gcc/config/xtensa/predicates.md +++ b/gcc/config/xtensa/predicates.md @@ -55,7 +55,7 @@ (define_predicate "extui_fldsz_operand" (and (match_code "const_int") - (match_test "xtensa_mask_immediate ((1 << INTVAL (op)) - 1)"))) + (match_test "IN_RANGE (INTVAL (op), 1, 16)"))) (define_predicate "sext_operand" (if_then_else (match_test "TARGET_SEXT") diff --git a/gcc/config/xtensa/xtensa.cc b/gcc/config/xtensa/xtensa.cc index 7023badf0e2..a1f77b2bd35 100644 --- a/gcc/config/xtensa/xtensa.cc +++ b/gcc/config/xtensa/xtensa.cc @@ -456,19 +456,7 @@ xtensa_b4constu (HOST_WIDE_INT v) bool xtensa_mask_immediate (HOST_WIDE_INT v) { -#define MAX_MASK_SIZE 16 - int mask_size; - - for (mask_size = 1; mask_size <= MAX_MASK_SIZE; mask_size++) - { - if ((v & 1) == 0) - return false; - v = v >> 1; - if (v == 0) - return true; - } - - return false; + return IN_RANGE (exact_log2 (v + 1), 1, 16); } @@ -2430,17 +2418,11 @@ print_operand (FILE *file, rtx x, int letter) case 'K': if (GET_CODE (x) == CONST_INT) { - int num_bits = 0; unsigned val = INTVAL (x); - while (val & 1) - { - num_bits += 1; - val = val >> 1; - } - if ((val != 0) || (num_bits == 0) || (num_bits > 16)) + if (!xtensa_mask_immediate (val)) fatal_insn ("invalid mask", x); - fprintf (file, "%d", num_bits); + fprintf (file, "%d", floor_log2 (val + 1)); } else output_operand_lossage ("invalid %%K value"); From patchwork Fri May 13 13:27:36 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Takayuki 'January June' Suwa X-Patchwork-Id: 53941 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 5DBCE395C00C for ; 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(175.177.45.163 with ) by smtp6005.mail.ssk.ynwp.yahoo.co.jp with SMTP; 13 May 2022 13:35:19 -0000 X-YMail-JAS: snnJh5cVM1kqLiKyh3edXVKSUWWi2Ar1oF9L4AZ.MQjdrHKQTfjGBVSFuldGvKMNjImyS9V3EvTa4oxjfzqS.dyBzW42_kcHb_2KwFLJk0j.1J2QndZ_dNWSXxUx1HNpqLHF3qIBeg-- X-Apparently-From: X-YMail-OSG: ddWoJUcVM1lNxjCh3plo2yO9Jsy7hNu8CZZTjJrsaL6IkuD QE_ASMrrny54QQvJD3BvF4ChjZUR7LM2kYqwvuB8G_qEyWCqb50Hid8oig98 3oRiPHpNROz8VWn6QhNBkIhnf5zXxgBPoaxfq4Z4EOllo0Xd7FMUq34h1leQ 6T5iILeSJoafCXgvtIFzwwGaWs2T3NvDogdnszduSmtYz0ozLo78j50HJOgV MBiKTMvccfw9dsjMbjluFUMSdkxtvOEhVCOUpm7PpIa_nkVJoI4UYBe48gF8 i_IHdZIG5tBXGieiE4gNXrw_G_wiThs14puihMaxTFWcvADxO0uVrxiQ0nbP bq7N.9Mauu7CrgbLPoBccm0lC8oCobVLiiNNZX6wBZMXRbFoxwAwyr8LNVni eoEm0xrUDeNIQBvlzOxNJGIPy_6fDZ1TFt53MCTGXG7Pjbso2BCmM3RIe9Q8 qmyg6ugnt62NcEJ7FRXhLm.JsdgBwKU8DMP8ma.MBVtDouK.Zrw9rO_hxdsk k5Etqh2m5DmR..dIf8.K8e1EzzDJl1M.SuD6xFPFSacwjrQMhyQujEFPaMfU GbG4asTqfV_jjN8.O9u.gDwF3aEBOu5FOGEpo_JmmHReEtn3px9mZvZTLwqL 05PgYLwRPFsXICAWTBpprcC.iND4GswnVslsJ3w0Pxmr6zPUvQQ5JWRPxca. ci6ICTBmHw_2VGpMPzvTA2JtY3vfFWFG4A2gsweiT4goRYXbAwbXKc.5vgNq PgLwnpcnv9yazJ97Mi9z9ArVhNjauiF28ol1W9GynbG8hy8G4vsgoIIhQGfm 3vAWTu4AqeVYI2KK.YwvNSNzJ6zn.6Iu1UpGsE9lzZYEIDfr4xDdm208kemH QWKpS5uGHYbciOM8DfYV52nfXQu114MEZBbTDl8V4vVwEmN.Gr1rkKskZIkX tmHpmzZgu5ssudey.YQ-- Message-ID: <910788ae-597e-5564-88ea-cbda6de285a0@yahoo.co.jp> Date: Fri, 13 May 2022 22:27:36 +0900 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 6.1; Win64; x64; rv:91.0) Gecko/20100101 Thunderbird/91.9.0 Content-Language: en-US To: gcc-patches@gcc.gnu.org Subject: [PATCH 2/5] xtensa: Make use of IN_RANGE macro where appropriate X-Spam-Status: No, score=-13.0 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_ENVFROM_END_DIGIT, FREEMAIL_FROM, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Takayuki 'January June' Suwa via Gcc-patches From: Takayuki 'January June' Suwa Reply-To: Takayuki 'January June' Suwa Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org Sender: "Gcc-patches" No functional changes. gcc/ChangeLog: * gcc/config/xtensa/constraints.md (M, O): Use the macro. * gcc/config/xtensa/predicates.md (addsubx_operand, extui_fldsz_operand, sext_fldsz_operand): Ditto. * gcc/config/xtensa/xtensa.cc (xtensa_simm8, xtensa_simm8x256, xtensa_simm12b, xtensa_uimm8, xtensa_uimm8x2, xtensa_uimm8x4, xtensa_mask_immediate, smalloffset_mem_p, printx, xtensa_call_save_reg, xtensa_expand_prologue): Ditto. * gcc/config/xtensa/xtensa.h (FUNCTION_ARG_REGNO_P): Ditto. --- gcc/config/xtensa/constraints.md | 4 ++-- gcc/config/xtensa/predicates.md | 5 ++--- gcc/config/xtensa/xtensa.cc | 20 ++++++++++---------- gcc/config/xtensa/xtensa.h | 2 +- 4 files changed, 15 insertions(+), 16 deletions(-) diff --git a/gcc/config/xtensa/constraints.md b/gcc/config/xtensa/constraints.md index 7fda33af33d..e7ac8dbfebf 100644 --- a/gcc/config/xtensa/constraints.md +++ b/gcc/config/xtensa/constraints.md @@ -92,7 +92,7 @@ "An integer constant in the range @minus{}32-95 for use with MOVI.N instructions." (and (match_code "const_int") - (match_test "ival >= -32 && ival <= 95"))) + (match_test "IN_RANGE (ival, -32, 95)"))) (define_constraint "N" "An unsigned 8-bit integer constant shifted left by 8 bits for use @@ -103,7 +103,7 @@ (define_constraint "O" "An integer constant that can be used in ADDI.N instructions." (and (match_code "const_int") - (match_test "ival == -1 || (ival >= 1 && ival <= 15)"))) + (match_test "ival == -1 || IN_RANGE (ival, 1, 15)"))) (define_constraint "P" "An integer constant that can be used as a mask value in an EXTUI diff --git a/gcc/config/xtensa/predicates.md b/gcc/config/xtensa/predicates.md index daea63b182c..a912e6d8bb2 100644 --- a/gcc/config/xtensa/predicates.md +++ b/gcc/config/xtensa/predicates.md @@ -25,8 +25,7 @@ (define_predicate "addsubx_operand" (and (match_code "const_int") - (match_test "INTVAL (op) >= 1 - && INTVAL (op) <= 3"))) + (match_test "IN_RANGE (INTVAL (op), 1, 3)"))) (define_predicate "arith_operand" (ior (and (match_code "const_int") @@ -64,7 +63,7 @@ (define_predicate "sext_fldsz_operand" (and (match_code "const_int") - (match_test "INTVAL (op) >= 8 && INTVAL (op) <= 23"))) + (match_test "IN_RANGE (INTVAL (op), 8, 23)"))) (define_predicate "lsbitnum_operand" (and (match_code "const_int") diff --git a/gcc/config/xtensa/xtensa.cc b/gcc/config/xtensa/xtensa.cc index a1f77b2bd35..c5518ff9549 100644 --- a/gcc/config/xtensa/xtensa.cc +++ b/gcc/config/xtensa/xtensa.cc @@ -351,42 +351,42 @@ struct gcc_target targetm = TARGET_INITIALIZER; bool xtensa_simm8 (HOST_WIDE_INT v) { - return v >= -128 && v <= 127; + return IN_RANGE (v, -128, 127); } bool xtensa_simm8x256 (HOST_WIDE_INT v) { - return (v & 255) == 0 && (v >= -32768 && v <= 32512); + return (v & 255) == 0 && IN_RANGE (v, -32768, 32512); } bool xtensa_simm12b (HOST_WIDE_INT v) { - return v >= -2048 && v <= 2047; + return IN_RANGE (v, -2048, 2047); } static bool xtensa_uimm8 (HOST_WIDE_INT v) { - return v >= 0 && v <= 255; + return IN_RANGE (v, 0, 255); } static bool xtensa_uimm8x2 (HOST_WIDE_INT v) { - return (v & 1) == 0 && (v >= 0 && v <= 510); + return (v & 1) == 0 && IN_RANGE (v, 0, 510); } static bool xtensa_uimm8x4 (HOST_WIDE_INT v) { - return (v & 3) == 0 && (v >= 0 && v <= 1020); + return (v & 3) == 0 && IN_RANGE (v, 0, 1020); } @@ -537,7 +537,7 @@ smalloffset_mem_p (rtx op) return FALSE; val = INTVAL (offset); - return (val & 3) == 0 && (val >= 0 && val <= 60); + return (val & 3) == 0 && IN_RANGE (val, 0, 60); } } return FALSE; @@ -2367,7 +2367,7 @@ static void printx (FILE *file, signed int val) { /* Print a hexadecimal value in a nice way. */ - if ((val > -0xa) && (val < 0xa)) + if (IN_RANGE (val, -9, 9)) fprintf (file, "%d", val); else if (val < 0) fprintf (file, "-0x%x", -val); @@ -2697,7 +2697,7 @@ xtensa_call_save_reg(int regno) return crtl->profile || !crtl->is_leaf || crtl->calls_eh_return || df_regs_ever_live_p (regno); - if (crtl->calls_eh_return && regno >= 2 && regno < 4) + if (crtl->calls_eh_return && IN_RANGE (regno, 2, 3)) return true; return !call_used_or_fixed_reg_p (regno) && df_regs_ever_live_p (regno); @@ -2817,7 +2817,7 @@ xtensa_expand_prologue (void) int callee_save_size = cfun->machine->callee_save_size; /* -128 is a limit of single addi instruction. */ - if (total_size > 0 && total_size <= 128) + if (IN_RANGE (total_size, 1, 128)) { insn = emit_insn (gen_addsi3 (stack_pointer_rtx, stack_pointer_rtx, GEN_INT (-total_size))); diff --git a/gcc/config/xtensa/xtensa.h b/gcc/config/xtensa/xtensa.h index d25594f0c1f..d027a777227 100644 --- a/gcc/config/xtensa/xtensa.h +++ b/gcc/config/xtensa/xtensa.h @@ -504,7 +504,7 @@ enum reg_class used for this purpose since all function arguments are pushed on the stack. */ #define FUNCTION_ARG_REGNO_P(N) \ - ((N) >= GP_OUTGOING_ARG_FIRST && (N) <= GP_OUTGOING_ARG_LAST) + IN_RANGE ((N), GP_OUTGOING_ARG_FIRST, GP_OUTGOING_ARG_LAST) /* Record the number of argument words seen so far, along with a flag to indicate whether these are incoming arguments. (FUNCTION_INCOMING_ARG From patchwork Fri May 13 13:29:22 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Takayuki 'January June' Suwa X-Patchwork-Id: 53942 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id A7804395C04B for ; Fri, 13 May 2022 13:37:46 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org A7804395C04B DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1652449066; bh=+9tPaofajscuooDHAkuT3uPNKQA/15OUsVO0EaaEBPc=; h=Date:To:Subject:List-Id:List-Unsubscribe:List-Archive:List-Post: List-Help:List-Subscribe:From:Reply-To:From; b=gjLqZufJVKMooRIsj3Hph82A7Pxv/TPmM1anJh9OKtGiPhFDyogDsVn7QQOMIfum0 nNb7iwnRzE7s7CVkW3mhZwgPaWY2ytLqdTQnW3qhAL/mryFQvffLy2Lnc3wWlHnFjt f5hb8DtKL75bx5eT0vWwK34d+rNTqiq4/XH0W3T0= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from nh604-vm9.bullet.mail.ssk.yahoo.co.jp (nh604-vm9.bullet.mail.ssk.yahoo.co.jp [182.22.90.66]) by sourceware.org (Postfix) with SMTP id 61723395B474 for ; Fri, 13 May 2022 13:35:22 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 61723395B474 Received: from [182.22.66.104] by nh604.bullet.mail.ssk.yahoo.co.jp with NNFMP; 13 May 2022 13:35:21 -0000 Received: from [182.22.91.133] by t602.bullet.mail.ssk.yahoo.co.jp with NNFMP; 13 May 2022 13:35:21 -0000 Received: from [127.0.0.1] by omp606.mail.ssk.yahoo.co.jp with NNFMP; 13 May 2022 13:35:21 -0000 X-Yahoo-Newman-Property: ymail-3 X-Yahoo-Newman-Id: 196810.48455.bm@omp606.mail.ssk.yahoo.co.jp Received: (qmail 81186 invoked by alias); 13 May 2022 13:35:21 -0000 Received: from unknown (HELO ?192.168.2.3?) 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WH_uKvYFufBPFbtpzlaJ_nlT1DJKcJFzGJjmhVdb8hbeQnMqtaBfwgf54IuM NQ_1HxrawqiIH73_ZcN59mxAXphKE42slnlNZflDoOUJcQZ0C.E9RntYSurh TRHvNRP2PskE1TcUBZO3ZwA.1HTIfxcYBkZwOtFNRpdPI0KIM3dns7a4JIW8 Vd_Gqi8ZIZd9zDQAzm6dAKzawBS8XOaAoUOYmXyJw1UfCWHAYZLtAFeEdj8m wr4E.ghiwoyMTZ.OJBXQAKFFmDRQYabdNyn.tcCC42Ld3r5iWtLrdhPv6F2V 0WCnF6di4jSEKlldbxg-- Message-ID: <6fc7ba62-f570-ec94-eab7-43f8da2d56a9@yahoo.co.jp> Date: Fri, 13 May 2022 22:29:22 +0900 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 6.1; Win64; x64; rv:91.0) Gecko/20100101 Thunderbird/91.9.0 Content-Language: en-US To: gcc-patches@gcc.gnu.org Subject: [PATCH 3/5] xtensa: Fix instruction counting regarding block move expansion X-Spam-Status: No, score=-13.0 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_ENVFROM_END_DIGIT, FREEMAIL_FROM, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Takayuki 'January June' Suwa via Gcc-patches From: Takayuki 'January June' Suwa Reply-To: Takayuki 'January June' Suwa Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org Sender: "Gcc-patches" This patch makes counting the number of instructions of the remainder (modulo 4) part more accurate. gcc/ChangeLog: * gcc/config/xtensa/xtensa.cc (xtensa_expand_block_move): Make instruction counting more accurate, and simplify emitting insns. --- gcc/config/xtensa/xtensa.cc | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) @@ -1350,7 +1350,7 @@ xtensa_expand_block_move (rtx *operands) temp[next] = gen_reg_rtx (mode[next]); x = adjust_address (src_mem, mode[next], offset_ld); - emit_insn (gen_rtx_SET (temp[next], x)); + emit_move_insn (temp[next], x); offset_ld += next_amount; bytes -= next_amount; @@ -1360,9 +1360,9 @@ xtensa_expand_block_move (rtx *operands) if (active[phase]) { active[phase] = false; - + x = adjust_address (dst_mem, mode[phase], offset_st); - emit_insn (gen_rtx_SET (x, temp[phase])); + emit_move_insn (x, temp[phase]); offset_st += amount[phase]; } diff --git a/gcc/config/xtensa/xtensa.cc b/gcc/config/xtensa/xtensa.cc index c5518ff9549..d2aabf38339 100644 --- a/gcc/config/xtensa/xtensa.cc +++ b/gcc/config/xtensa/xtensa.cc @@ -1313,7 +1313,7 @@ xtensa_expand_block_move (rtx *operands) move_ratio = 4; if (optimize > 2) move_ratio = LARGEST_MOVE_RATIO; - num_pieces = (bytes / align) + (bytes % align); /* Close enough anyway. */ + num_pieces = (bytes / align) + ((bytes % align + 1) / 2); if (num_pieces > move_ratio) return 0; From patchwork Fri May 13 13:31:16 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Takayuki 'January June' Suwa X-Patchwork-Id: 53943 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id D7293395C066 for ; Fri, 13 May 2022 13:38:43 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org D7293395C066 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1652449123; bh=AikbLAca5mM5Iwl9BuXpR5CwBzUYqi0ihFq4w0vLAcA=; h=Date:To:Subject:List-Id:List-Unsubscribe:List-Archive:List-Post: List-Help:List-Subscribe:From:Reply-To:From; b=qKV12UvQpbx5ljOMMVnBNTfIdc9dnolosDBv8F+XFU3ZvBjTTH7OL+pRbT/HOmgYY MFhFL1KRn6pLM5fe4YgUK+TZ1pXmc/zIPQ7WdZw4I2vco7kQVu8I26VEp7SNQo+ive Si1zJexDgzaRH3X6MR/288uHswyDRTPcMEjevveQ= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from nh602-vm1.bullet.mail.ssk.yahoo.co.jp (nh602-vm1.bullet.mail.ssk.yahoo.co.jp [182.22.90.26]) by sourceware.org (Postfix) with SMTP id 9394F395B05E for ; Fri, 13 May 2022 13:35:24 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 9394F395B05E Received: from [182.22.66.104] by nh602.bullet.mail.ssk.yahoo.co.jp with NNFMP; 13 May 2022 13:35:22 -0000 Received: from [182.22.91.133] by t602.bullet.mail.ssk.yahoo.co.jp with NNFMP; 13 May 2022 13:35:22 -0000 Received: from [127.0.0.1] by omp606.mail.ssk.yahoo.co.jp with NNFMP; 13 May 2022 13:35:22 -0000 X-Yahoo-Newman-Property: ymail-3 X-Yahoo-Newman-Id: 966811.48455.bm@omp606.mail.ssk.yahoo.co.jp Received: (qmail 4363 invoked by alias); 13 May 2022 13:35:22 -0000 Received: from unknown (HELO ?192.168.2.3?) (175.177.45.163 with ) by smtp6003.mail.ssk.ynwp.yahoo.co.jp with SMTP; 13 May 2022 13:35:22 -0000 X-YMail-JAS: AJrwoh0VM1lGKXWktoMMwojgq8NBghTIOFIk1iBoKhiTklcBkI9jJCas0dcITPGlSJP4eG8cTSxWF0CsILpOO.ZjTLu33Z1urS1WVccbcg.TDcaxB_0_9iVA1cLa3qgp_zNw9w3VZQ-- X-Apparently-From: X-YMail-OSG: yRF6e7EVM1ngp_LlHlbJrM4enCnGb7pXDRe3WKsIWU3cijA .3J28YJKz77XgaD1hVvkA6.YU.f1cPWsuKZQObYQyWQ5d8o_2iynlk3O2en3 nOvdxRzqfFB.eak6244xsnF4I68q.pReKVue0DwvzKbSNmGBwWLdLDII6xL7 6gTVfWLZtHVYf0f70917bDFm8COFg8O0A2od2QrrnWdONfcIgt8H0AodbeDt BPwfkNTnyXEMs5KQbDJe4Uz4Q5hHrkAfMBIwEZFjtbTUkZg4QvsHFekPDt0U 0HbFhESDqcNl2tvuW13.mBbMkIS4bKxM84WdqnVXITFtapccnD_.Jxs4QKVZ S7MEO.WxCTul_y9OFs1Vk5gW2uanAXnXu7CWlFmdBS2KJaQZK.pMu.uqaNMU Zk9qDxJrS.fLxCcJnpCcF_dDyzgQnpYD1OXUWY6_pyEstMSEVo31s4eafdLg ZUeLa2GMywtNuteYINPbe4Cqsj6ITf.BLSpvRResyA4Xv4pIAbWj44IrtjeQ wDo_wRNV2s8L7YE5eS1wrCztlYChYD0wcB_7d40ZFBfdz6vAUcGD3exM_6fC 26axZqG5mELuYvq492j5iWAWCrjKav7waCDcWFoe40dxtLgPPP9CYBkH_wc0 nObd.9wpZuJxZsWCQ9OU0R8fC3k8Qtyc6ce.BasxW1FYEMcKjX772SQvzMGg QOSf6R.qS_tNDjrS7lgm81G8yUJ2Ir7DzpRoxJBTQqUFmEMbSAnv8RMVnUTW BetUUgQnpIiytg7ttD52AkuAHHf6v15gCexBDo5tO5ggjVW.Y6F0VTYEZ0yf uXrDr7WX6DL47Qn94mzN4MHf2JOP8fVD2ulXVg1OBESLHAKk.U50pAFsXXXR xDvPvYhjhSZ5ZL8Q4VhEPFQgEXnsQPgkG2AT5QB9eEisJ6CJIb3bLOxYkhvq RJ7VLVKwbWFWb4mv4Ng-- Message-ID: Date: Fri, 13 May 2022 22:31:16 +0900 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 6.1; Win64; x64; rv:91.0) Gecko/20100101 Thunderbird/91.9.0 Content-Language: en-US To: gcc-patches@gcc.gnu.org Subject: [PATCH 4/5] xtensa: Add setmemsi insn pattern X-Spam-Status: No, score=-13.0 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_ENVFROM_END_DIGIT, FREEMAIL_FROM, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Takayuki 'January June' Suwa via Gcc-patches From: Takayuki 'January June' Suwa Reply-To: Takayuki 'January June' Suwa Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org Sender: "Gcc-patches" This patch introduces setmemsi insn pattern of two kinds, unrolled loop and small loop, for fixed small length and constant initialization value. gcc/ChangeLog: * gcc/config/xtensa/xtensa-protos.h (xtensa_expand_block_set_unrolled_loop, xtensa_expand_block_set_small_loop): New prototypes. * gcc/config/xtensa/xtensa.cc (xtensa_sizeof_MOVI, xtensa_expand_block_set_unrolled_loop, xtensa_expand_block_set_small_loop): New functions. * gcc/config/xtensa/xtensa.md (setmemsi): New expansion pattern. * gcc/config/xtensa/xtensa.opt (mlongcalls): Add target mask. --- gcc/config/xtensa/xtensa-protos.h | 2 + gcc/config/xtensa/xtensa.cc | 206 ++++++++++++++++++++++++++++++ gcc/config/xtensa/xtensa.md | 16 +++ gcc/config/xtensa/xtensa.opt | 2 +- 4 files changed, 225 insertions(+), 1 deletion(-) diff --git a/gcc/config/xtensa/xtensa-protos.h b/gcc/config/xtensa/xtensa-protos.h index 4bc42da2320..30e4b54394a 100644 --- a/gcc/config/xtensa/xtensa-protos.h +++ b/gcc/config/xtensa/xtensa-protos.h @@ -41,6 +41,8 @@ extern void xtensa_expand_conditional_branch (rtx *, machine_mode); extern int xtensa_expand_conditional_move (rtx *, int); extern int xtensa_expand_scc (rtx *, machine_mode); extern int xtensa_expand_block_move (rtx *); +extern int xtensa_expand_block_set_unrolled_loop (rtx *); +extern int xtensa_expand_block_set_small_loop (rtx *); extern void xtensa_split_operand_pair (rtx *, machine_mode); extern int xtensa_emit_move_sequence (rtx *, machine_mode); extern rtx xtensa_copy_incoming_a7 (rtx); diff --git a/gcc/config/xtensa/xtensa.cc b/gcc/config/xtensa/xtensa.cc index d2aabf38339..bebcbac0edd 100644 --- a/gcc/config/xtensa/xtensa.cc +++ b/gcc/config/xtensa/xtensa.cc @@ -1373,6 +1373,212 @@ xtensa_expand_block_move (rtx *operands) } +/* Try to expand a block set operation to a sequence of RTL move + instructions. If not optimizing, or if the block size is not a + constant, or if the block is too large, or if the value to + initialize the block with is not a constant, the expansion + fails and GCC falls back to calling memset(). + + operands[0] is the destination + operands[1] is the length + operands[2] is the initialization value + operands[3] is the alignment */ + +static int +xtensa_sizeof_MOVI (HOST_WIDE_INT imm) +{ + return (TARGET_DENSITY && IN_RANGE (imm, -32, 95)) ? 2 : 3; +} + +int +xtensa_expand_block_set_unrolled_loop (rtx *operands) +{ + rtx dst_mem = operands[0]; + HOST_WIDE_INT bytes, value, align; + int expand_len, funccall_len; + rtx x, reg; + int offset; + + if (!CONST_INT_P (operands[1]) || !CONST_INT_P (operands[2])) + return 0; + + bytes = INTVAL (operands[1]); + if (bytes <= 0) + return 0; + value = (int8_t)INTVAL (operands[2]); + align = INTVAL (operands[3]); + if (align > MOVE_MAX) + align = MOVE_MAX; + + /* Insn expansion: holding the init value. + Either MOV(.N) or L32R w/litpool. */ + if (align == 1) + expand_len = xtensa_sizeof_MOVI (value); + else if (value == 0 || value == -1) + expand_len = TARGET_DENSITY ? 2 : 3; + else + expand_len = 3 + 4; + /* Insn expansion: a series of aligned memory stores. + Consist of S8I, S16I or S32I(.N). */ + expand_len += (bytes / align) * (TARGET_DENSITY + && align == 4 ? 2 : 3); + /* Insn expansion: the remainder, sub-aligned memory stores. + A combination of S8I and S16I as needed. */ + expand_len += ((bytes % align + 1) / 2) * 3; + + /* Function call: preparing two arguments. */ + funccall_len = xtensa_sizeof_MOVI (value); + funccall_len += xtensa_sizeof_MOVI (bytes); + /* Function call: calling memset(). */ + funccall_len += TARGET_LONGCALLS ? (3 + 4 + 3) : 3; + + /* Apply expansion bonus (2x) if optimizing for speed. */ + if (optimize > 1 && !optimize_size) + funccall_len *= 2; + + /* Decide whether to expand or not, based on the sum of the length + of instructions. */ + if (expand_len > funccall_len) + return 0; + + x = XEXP (dst_mem, 0); + if (!REG_P (x)) + dst_mem = replace_equiv_address (dst_mem, force_reg (Pmode, x)); + switch (align) + { + case 1: + break; + case 2: + value = (int16_t)((uint8_t)value * 0x0101U); + break; + case 4: + value = (int32_t)((uint8_t)value * 0x01010101U); + break; + default: + gcc_unreachable (); + } + reg = force_reg (SImode, GEN_INT (value)); + + offset = 0; + do + { + int unit_size = MIN (bytes, align); + machine_mode unit_mode = (unit_size >= 4 ? SImode : + (unit_size >= 2 ? HImode : + QImode)); + unit_size = GET_MODE_SIZE (unit_mode); + + emit_move_insn (adjust_address (dst_mem, unit_mode, offset), + unit_mode == SImode ? reg + : convert_to_mode (unit_mode, reg, true)); + + offset += unit_size; + bytes -= unit_size; + } + while (bytes > 0); + + return 1; +} + +int +xtensa_expand_block_set_small_loop (rtx *operands) +{ + HOST_WIDE_INT bytes, value, align; + int expand_len, funccall_len; + rtx dst, end, reg; + machine_mode unit_mode; + rtx_code_label *label; + + if (!CONST_INT_P (operands[1]) || !CONST_INT_P (operands[2])) + return 0; + + bytes = INTVAL (operands[1]); + if (bytes <= 0) + return 0; + value = (int8_t)INTVAL (operands[2]); + align = INTVAL (operands[3]); + if (align > MOVE_MAX) + align = MOVE_MAX; + + /* Totally-aligned block only. */ + if (bytes % align != 0) + return 0; + + /* If 4-byte aligned, small loop substitution is almost optimal, thus + limited to only offset to the end address for ADDI instruction. */ + if (align == 4 && bytes > 127) + return 0; + + /* If no 4-byte aligned, loop count should be treated as the constraint. */ + if (align != 4 + && bytes / align > ((optimize > 1 && !optimize_size) ? 8 : 15)) + return 0; + + /* Insn expansion: holding the init value. + Either MOV(.N) or L32R w/litpool. */ + if (align == 1) + expand_len = xtensa_sizeof_MOVI (value); + else if (value == 0 || value == -1) + expand_len = TARGET_DENSITY ? 2 : 3; + else + expand_len = 3 + 4; + /* Insn expansion: ADDI(.N) for the end address. */ + expand_len += (TARGET_DENSITY && bytes <= 15) ? 2 : 3; + + /* Insn expansion: the loop body and branch instruction. + For store, one of S8I, S16I or S32I(.N). + For advance, ADDI(.N). + For branch, BNE. */ + expand_len += (TARGET_DENSITY && align == 4 ? 2 : 3) + + (TARGET_DENSITY ? 2 : 3) + 3; + + /* Function call: preparing two arguments. */ + funccall_len = xtensa_sizeof_MOVI (value); + funccall_len += xtensa_sizeof_MOVI (bytes); + /* Function call: calling memset(). */ + funccall_len += TARGET_LONGCALLS ? (3 + 4 + 3) : 3; + + /* Apply expansion bonus (2x) if optimizing for speed. */ + if (optimize > 1 && !optimize_size) + funccall_len *= 2; + + /* Decide whether to expand or not, based on the sum of the length + of instructions. */ + if (expand_len > funccall_len) + return 0; + + dst = gen_reg_rtx (SImode); + emit_move_insn (dst, XEXP (operands[0], 0)); + end = gen_reg_rtx (SImode); + emit_insn (gen_addsi3 (end, dst, operands[1] /* the length */)); + switch (align) + { + case 1: + unit_mode = QImode; + break; + case 2: + value = (int16_t)((uint8_t)value * 0x0101U); + unit_mode = HImode; + break; + case 4: + value = (int32_t)((uint8_t)value * 0x01010101U); + unit_mode = SImode; + break; + default: + gcc_unreachable (); + } + reg = force_reg (unit_mode, GEN_INT (value)); + + label = gen_label_rtx (); + emit_label (label); + emit_move_insn (gen_rtx_MEM (unit_mode, dst), reg); + emit_insn (gen_addsi3 (dst, dst, GEN_INT (align))); + emit_cmp_and_jump_insns (dst, end, NE, const0_rtx, SImode, true, label); + + return 1; +} + + void xtensa_expand_nonlocal_goto (rtx *operands) { diff --git a/gcc/config/xtensa/xtensa.md b/gcc/config/xtensa/xtensa.md index 96e043b26b5..2d146b7995c 100644 --- a/gcc/config/xtensa/xtensa.md +++ b/gcc/config/xtensa/xtensa.md @@ -1080,6 +1080,22 @@ DONE; }) +;; Block sets + +(define_expand "setmemsi" + [(match_operand:BLK 0 "memory_operand") + (match_operand:SI 1 "") + (match_operand:SI 2 "") + (match_operand:SI 3 "const_int_operand")] + "!optimize_debug && optimize" +{ + if (xtensa_expand_block_set_unrolled_loop (operands)) + DONE; + if (xtensa_expand_block_set_small_loop (operands)) + DONE; + FAIL; +}) + ;; Shift instructions. diff --git a/gcc/config/xtensa/xtensa.opt b/gcc/config/xtensa/xtensa.opt index c406297af0d..1fc68a3d994 100644 --- a/gcc/config/xtensa/xtensa.opt +++ b/gcc/config/xtensa/xtensa.opt @@ -27,7 +27,7 @@ Target Mask(FORCE_NO_PIC) Disable position-independent code (PIC) for use in OS kernel code. mlongcalls -Target +Target Mask(LONGCALLS) Use indirect CALLXn instructions for large programs. mtarget-align From patchwork Fri May 13 13:33:59 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Takayuki 'January June' Suwa X-Patchwork-Id: 53944 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 17574395C066 for ; Fri, 13 May 2022 13:39:41 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 17574395C066 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1652449181; bh=xhNmsb9fafcO00AeUYlno+v8s5L93V5Ff44f2M2avy0=; h=Date:To:Subject:List-Id:List-Unsubscribe:List-Archive:List-Post: List-Help:List-Subscribe:From:Reply-To:From; b=Kb8fpu+5hKw61FnMY2KGewBK/Anndl5FMGIc9Tb2nxkR3ozM0I3ORug0LhAMGbj0b 4FB2Gdnl2QrsP/e/4fCqaXQb3h+OGS4LH05as8ImHo5FbEHIiBUIgmVoDkWKdF1JP0 BOLiE8tLW5tCs2+54MgOagV12KLLXnPdzo2Zo1wY= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from nh603-vm13.bullet.mail.ssk.yahoo.co.jp (nh603-vm13.bullet.mail.ssk.yahoo.co.jp [182.22.90.54]) by sourceware.org (Postfix) with SMTP id 0CC65395C00C for ; Fri, 13 May 2022 13:35:25 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 0CC65395C00C Received: from [182.22.66.104] by nh603.bullet.mail.ssk.yahoo.co.jp with NNFMP; 13 May 2022 13:35:24 -0000 Received: from [182.22.91.128] by t602.bullet.mail.ssk.yahoo.co.jp with NNFMP; 13 May 2022 13:35:24 -0000 Received: from [127.0.0.1] by omp601.mail.ssk.yahoo.co.jp with NNFMP; 13 May 2022 13:35:24 -0000 X-Yahoo-Newman-Property: ymail-3 X-Yahoo-Newman-Id: 542894.42131.bm@omp601.mail.ssk.yahoo.co.jp Received: (qmail 65821 invoked by alias); 13 May 2022 13:35:24 -0000 Received: from unknown (HELO ?192.168.2.3?) (175.177.45.163 with ) by smtp6001.mail.ssk.ynwp.yahoo.co.jp with SMTP; 13 May 2022 13:35:24 -0000 X-YMail-JAS: LQaiv8cVM1mZQKDnTFnjf.Y1FJyxfqAI2MizoO9rvIpiw4veT37I9hYBsZmzzZf6QI6zyxL2y25t5nMFkFs7AasW6jzhRh9RC9wzkKYe7sEK4.T5l_ym4OFVKqN61XAqQ9hTO_LoqA-- X-Apparently-From: X-YMail-OSG: zhAf6cgVM1ksvJxzBQUVdvKmER1a3gQNaUoz6vJzN80spgo gx6aC3CG6phGErr04EG0_BvDXjWXFkY0s69L7ZY8MgHhK3po1L3On5mxLJo9 eQpenESsLDJrrmjJprKwh54r1BGiwyzJN62a6K0yWVS6kk9y0CyuF0n0O05P jRWO9uBVFCUcmu73R9SeX7pwhxtgVJCbYf0yqeIE239vjgdqi9Cd.JFzaZ7c BJ8Mgp37vA_MiCNu.dprLTeHgjIugxdiVZ0uM9Qpt0BysmCet17VKYRtjY00 LMyWcdey5UQ9n4eRBqe9RubfatN5hzjwV6wpRO91eIw8kFnSUr9x6q0gcv_h 309qwXbJBsLzgqb_uMgp1xIeTsr3jMnJpvMyoRyOK.SWkHFXQU0cyLBACYIs RGtbUyK2DJ2dfExpTWVjTecA1laRQpcWsFscQuwuUVQ8EuJQyUx_5Gp4aTGl azkR7AYEAx2RM8B5OD6oMF5u5epGZPz1y6wK8Y8VTcQR_Gk7g8zyLUgTJzZM 3b3u.f08tH2CnaIOIWsi.DchXANXDzryKz4x4X2pJX6LAGXWziPG8gdJUISc m2TClpEJYDPSmHzhiCaH9qMNE1QVdPCe.hZqe5T2jfqux2CpSO6tmrVCG2X7 1FnuLbrCX92FgTxjDESNNnc1PLEbhzwfOR_kBe1oKjVOMm9fvfeqPepke6BE p664tPKJAzWjjNNJ6CBfo3pdbSgWJK7VW7zhm9asQRIjAPyrakBuxPM4WixH lk01VJowLvlL3baCAx6p4d5PBH8.pFy0itJtlPmqPpVzaiKfLKbE7S1gGYa9 1jQQc2iXYVoqwMeKV_.eOuOutL0yhzj12SoL5G1HYWWqI6t6vU1XxuPQfctA ch4kSnNCwEfme1UYQhCNu3p4_kmeWixcdw1brmCkmEJVrbPx4i_oKSs_20yx YCsxW606D8QoZAaqhvA-- Message-ID: <0934250f-8808-0176-94f7-a6c7d37288b5@yahoo.co.jp> Date: Fri, 13 May 2022 22:33:59 +0900 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 6.1; Win64; x64; rv:91.0) Gecko/20100101 Thunderbird/91.9.0 Content-Language: en-US To: gcc-patches@gcc.gnu.org Subject: [PATCH 5/5] xtensa: Improve bswap[sd]i2 insn patterns X-Spam-Status: No, score=-13.0 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_ENVFROM_END_DIGIT, FREEMAIL_FROM, GIT_PATCH_0, KAM_SHORT, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Takayuki 'January June' Suwa via Gcc-patches From: Takayuki 'January June' Suwa Reply-To: Takayuki 'January June' Suwa Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org Sender: "Gcc-patches" This patch makes bswap[sd]i2 better register allocation, and reconstructs bswapsi2 in order to take advantage of GIMPLE manual byte-swapping recognition. gcc/ChangeLog: * gcc/config/xtensa/xtensa.md (bswapsi2): New expansion pattern. (bswapsi2_internal): Revise the template and condition, and add detection code for preceding the same insn in order to omit a "SSAI 8" instruction of the latter. (bswapdi2): Suppress built-in insn expansion with the corresponding library call when optimizing for size. gcc/testsuite/ChangeLog: * gcc.target/xtensa/bswap-O1.c: New. * gcc.target/xtensa/bswap-O2.c, gcc.target/xtensa/bswap-Os.c: Ditto. --- gcc/config/xtensa/xtensa.md | 77 +++++++++++++++++----- gcc/testsuite/gcc.target/xtensa/bswap-O1.c | 37 +++++++++++ gcc/testsuite/gcc.target/xtensa/bswap-O2.c | 37 +++++++++++ gcc/testsuite/gcc.target/xtensa/bswap-Os.c | 37 +++++++++++ 4 files changed, 172 insertions(+), 16 deletions(-) create mode 100644 gcc/testsuite/gcc.target/xtensa/bswap-O1.c create mode 100644 gcc/testsuite/gcc.target/xtensa/bswap-O2.c create mode 100644 gcc/testsuite/gcc.target/xtensa/bswap-Os.c diff --git a/gcc/config/xtensa/xtensa.md b/gcc/config/xtensa/xtensa.md index 2d146b7995c..6f5cbc541d8 100644 --- a/gcc/config/xtensa/xtensa.md +++ b/gcc/config/xtensa/xtensa.md @@ -471,23 +471,68 @@ ;; Byte swap. -(define_insn "bswapsi2" - [(set (match_operand:SI 0 "register_operand" "=&a") - (bswap:SI (match_operand:SI 1 "register_operand" "r")))] - "!optimize_size" - "ssai\t8\;srli\t%0, %1, 16\;src\t%0, %0, %1\;src\t%0, %0, %0\;src\t%0, %1, %0" - [(set_attr "type" "arith") - (set_attr "mode" "SI") - (set_attr "length" "15")]) +(define_expand "bswapsi2" + [(set (match_operand:SI 0 "register_operand" "") + (bswap:SI (match_operand:SI 1 "register_operand" "")))] + "!optimize_debug && optimize > 1" +{ + /* GIMPLE manual byte-swapping recognition is now activated. + For both built-in and manual bswaps, emit corresponding library call + if optimizing for size, or a series of dedicated machine instructions + if otherwise. */ + if (optimize_size) + emit_library_call_value (optab_libfunc (bswap_optab, SImode), + operands[0], LCT_NORMAL, SImode, + operands[1], SImode); + else + emit_insn (gen_bswapsi2_internal (operands[0], operands[1])); + DONE; +}) -(define_insn "bswapdi2" - [(set (match_operand:DI 0 "register_operand" "=&a") - (bswap:DI (match_operand:DI 1 "register_operand" "r")))] - "!optimize_size" - "ssai\t8\;srli\t%0, %D1, 16\;src\t%0, %0, %D1\;src\t%0, %0, %0\;src\t%0, %D1, %0\;srli\t%D0, %1, 16\;src\t%D0, %D0, %1\;src\t%D0, %D0, %D0\;src\t%D0, %1, %D0" - [(set_attr "type" "arith") - (set_attr "mode" "DI") - (set_attr "length" "27")]) +(define_insn "bswapsi2_internal" + [(set (match_operand:SI 0 "register_operand" "=a,&a") + (bswap:SI (match_operand:SI 1 "register_operand" "0,r"))) + (clobber (match_scratch:SI 2 "=&a,X"))] + "!optimize_debug && optimize > 1 && !optimize_size" +{ + rtx_insn *prev_insn = prev_nonnote_nondebug_insn (insn); + const char *init = "ssai\t8\;"; + static char result[64]; + if (prev_insn && NONJUMP_INSN_P (prev_insn)) + { + rtx x = PATTERN (prev_insn); + if (GET_CODE (x) == PARALLEL && XVECLEN (x, 0) == 2 + && GET_CODE (XVECEXP (x, 0, 0)) == SET + && GET_CODE (XVECEXP (x, 0, 1)) == CLOBBER) + { + x = XEXP (XVECEXP (x, 0, 0), 1); + if (GET_CODE (x) == BSWAP && GET_MODE (x) == SImode) + init = ""; + } + } + sprintf (result, + (which_alternative == 0) + ? "%s" "srli\t%%2, %%1, 16\;src\t%%2, %%2, %%1\;src\t%%2, %%2, %%2\;src\t%%0, %%1, %%2" + : "%s" "srli\t%%0, %%1, 16\;src\t%%0, %%0, %%1\;src\t%%0, %%0, %%0\;src\t%%0, %%1, %%0", + init); + return result; +} + [(set_attr "type" "arith,arith") + (set_attr "mode" "SI") + (set_attr "length" "15,15")]) + +(define_expand "bswapdi2" + [(set (match_operand:DI 0 "register_operand" "") + (bswap:DI (match_operand:DI 1 "register_operand" "")))] + "!optimize_debug && optimize > 1 && optimize_size" +{ + /* Replace with a single DImode library call. + Without this, two SImode library calls are emitted. */ + emit_library_call_value (optab_libfunc (bswap_optab, DImode), + operands[0], LCT_NORMAL, DImode, + operands[1], DImode); + DONE; +}) ;; Negation and one's complement. diff --git a/gcc/testsuite/gcc.target/xtensa/bswap-O1.c b/gcc/testsuite/gcc.target/xtensa/bswap-O1.c new file mode 100644 index 00000000000..a0c885baaf1 --- /dev/null +++ b/gcc/testsuite/gcc.target/xtensa/bswap-O1.c @@ -0,0 +1,37 @@ +/* { dg-do compile } */ +/* { dg-options "-O1" } */ + +unsigned int test_0(unsigned int a) +{ + return (a & 0x000000FF) << 24 | + (a & 0x0000FF00) << 8 | + (a & 0x00FF0000) >> 8 | + (a & 0xFF000000) >> 24; +} + +unsigned int test_1(unsigned int a) +{ + union + { + unsigned int i; + unsigned char a[4]; + } u, v; + u.i = a; + v.a[0] = u.a[3]; + v.a[1] = u.a[2]; + v.a[2] = u.a[1]; + v.a[3] = u.a[0]; + return v.i; +} + +unsigned int test_2(unsigned int a) +{ + return __builtin_bswap32(a); +} + +unsigned long long test_3(unsigned long long a) +{ + return __builtin_bswap64(a); +} + +/* { dg-final { scan-assembler-times "call" 2 } } */ diff --git a/gcc/testsuite/gcc.target/xtensa/bswap-O2.c b/gcc/testsuite/gcc.target/xtensa/bswap-O2.c new file mode 100644 index 00000000000..4cf95b9255c --- /dev/null +++ b/gcc/testsuite/gcc.target/xtensa/bswap-O2.c @@ -0,0 +1,37 @@ +/* { dg-do compile } */ +/* { dg-options "-O2" } */ + +unsigned int test_0(unsigned int a) +{ + return (a & 0x000000FF) << 24 | + (a & 0x0000FF00) << 8 | + (a & 0x00FF0000) >> 8 | + (a & 0xFF000000) >> 24; +} + +unsigned int test_1(unsigned int a) +{ + union + { + unsigned int i; + unsigned char a[4]; + } u, v; + u.i = a; + v.a[0] = u.a[3]; + v.a[1] = u.a[2]; + v.a[2] = u.a[1]; + v.a[3] = u.a[0]; + return v.i; +} + +unsigned int test_2(unsigned int a) +{ + return __builtin_bswap32(a); +} + +unsigned long long test_3(unsigned long long a) +{ + return __builtin_bswap64(a); +} + +/* { dg-final { scan-assembler-times "ssai" 4 } } */ diff --git a/gcc/testsuite/gcc.target/xtensa/bswap-Os.c b/gcc/testsuite/gcc.target/xtensa/bswap-Os.c new file mode 100644 index 00000000000..1e010fd62ae --- /dev/null +++ b/gcc/testsuite/gcc.target/xtensa/bswap-Os.c @@ -0,0 +1,37 @@ +/* { dg-do compile } */ +/* { dg-options "-Os" } */ + +unsigned int test_0(unsigned int a) +{ + return (a & 0x000000FF) << 24 | + (a & 0x0000FF00) << 8 | + (a & 0x00FF0000) >> 8 | + (a & 0xFF000000) >> 24; +} + +unsigned int test_1(unsigned int a) +{ + union + { + unsigned int i; + unsigned char a[4]; + } u, v; + u.i = a; + v.a[0] = u.a[3]; + v.a[1] = u.a[2]; + v.a[2] = u.a[1]; + v.a[3] = u.a[0]; + return v.i; +} + +unsigned int test_2(unsigned int a) +{ + return __builtin_bswap32(a); +} + +unsigned long long test_3(unsigned long long a) +{ + return __builtin_bswap64(a); +} + +/* { dg-final { scan-assembler-times "call" 4 } } */