From patchwork Tue Apr 12 15:42:22 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roger Sayle X-Patchwork-Id: 52818 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 272303857405 for ; Tue, 12 Apr 2022 15:42:41 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from server.nextmovesoftware.com (server.nextmovesoftware.com [162.254.253.69]) by sourceware.org (Postfix) with ESMTPS id A958E3858D28 for ; Tue, 12 Apr 2022 15:42:24 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org A958E3858D28 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=nextmovesoftware.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=nextmovesoftware.com DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=nextmovesoftware.com; s=default; h=Content-Type:MIME-Version:Message-ID: Date:Subject:To:From:Sender:Reply-To:Cc:Content-Transfer-Encoding:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:In-Reply-To:References:List-Id:List-Help:List-Unsubscribe: List-Subscribe:List-Post:List-Owner:List-Archive; bh=NOlpl9HVXe6o1CQZ9ctRpruB2DiX5z0RtDFaJOD9Rpo=; b=i7MXPM1y4RHJ1jiEQNgAH2zw3F jnMsimIP1hx58Xp6J909u6Q+HXPmN33gsPkb3tcXpWRUCjJqOjs9OYrC8dgFl5PGxXIQ75wVO8ACt lS1saN8yUIBZIDQ2BwzeURzXydCgvZaKksmv4wI0hP1lXPEM7wUZF9M453iBg7rfF4rvNxszvI7wI Wl6P1El6GaJ9LJsc35H31G8ELSMI1EMbsN0R6uBglGrR1PeKlDtNhfpO1DacFfPVv1Ht6yf09vukY PJZZNSgb+9HDLrrjniBBnNKVlDfFVtxQ8N6fiX1hmzUri9Prz45qXvDYV2zknICnYppHvTe7Qvf3b II4CLfPw==; Received: from [185.62.158.67] (port=55826 helo=Dell) by server.nextmovesoftware.com with esmtpsa (TLS1.2) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1neIeu-00022u-1X for gcc-patches@gcc.gnu.org; Tue, 12 Apr 2022 11:42:24 -0400 From: "Roger Sayle" To: Subject: [x86_64 PATCH] Avoid andb %dil when optimizing for size. Date: Tue, 12 Apr 2022 16:42:22 +0100 Message-ID: <012e01d84e83$e71cdb60$b5569220$@nextmovesoftware.com> MIME-Version: 1.0 X-Mailer: Microsoft Outlook 16.0 Thread-Index: AdhOg0hBodQSqMExQgaU+P5jwJPBQg== Content-Language: en-gb X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - server.nextmovesoftware.com X-AntiAbuse: Original Domain - gcc.gnu.org X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - nextmovesoftware.com X-Get-Message-Sender-Via: server.nextmovesoftware.com: authenticated_id: roger@nextmovesoftware.com X-Authenticated-Sender: server.nextmovesoftware.com: roger@nextmovesoftware.com X-Source: X-Source-Args: X-Source-Dir: X-Spam-Status: No, score=-12.3 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org Sender: "Gcc-patches" This stand-alone patch avoids (-Os) regressions from a fix for PR 70321. The simple test case below has the unfortunate property that on x86_64 it is larger when compiled with -Os than when compiled with -O2. int foo(char x) { return (x & 123) != 0; } The issue is x86's complex instruction encoding, where andb $XX,%dil requires more bytes than andl $XX,%edi. This patch provides a peephole2 to convert *and_qi_2_maybe_si into *andsi_2 for the problematic cases. This patch has been tested on x86_64-pc-linux-gnu with make bootstrap and make -k check with no new failures. Ok for mainline? 2022-04-12 Roger Sayle gcc/ChangeLog * config/i386/i386.md (peephole2): Transform *and_qi_maybe_si into *andsi_2 with -Os when the instruction encoding is shorter. gcc/testsuite/ChangeLog * gcc.target/i386/and-1.c: New test case. Thanks in advance, Roger diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index c74edd1..3522785 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -10140,6 +10140,37 @@ [(set_attr "type" "alu") (set_attr "mode" "")]) +;; On TARGET_64BIT, andb $XX,%dil is larger than andl $XX,%edi so +;; convert *and_qi_2_maybe_si into *andsi_2 when optimizing for size. + +(define_peephole2 + [(parallel + [(set (match_operand 0 "flags_reg_operand") + (match_operator 1 "compare_operator" + [(and:QI (match_operand:QI 2 "register_operand") + (match_operand:QI 3 "immediate_operand")) + (const_int 0)])) + (set (match_dup 2) + (and:QI (match_dup 2) (match_dup 3)))])] + "TARGET_64BIT + && !TARGET_PARTIAL_REG_STALL + && optimize_insn_for_size_p () + && ix86_match_ccmode (insn, CCNOmode) + && (INTVAL (operands[3]) & 0x80) == 0 + /* NON_Q_REG_P (operands[2]) : %sil, %dil, %bpl, %spl. */ + && LEGACY_INT_REG_P (operands[2]) && !QI_REGNO_P (REGNO (operands[2])) + && peep2_reg_dead_p (1, operands[2])" + [(parallel + [(set (match_dup 0) + (match_op_dup 1 [(and:SI (match_dup 2) (match_dup 3)) + (const_int 0)])) + (set (match_dup 2) + (and:SI (match_dup 2) (match_dup 3)))])] +{ + operands[2] = gen_rtx_REG (SImode, REGNO (operands[2])); + operands[3] = gen_int_mode (INTVAL (operands[3]) & 0xff, SImode); +}) + (define_expand "andqi_ext_1" [(parallel [(set (zero_extract:HI (match_operand:HI 0 "register_operand") diff --git a/gcc/testsuite/gcc.target/i386/and-1.c b/gcc/testsuite/gcc.target/i386/and-1.c new file mode 100644 index 0000000..11890d8 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/and-1.c @@ -0,0 +1,9 @@ +/* { dg-do compile { target { ! ia32 } } } */ +/* { dg-options "-Os" } */ + +int foo(char x) +{ + return (x & 123) != 0; +} + +/* { dg-final { scan-assembler-not "%dil" } } */