From patchwork Mon Apr 11 23:59:41 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre Oliva X-Patchwork-Id: 52802 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id C4E00385B22E for ; Tue, 12 Apr 2022 00:00:24 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org C4E00385B22E DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1649721624; bh=RgP1E+CeZrMpwMM1LW4dtzjha0E9gsu2IbGmpliDVTE=; h=To:Subject:Date:List-Id:List-Unsubscribe:List-Archive:List-Post: List-Help:List-Subscribe:From:Reply-To:Cc:From; b=osHtGPkZOpQGt9WVmibVFx5VQqrBxM1rG399/bA/WxuOCUjvFPiKfGckL8Uq8s5GA c6CY8n8GqVd0PbPykaP4nVF/R9VNTNoktjq1zm91qzV3Ki16NTfeMdL+IwM1lXhnyR k2nSslu6cantu3f/Nxl2/p+BmUjTolDKF+cnoUeA= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from rock.gnat.com (rock.gnat.com [205.232.38.15]) by sourceware.org (Postfix) with ESMTPS id 71C023858C54 for ; Mon, 11 Apr 2022 23:59:49 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 71C023858C54 Received: from localhost (localhost.localdomain [127.0.0.1]) by filtered-rock.gnat.com (Postfix) with ESMTP id 3E99E116F67; Mon, 11 Apr 2022 19:59:49 -0400 (EDT) X-Virus-Scanned: Debian amavisd-new at gnat.com Received: from rock.gnat.com ([127.0.0.1]) by localhost (rock.gnat.com [127.0.0.1]) (amavisd-new, port 10024) with LMTP id G5p9HAKSGzSv; Mon, 11 Apr 2022 19:59:49 -0400 (EDT) Received: from free.home (tron.gnat.com [IPv6:2620:20:4000:0:46a8:42ff:fe0e:e294]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by rock.gnat.com (Postfix) with ESMTPS id 08C32116D17; Mon, 11 Apr 2022 19:59:48 -0400 (EDT) Received: from livre (livre.home [172.31.160.2]) by free.home (8.15.2/8.15.2) with ESMTPS id 23BNxfKj2074869 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 11 Apr 2022 20:59:41 -0300 To: gcc-patches@gcc.gnu.org Subject: [PATCH] ppc: testsuite: test for arch_pwr7 with -mvsx in fold-vec-insert-double Organization: Free thinker, does not speak for AdaCore Date: Mon, 11 Apr 2022 20:59:41 -0300 Message-ID: User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/25.2 (gnu/linux) MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 X-Spam-Status: No, score=-12.3 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, KAM_SHORT, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Alexandre Oliva via Gcc-patches From: Alexandre Oliva Reply-To: Alexandre Oliva Cc: Segher Boessenkool , David Edelsohn Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org Sender: "Gcc-patches" gcc.target/powerpc/fold-vec-insert-double.c is compiled with -mvsx, while the expected asm output depends on target has_arch_pwr7, which is tested for without -mvsx. In some of our configurations, that have altivec and vsx disabled by default, the former defines up to _ARCH_PWR7, while the latter defines only up to _ARCH_PWR4, i.e., we compile for power7, and test for non-power7. This patch, admittedly ugly, enables us to test for asm output according the actual compile target given the explicitly specified flag. I suppose it may be possible to turn this "magic" into a reusable proc that sets a named variable to the result of a wrapped scan test, but I'm not sure I'm up to the task, with the need to deal with additional scoping, so I'm hoping this can be acceptable as is. Tested with gcc-11 targeting ppc64-vx7r2. Ok to install? for gcc/testsuite/ChangeLog * gcc.target/powerpc/fold-vec-insert-double.c: Test for asm according to the arch selected by -mvsx. --- .../gcc.target/powerpc/fold-vec-insert-double.c | 48 ++++++++++++++++---- 1 file changed, 39 insertions(+), 9 deletions(-) diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-double.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-double.c index afd7f7e9924e8..b95f0b33d6c07 100644 --- a/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-double.c +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-double.c @@ -18,21 +18,51 @@ testd_cst (double d, vector double vd) { return vec_insert (d, vd, 1); } + +/* The expected asm output varies depending on target arch_has_pwr7, but the + -mvsx option used for the test may implicitly enable the macro that target + arch_has_pwr7 tests for, while target arch_has_pwr7 doesn't take the option, + so we may end up compiling for one target variant and testing for another. + The following dejagnu magic sets $macro_is_defined to 1 or 0 depending on + whether ARCH_PWR7_is_defined appears in the assembly output. */ +#ifdef _ARCH_PWR7 +int ARCH_PWR7_is_defined = 1; +/* { dg-final { set asm_pattern_to_search_for "ARCH_PWR7_is_defined" } } */ +#endif + +/* { dg-final { global macro_is_defined } } */ +/* { dg-final { set macro_is_defined -1 } } */ +/* { dg-final { rename pass macro-save-pass } } */ +/* { dg-final { rename fail macro-save-fail } } */ +/* { dg-final { proc pass { args } { global macro_is_defined; set macro_is_defined 1 } } } */ +/* { dg-final { proc fail { args } { global macro_is_defined; set macro_is_defined 0 } } } */ +/* { dg-final { scan-assembler "$asm_pattern_to_search_for" } } */ +/* { dg-final { rename pass macro-dropme-pass } } */ +/* { dg-final { rename macro-save-pass pass } } */ +/* { dg-final { rename fail macro-dropme-fail } } */ +/* { dg-final { rename macro-save-fail fail } } */ +/* { dg-final { if { $macro_is_defined < 0 } { fail "macro detection" } } } */ +/* { dg-final { if { $macro_is_defined < 0 } { return } } } */ + +/* { dg-final { set has_arch_pwr7 $macro_is_defined } } */ +/* This is the end of the magic. + We can now run tests conditionally on $has_arch_pwr7. */ + /* The number of xxpermdi instructions varies between P7,P8,P9, ensure at least one hit. */ /* { dg-final { scan-assembler {\mxxpermdi\M} } } */ /* { dg-final { scan-assembler-times {\mrldic\M|\mrlwinm\M} 1 } } */ -/* { dg-final { scan-assembler-times {\mstxvd2x\M|\mstxv\M|\mstvx\M} 1 { target { ! has_arch_pwr7 } } } } */ -/* { dg-final { scan-assembler-times {\mstfdx\M|\mstfd\M} 1 { target { ! has_arch_pwr7 } } } } */ -/* { dg-final { scan-assembler-times {\mlxvd2x\M|\mlxv\M|\mlvx\M} 1 { target { ! has_arch_pwr7 } } } } */ +/* { dg-final { if { ! $has_arch_pwr7 } { scan-assembler-times {\mstxvd2x\M|\mstxv\M|\mstvx\M} 1 } } } */ +/* { dg-final { if { ! $has_arch_pwr7 } { scan-assembler-times {\mstfdx\M|\mstfd\M} 1 } } } */ +/* { dg-final { if { ! $has_arch_pwr7 } { scan-assembler-times {\mlxvd2x\M|\mlxv\M|\mlvx\M} 1 } } } */ -/* { dg-final { scan-assembler-times {\mstxvd2x\M|\mstxv\M|\mstvx\M} 0 { target { has_arch_pwr7 && lp64 } } } } */ -/* { dg-final { scan-assembler-times {\mstfdx\M|\mstfd\M} 0 { target { has_arch_pwr7 && lp64 } } } } */ +/* { dg-final { if { $has_arch_pwr7 } { scan-assembler-times {\mstxvd2x\M|\mstxv\M|\mstvx\M} 0 { target { lp64 } } } } } */ +/* { dg-final { if { $has_arch_pwr7 } { scan-assembler-times {\mstfdx\M|\mstfd\M} 0 { target { lp64 } } } } } */ -/* { dg-final { scan-assembler-times {\mlxvd2x\M|\mlxv\M|\mlvx\M} 0 { target { has_arch_pwr7 && lp64 } } } } */ -/* { dg-final { scan-assembler-times {\mlxvd2x\M|\mlxv\M|\mlvx\M} 0 { target { has_arch_pwr7 && ilp32 } } } } */ -/* { dg-final { scan-assembler-times {\mstxvd2x\M|\mstxv\M|\mstvx\M} 0 { target { has_arch_pwr7 && ilp32 } } } } */ -/* { dg-final { scan-assembler-times {\mstfdx\M|\mstfd\M} 0 { target { has_arch_pwr7 && ilp32 } } } } */ +/* { dg-final { if { $has_arch_pwr7 } { scan-assembler-times {\mlxvd2x\M|\mlxv\M|\mlvx\M} 0 { target { lp64 } } } } } */ +/* { dg-final { if { $has_arch_pwr7 } { scan-assembler-times {\mlxvd2x\M|\mlxv\M|\mlvx\M} 0 { target { ilp32 } } } } } */ +/* { dg-final { if { $has_arch_pwr7 } { scan-assembler-times {\mstxvd2x\M|\mstxv\M|\mstvx\M} 0 { target { ilp32 } } } } } */ +/* { dg-final { if { $has_arch_pwr7 } { scan-assembler-times {\mstfdx\M|\mstfd\M} 0 { target { ilp32 } } } } } */