From patchwork Fri Feb 11 23:59:04 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Iain Sandoe X-Patchwork-Id: 51065 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id D42563858030 for ; Fri, 11 Feb 2022 23:59:49 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org D42563858030 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1644623989; bh=w8RV0OG/CEr0xlUAXkXlyAGYM4M3zWkOPc17j3ZbFUE=; h=To:Subject:Date:List-Id:List-Unsubscribe:List-Archive:List-Post: List-Help:List-Subscribe:From:Reply-To:Cc:From; b=Uw35kTdN4x+hNxMdT89LSfZb/1TNOMwGra38N2fTTHD05BJTE6n6fzRfeN57bRlbL lIkM5Uw88F0Xqm2Zz0MUs8+dj3CWrHV/vNRGaM/mCmaMQJYtnkmGpnOpPuo+TooeFk 9sLDvcgImtOI2CxyxJMptOUasnn/3RWL2/MlVi9I= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mail-wm1-x336.google.com (mail-wm1-x336.google.com [IPv6:2a00:1450:4864:20::336]) by sourceware.org (Postfix) with ESMTPS id 915EF385841B for ; Fri, 11 Feb 2022 23:59:19 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 915EF385841B Received: by mail-wm1-x336.google.com with SMTP id i19so4945352wmq.5 for ; Fri, 11 Feb 2022 15:59:19 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:reply-to :mime-version:content-transfer-encoding; bh=w8RV0OG/CEr0xlUAXkXlyAGYM4M3zWkOPc17j3ZbFUE=; b=eB790Xk9gHojbhrHqM++iCKZHKMuvkqfnOUQ9FykTIn87x2rq8N73Yma6BZXKH5Xqx KtrUrK56EAVjcGMBB3GYLbX3m46yveJtpsRt4p5duk73V6oWrkpNLJ9l8n9ckhBZOCrF WuHFy6OorTqNZBYmIIx/hCnozuVg8AicD68YN+zJfWylrTSmN8Ls3E4vfenGPZK4KKlR T9Iyz5BXSesu+TZBxRoR7sn9I8bF4ZwZ83B0ohrPV6kF9cLawKAazRnyPTNa29PPEoCP l6KWK7BaWabqEoSmmPj9Kq3sTqtggofe0QEtBJjumSROeVG60qCBY3+TZjyyEDN4quLw Vg3Q== X-Gm-Message-State: AOAM530KqsLN/wBPTnWvahm1IL5v1QJdK/WeWE2hrGfL8xcwErwaKfzI xagpMjT6vReZs90y0nGXI86YV58AviQ= X-Google-Smtp-Source: ABdhPJxtoH7sZwi85vWyg5Vjhrlh7/oHJ1AQIOeBYfLWPrZJC+09KDGMOHa9T4PMJoNJcAJnl5u8RA== X-Received: by 2002:a7b:c856:: with SMTP id c22mr2196092wml.52.1644623958380; Fri, 11 Feb 2022 15:59:18 -0800 (PST) Received: from localhost.localdomain (host81-138-1-83.in-addr.btopenworld.com. [81.138.1.83]) by smtp.gmail.com with ESMTPSA id bk5sm10700773wrb.10.2022.02.11.15.59.17 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Fri, 11 Feb 2022 15:59:17 -0800 (PST) X-Google-Original-From: Iain Sandoe To: gcc-patches@gcc.gnu.org Subject: [pushed] LRA, rs6000, Darwin: Amend lo_sum use for forced constants [PR104117]. Date: Fri, 11 Feb 2022 23:59:04 +0000 Message-Id: <20220211235904.25765-1-iain@sandoe.co.uk> X-Mailer: git-send-email 2.24.3 (Apple Git-128) MIME-Version: 1.0 X-Spam-Status: No, score=-7.7 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, KAM_STOCKGEN, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Iain Sandoe via Gcc-patches From: Iain Sandoe Reply-To: iain@sandoe.co.uk Cc: Iain Sandoe , segher@kernel.crashing.org Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org Sender: "Gcc-patches" Two issues resulted in this PR, which manifests when we force a constant into memory in LRA (in PIC code on Darwin). The presence of such forced constants is quite dependent on other RTL optimisations, and it is easy for the issue to become latent for a specific case. First, in the Darwin-specific rs6000 backend code, we were not being careful enough in rejecting invalid symbolic addresses. Specifically, when generating PIC code, we require a SYMBOL_REF to be wrapped in an UNSPEC_MACHOPIC_OFFSET. Second, LRA was attempting to load a register using an invalid lo_sum address. The LRA changes are approved in the PR by Vladimir, and the RS6000 changes are Darwin-specific (although, of course, any observations are welcome). Tested on several lo_sum targets and x86_64 all languages except as noted: powerpc64-linux (m32/m64) -D powerpc64le-linux -D powerpc64-aix -Ada -Go -D aarch64-linux -Ada -D x86_64-linux all langs -D powerpc-darwin9 (master and 11.2) -D -Go. pushed to master, thanks, Iain Signed-off-by: Iain Sandoe Co-authored-by: Vladimir Makarov PR target/104117 gcc/ChangeLog: * config/rs6000/rs6000.cc (darwin_rs6000_legitimate_lo_sum_const_p): Check for UNSPEC_MACHOPIC_OFFSET wrappers on symbolic addresses when emitting PIC code. (legitimate_lo_sum_address_p): Likewise. * lra-constraints.cc (process_address_1): Do not attempt to emit a reg load from an invalid lo_sum address. Signed-off-by: Iain Sandoe --- gcc/config/rs6000/rs6000.cc | 38 +++++++++++++++++++++++++++++++++++-- gcc/lra-constraints.cc | 17 ++--------------- 2 files changed, 38 insertions(+), 17 deletions(-) diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc index eaba9a2d698..bc3ef0721a4 100644 --- a/gcc/config/rs6000/rs6000.cc +++ b/gcc/config/rs6000/rs6000.cc @@ -8317,8 +8317,14 @@ darwin_rs6000_legitimate_lo_sum_const_p (rtx x, machine_mode mode) if (GET_CODE (x) == CONST) x = XEXP (x, 0); + /* If we are building PIC code, then any symbol must be wrapped in an + UNSPEC_MACHOPIC_OFFSET so that it will get the picbase subtracted. */ + bool machopic_offs_p = false; if (GET_CODE (x) == UNSPEC && XINT (x, 1) == UNSPEC_MACHOPIC_OFFSET) - x = XVECEXP (x, 0, 0); + { + x = XVECEXP (x, 0, 0); + machopic_offs_p = true; + } rtx sym = NULL_RTX; unsigned HOST_WIDE_INT offset = 0; @@ -8349,6 +8355,9 @@ darwin_rs6000_legitimate_lo_sum_const_p (rtx x, machine_mode mode) if (sym) { tree decl = SYMBOL_REF_DECL (sym); + /* As noted above, PIC code cannot use a bare SYMBOL_REF. */ + if (TARGET_MACHO && flag_pic && !machopic_offs_p) + return false; #if TARGET_MACHO if (MACHO_SYMBOL_INDIRECTION_P (sym)) /* The decl in an indirection symbol is the original one, which might @@ -8936,7 +8945,7 @@ legitimate_lo_sum_address_p (machine_mode mode, rtx x, int strict) return false; x = XEXP (x, 1); - if (TARGET_ELF || TARGET_MACHO) + if (TARGET_ELF) { bool large_toc_ok; @@ -8962,7 +8971,32 @@ legitimate_lo_sum_address_p (machine_mode mode, rtx x, int strict) return CONSTANT_P (x) || large_toc_ok; } + else if (TARGET_MACHO) + { + if (GET_MODE_NUNITS (mode) != 1) + return false; + if (GET_MODE_SIZE (mode) > UNITS_PER_WORD + && !(/* see above */ + TARGET_HARD_FLOAT && (mode == DFmode || mode == DDmode))) + return false; +#if TARGET_MACHO + if (MACHO_DYNAMIC_NO_PIC_P || !flag_pic) + return CONSTANT_P (x); +#endif + /* Macho-O PIC code from here. */ + if (GET_CODE (x) == CONST) + x = XEXP (x, 0); + + /* SYMBOL_REFs need to be wrapped in an UNSPEC_MACHOPIC_OFFSET. */ + if (SYMBOL_REF_P (x)) + return false; + /* So this is OK if the wrapped object is const. */ + if (GET_CODE (x) == UNSPEC + && XINT (x, 1) == UNSPEC_MACHOPIC_OFFSET) + return CONSTANT_P (XVECEXP (x, 0, 0)); + return CONSTANT_P (x); + } return false; } diff --git a/gcc/lra-constraints.cc b/gcc/lra-constraints.cc index fdff9e0720a..c700c3f4578 100644 --- a/gcc/lra-constraints.cc +++ b/gcc/lra-constraints.cc @@ -3625,21 +3625,8 @@ process_address_1 (int nop, bool check_only_p, *ad.inner = gen_rtx_LO_SUM (Pmode, new_reg, addr); if (!valid_address_p (op, &ad, cn)) { - /* Try to put lo_sum into register. */ - insn = emit_insn (gen_rtx_SET - (new_reg, - gen_rtx_LO_SUM (Pmode, new_reg, addr))); - code = recog_memoized (insn); - if (code >= 0) - { - *ad.inner = new_reg; - if (!valid_address_p (op, &ad, cn)) - { - *ad.inner = addr; - code = -1; - } - } - + *ad.inner = addr; /* Punt. */ + code = -1; } } if (code < 0)