From patchwork Wed Feb 9 19:23:55 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Uros Bizjak X-Patchwork-Id: 50973 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 9E5943858406 for ; Wed, 9 Feb 2022 19:24:50 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 9E5943858406 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1644434690; bh=6qNjihPedl3MWx8cXA6wmX7nPpz+oXNActRi2AhlUS0=; h=Date:Subject:To:List-Id:List-Unsubscribe:List-Archive:List-Post: List-Help:List-Subscribe:From:Reply-To:From; b=HbTQVi9zx+PfSnM/DWm7c3nBADP+2gWpAIEYuS7NCxBtWhMh6i7U2u7ngH++F4Lqx JgycMUeuj7qb7LonHYIhh7qc78oG1axME3T9cKBhWw8dOhuQd5HSIEef5DqO6hsEk3 A/F0C4uKPiBaCWR2Jfu/YBPFMBdZc0TbIjQvqov0= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mail-qv1-xf32.google.com (mail-qv1-xf32.google.com [IPv6:2607:f8b0:4864:20::f32]) by sourceware.org (Postfix) with ESMTPS id 6F925385841B for ; Wed, 9 Feb 2022 19:24:07 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 6F925385841B Received: by mail-qv1-xf32.google.com with SMTP id p7so2631091qvk.11 for ; Wed, 09 Feb 2022 11:24:07 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:from:date:message-id:subject:to; bh=6qNjihPedl3MWx8cXA6wmX7nPpz+oXNActRi2AhlUS0=; b=DWEonkNTMvKV92mYkpjgpitXGpU3SxcFAndsd0Tv73I4ZYUYrr+6wNIP92s6ovygKQ OU8f7DZ77RdQ6Gt8dOgeo2ulXJQX03qkEQPhcVxq3pkDrY5/nLF+DSVG+VgWUFLQCIUh QstbQs3pXxJHXwjy9qIEPHZ7vfh+K9Jv2C9rwcurQBdmS6Srb7F8oBYZaG5oWJ5Jrfci eeIt5P/WHxTpNHS4Qljck/jtb8kwT2OAThwwqS1xtV2Vd7upEtgnbaZ1HFP6Hc3Jaruw DcforoasNTyLc/NMZNcdWo6eMQWnActly6punkYUaSZ4DTQevLxPmJSfgIGrLYlU32xY Rgsw== X-Gm-Message-State: AOAM532S0j05lGHneWlO6crNX1vnmQ2wjaWCc4Gy/dpYVOrkGEZPXovu 3USKAHGCyNFVWieYB2eOwZoKw50StpP79PKBaDZJsH+D2oNolw== X-Google-Smtp-Source: ABdhPJzZx4ER2Ehds768jddHXO9e43WZuPH2EQ16rz1L+RoeHpTlLIWIeaS2FyEQViNJ/t/tKz51hKf8PxVIdSZAfw4= X-Received: by 2002:ad4:5e8a:: with SMTP id jl10mr2633354qvb.125.1644434646746; Wed, 09 Feb 2022 11:24:06 -0800 (PST) MIME-Version: 1.0 Date: Wed, 9 Feb 2022 20:23:55 +0100 Message-ID: Subject: [PATCH] i386: -mno-xsave should disable all relevant ISA flags [PR104462] To: "gcc-patches@gcc.gnu.org" X-Spam-Status: No, score=-8.0 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, KAM_SHORT, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Uros Bizjak via Gcc-patches From: Uros Bizjak Reply-To: Uros Bizjak Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org Sender: "Gcc-patches" 2022-02-09 Uroš Bizjak gcc/ChangeLog: PR target/104462 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_XSAVE_UNSET): Also include OPTION_MASK_ISA2_AVX2_UNSET. gcc/testsuite/ChangeLog: PR target/104462 * gcc.target/i386/pr104462.c: New test. Bootstrapped and regression tested on x86_64-linux-gnu {,-m32}. Pushed to master. Uros. diff --git a/gcc/common/config/i386/i386-common.cc b/gcc/common/config/i386/i386-common.cc index 607e9f20e85..449df6351c9 100644 --- a/gcc/common/config/i386/i386-common.cc +++ b/gcc/common/config/i386/i386-common.cc @@ -206,7 +206,8 @@ along with GCC; see the file COPYING3. If not see (OPTION_MASK_ISA_XSAVE | OPTION_MASK_ISA_XSAVEOPT_UNSET \ | OPTION_MASK_ISA_XSAVES_UNSET | OPTION_MASK_ISA_XSAVEC_UNSET \ | OPTION_MASK_ISA_AVX_UNSET) -#define OPTION_MASK_ISA2_XSAVE_UNSET OPTION_MASK_ISA2_AMX_TILE_UNSET +#define OPTION_MASK_ISA2_XSAVE_UNSET \ + (OPTION_MASK_ISA2_AVX2_UNSET | OPTION_MASK_ISA2_AMX_TILE_UNSET) #define OPTION_MASK_ISA_XSAVEOPT_UNSET OPTION_MASK_ISA_XSAVEOPT #define OPTION_MASK_ISA_AVX2_UNSET \ (OPTION_MASK_ISA_AVX2 | OPTION_MASK_ISA_AVX512F_UNSET) diff --git a/gcc/testsuite/gcc.target/i386/pr104462.c b/gcc/testsuite/gcc.target/i386/pr104462.c new file mode 100644 index 00000000000..7a5ee64f431 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr104462.c @@ -0,0 +1,13 @@ +/* PR target/104462 */ +/* { dg-do compile } */ +/* { dg-options "-mavx512fp16 -mno-xsave" } */ + +typedef _Float16 __attribute__((__vector_size__ (8))) F; + +F f; + +void +foo (void) +{ + f *= -f; +}