From patchwork Mon Feb 7 22:20:24 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Li, Pan2 via Gcc-patches" X-Patchwork-Id: 50891 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 910D23858421 for ; Mon, 7 Feb 2022 22:20:59 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 910D23858421 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1644272459; bh=jZbPfr6XFVnQlnGuAzJr1BhRhcpMEfaunaWB1jgDPG4=; h=Date:To:Subject:List-Id:List-Unsubscribe:List-Archive:List-Post: List-Help:List-Subscribe:From:Reply-To:Cc:From; b=Bm0DJQSsl6eiTg7AjnNCrguD/0hdbmVLqqc7F1XTxdEB47cmnA78odxOhUWJ02Y6X +/dSn1NSde6+QldnTmwIgy2gcoUW98c1lQA63bwfB+rmyDpfBOqEyEPHm8z56ppMiP f6g7nk3z7i2wWowXZvg2KQME/ofvPP7ezv6ej2Rk= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mx0a-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) by sourceware.org (Postfix) with ESMTPS id 3543E3858C83 for ; Mon, 7 Feb 2022 22:20:30 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 3543E3858C83 Received: from pps.filterd (m0098413.ppops.net [127.0.0.1]) by mx0b-001b2d01.pphosted.com (8.16.1.2/8.16.1.2) with SMTP id 217LjaWC032460; Mon, 7 Feb 2022 22:20:28 GMT Received: from pps.reinject (localhost [127.0.0.1]) by mx0b-001b2d01.pphosted.com with ESMTP id 3e22whmd2n-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 07 Feb 2022 22:20:28 +0000 Received: from m0098413.ppops.net (m0098413.ppops.net [127.0.0.1]) by pps.reinject (8.16.0.43/8.16.0.43) with SMTP id 217M4KAP014110; Mon, 7 Feb 2022 22:20:28 GMT Received: from ppma05wdc.us.ibm.com (1b.90.2fa9.ip4.static.sl-reverse.com [169.47.144.27]) by mx0b-001b2d01.pphosted.com with ESMTP id 3e22whmd2f-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 07 Feb 2022 22:20:28 +0000 Received: from pps.filterd (ppma05wdc.us.ibm.com [127.0.0.1]) by ppma05wdc.us.ibm.com (8.16.1.2/8.16.1.2) with SMTP id 217M3jE0021236; Mon, 7 Feb 2022 22:20:27 GMT Received: from b01cxnp22033.gho.pok.ibm.com (b01cxnp22033.gho.pok.ibm.com [9.57.198.23]) by ppma05wdc.us.ibm.com with ESMTP id 3e1gvag0bf-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 07 Feb 2022 22:20:27 +0000 Received: from b01ledav002.gho.pok.ibm.com (b01ledav002.gho.pok.ibm.com [9.57.199.107]) by b01cxnp22033.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 217MKQL234406730 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Mon, 7 Feb 2022 22:20:26 GMT Received: from b01ledav002.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 6D91512405B; Mon, 7 Feb 2022 22:20:26 +0000 (GMT) Received: from b01ledav002.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id C2B36124054; Mon, 7 Feb 2022 22:20:25 +0000 (GMT) Received: from [9.211.95.26] (unknown [9.211.95.26]) by b01ledav002.gho.pok.ibm.com (Postfix) with ESMTP; Mon, 7 Feb 2022 22:20:25 +0000 (GMT) Message-ID: Date: Mon, 7 Feb 2022 16:20:24 -0600 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.15; rv:91.0) Gecko/20100101 Thunderbird/91.5.1 To: GCC Patches Subject: [PATCH] rs6000: Add support for vmsumcud and vec_msumc X-TM-AS-GCONF: 00 X-Proofpoint-GUID: H7uCTMBZjmWe53Ed5eJ8DjszBcj0USYR X-Proofpoint-ORIG-GUID: YlWOAkmyRet-IKJmoGBQR99-k9FY9AMM X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.816,Hydra:6.0.425,FMLib:17.11.62.513 definitions=2022-02-07_07,2022-02-07_02,2021-12-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 impostorscore=0 mlxlogscore=999 clxscore=1015 priorityscore=1501 bulkscore=0 spamscore=0 adultscore=0 mlxscore=0 phishscore=0 suspectscore=0 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2201110000 definitions=main-2202070124 X-Spam-Status: No, score=-12.6 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, RCVD_IN_MSPIKE_H5, RCVD_IN_MSPIKE_WL, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Bill Schmidt via Gcc-patches From: "Li, Pan2 via Gcc-patches" Reply-To: wschmidt@linux.ibm.com Cc: David Edelsohn , Segher Boessenkool Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org Sender: "Gcc-patches" Hi! I observed recently that a couple of Power10 instructions and built-in functions were somehow not implemented. This patch adds one of them (vmsumcud). Although this isn't normally stage-4 material, this is really simple and carries no discernible risk, so I hope it can be considered. Bootstrapped and tested on powerpc64le-linux-gnu with no regressions. Is this okay for trunk? Thanks! Bill 2022-02-07 Bill Schmidt gcc/ * config/rs6000/rs6000-builtins.def (VMSUMCUD): New. * config/rs6000/rs6000-overload.def (VEC_MSUMC): New. * config/rs6000/vsx.md (UNSPEC_VMSUMCUD): New constant. (vmsumcud): New define_insn. gcc/testsuite/ * gcc.target/powerpc/vec-msumc.c: New test. --- gcc/config/rs6000/rs6000-builtins.def | 3 ++ gcc/config/rs6000/rs6000-overload.def | 4 ++ gcc/config/rs6000/vsx.md | 13 +++++++ gcc/testsuite/gcc.target/powerpc/vec-msumc.c | 39 ++++++++++++++++++++ 4 files changed, 59 insertions(+) create mode 100644 gcc/testsuite/gcc.target/powerpc/vec-msumc.c diff --git a/gcc/config/rs6000/rs6000-builtins.def b/gcc/config/rs6000/rs6000-builtins.def index d0ea54d77e4..846c0bafd45 100644 --- a/gcc/config/rs6000/rs6000-builtins.def +++ b/gcc/config/rs6000/rs6000-builtins.def @@ -3497,6 +3497,9 @@ const signed int __builtin_altivec_vstrihr_p (vss); VSTRIHR_P vstrir_p_v8hi {} + const vuq __builtin_vsx_vmsumcud (vull, vull, vuq); + VMSUMCUD vmsumcud {} + const signed int __builtin_vsx_xvtlsbb_all_ones (vsc); XVTLSBB_ONES xvtlsbbo {} diff --git a/gcc/config/rs6000/rs6000-overload.def b/gcc/config/rs6000/rs6000-overload.def index 5e38d597722..44e2945aaa0 100644 --- a/gcc/config/rs6000/rs6000-overload.def +++ b/gcc/config/rs6000/rs6000-overload.def @@ -2456,6 +2456,10 @@ vuq __builtin_vec_msum (vull, vull, vuq); VMSUMUDM VMSUMUDM_U +[VEC_MSUMC, vec_msumc, __builtin_vec_msumc] + vuq __builtin_vec_msumc (vull, vull, vuq); + VMSUMCUD + [VEC_MSUMS, vec_msums, __builtin_vec_msums] vui __builtin_vec_msums (vus, vus, vui); VMSUMUHS diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md index 88053f11e29..e4904102526 100644 --- a/gcc/config/rs6000/vsx.md +++ b/gcc/config/rs6000/vsx.md @@ -372,6 +372,7 @@ (define_c_enum "unspec" UNSPEC_REPLACE_UN UNSPEC_VDIVES UNSPEC_VDIVEU + UNSPEC_VMSUMCUD UNSPEC_XXEVAL UNSPEC_XXSPLTIW UNSPEC_XXSPLTIDP @@ -6615,3 +6616,15 @@ (define_split emit_move_insn (operands[0], tmp4); DONE; }) + +;; vmsumcud +(define_insn "vmsumcud" +[(set (match_operand:V1TI 0 "register_operand" "+v") + (unspec:V1TI [(match_operand:V2DI 1 "register_operand" "v") + (match_operand:V2DI 2 "register_operand" "v") + (match_operand:V1TI 3 "register_operand" "v")] + UNSPEC_VMSUMCUD))] + "TARGET_POWER10" + "vmsumcud %0,%1,%2,%3" + [(set_attr "type" "vecsimple")] +) diff --git a/gcc/testsuite/gcc.target/powerpc/vec-msumc.c b/gcc/testsuite/gcc.target/powerpc/vec-msumc.c new file mode 100644 index 00000000000..524a2225c6c --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/vec-msumc.c @@ -0,0 +1,39 @@ +/* { dg-do run { target { power10_hw } } } */ +/* { dg-require-effective-target power10_ok } */ +/* { dg-options "-mdejagnu-cpu=power10 -O2" } */ +#include + +#define DEBUG 0 + +#if DEBUG +#include +#endif + +extern void abort (void); + +int +main () +{ + vector unsigned long long arg1, arg2; + vector unsigned __int128 arg3, result, expected; + unsigned __int128 c = (unsigned __int128) (-1); /* 2^128 - 1 */ + + arg1 = (vector unsigned long long) { 111ULL, 300ULL }; + arg2 = (vector unsigned long long) { 700ULL, 222ULL }; + arg3 = (vector unsigned __int128) { c }; + expected = (vector unsigned __int128) { 1 }; + + result = vec_msumc (arg1, arg2, arg3); + if (result[0] != expected[0]) + { +#if DEBUG + printf ("ERROR, expected %d, result %d\n", + (unsigned int) expected[0], + (unsigned int) result[0]); +#else + abort (); +#endif + } + + return 0; +}