From patchwork Thu Jan 13 16:25:29 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Uros Bizjak X-Patchwork-Id: 49993 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id EE0323951C3E for ; Thu, 13 Jan 2022 16:26:09 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org EE0323951C3E DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1642091170; bh=0t4zC/m3gLYJVFDM1CpLfilrToTeMoZTuzvkVZji+X4=; h=Date:Subject:To:List-Id:List-Unsubscribe:List-Archive:List-Post: List-Help:List-Subscribe:From:Reply-To:From; b=AP/JCChdm7cUStlYr8EOPTxskQjMAJrVKcqWWFenIUXSWugCj86Ut1vFuv1urC769 zFtqY9ZRJHGJ7FBK+jH8K9mt62JajaEmIBYTZ/i69cKifZwQfumBxq+4pWRW4q1yOb nORGCx5reHqR7FEe9oDXYzxCVJrfg7/rhsmv3DHI= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mail-qt1-x832.google.com (mail-qt1-x832.google.com [IPv6:2607:f8b0:4864:20::832]) by sourceware.org (Postfix) with ESMTPS id F0EFE3857C4F for ; Thu, 13 Jan 2022 16:25:40 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org F0EFE3857C4F Received: by mail-qt1-x832.google.com with SMTP id q14so7363113qtx.10 for ; Thu, 13 Jan 2022 08:25:40 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:from:date:message-id:subject:to; bh=0t4zC/m3gLYJVFDM1CpLfilrToTeMoZTuzvkVZji+X4=; b=ud0Qip3zhzF0ya40ZA8u1pcr2s9zsyXlSjY0bmZkw05jD86tiS//a4W4R9NQeQ7H6a 8ZYRdBqiiihOUvt8HOh3acz3nSoIBu/QdKq0yVO9BDrCkU5df6BYfCOoeMP5iJnrNRX1 pgLVJR1p3u2aV4j4pOD2+utyK0chcgMVWAkPCC9MBLRAJKGWqMu23oS2sxy8m6RWVYaN 1JJv+ceipyXilEopMI5Tgwtg2VL2cRMgAypyICyp0TzqY+mHmjP4gFaNM15VjFBhZUrg lqepHW/AGypsKMvTsn+ma0zN+G+rVzFaA8B+GxW9CCt4YEmEmk9UU7pJPN6ZGO71GWcQ FPuA== X-Gm-Message-State: AOAM532Po2CbBs/m7KTkrPh1DA9rkthwt1AET7doiZ3yR/iCAGKBlcHB qmfxHFoWyo0FttnBuPz3hSRxmyxGpZujnjsvppF00h8IQQ1heQ== X-Google-Smtp-Source: ABdhPJzKegxDIHNlUFGCTyfw+9tuY2fztR+4ZS+FBlZRSnAqMf7khpqkcngnUkTYWjLjqO9cAT7i4hFb75caCQL9i2A= X-Received: by 2002:ac8:5e4a:: with SMTP id i10mr4126318qtx.569.1642091140192; Thu, 13 Jan 2022 08:25:40 -0800 (PST) MIME-Version: 1.0 Date: Thu, 13 Jan 2022 17:25:29 +0100 Message-ID: Subject: [PATCH] i386: Add 16-bit vector modes to xop_pcmov [PR104003] To: "gcc-patches@gcc.gnu.org" X-Spam-Status: No, score=-8.1 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Uros Bizjak via Gcc-patches From: Uros Bizjak Reply-To: Uros Bizjak Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org Sender: "Gcc-patches" 2022-01-13 Uroš Bizjak gcc/ChangeLog: PR target/104003 * config/i386/mmx.md (*xop_pcmov_): Use VI_16_32 mode iterator. gcc/testsuite/ChangeLog: PR target/104003 * g++.target/i386/pr103861-1-sse4.C: New test. * g++.target/i386/pr103861-1-xop.C: Ditto. Bootstrapped and regression tested on x86_64-linux-gnu {,-m32}. Pushed to master. Uros. diff --git a/gcc/config/i386/mmx.md b/gcc/config/i386/mmx.md index 8a8142c8a09..295a132bc46 100644 --- a/gcc/config/i386/mmx.md +++ b/gcc/config/i386/mmx.md @@ -2704,11 +2704,11 @@ [(set_attr "type" "sse4arg")]) (define_insn "*xop_pcmov_" - [(set (match_operand:VI_32 0 "register_operand" "=x") - (if_then_else:VI_32 - (match_operand:VI_32 3 "register_operand" "x") - (match_operand:VI_32 1 "register_operand" "x") - (match_operand:VI_32 2 "register_operand" "x")))] + [(set (match_operand:VI_16_32 0 "register_operand" "=x") + (if_then_else:VI_16_32 + (match_operand:VI_16_32 3 "register_operand" "x") + (match_operand:VI_16_32 1 "register_operand" "x") + (match_operand:VI_16_32 2 "register_operand" "x")))] "TARGET_XOP" "vpcmov\t{%3, %2, %1, %0|%0, %1, %2, %3}" [(set_attr "type" "sse4arg")]) diff --git a/gcc/testsuite/g++.target/i386/pr103861-1-sse4.C b/gcc/testsuite/g++.target/i386/pr103861-1-sse4.C new file mode 100644 index 00000000000..a07b3ad111d --- /dev/null +++ b/gcc/testsuite/g++.target/i386/pr103861-1-sse4.C @@ -0,0 +1,5 @@ +/* PR target/103861 */ +/* { dg-do compile } */ +/* { dg-options "-O2 -msse4" } */ + +#include "pr103861-1.C" diff --git a/gcc/testsuite/g++.target/i386/pr103861-1-xop.C b/gcc/testsuite/g++.target/i386/pr103861-1-xop.C new file mode 100644 index 00000000000..d65542dc57f --- /dev/null +++ b/gcc/testsuite/g++.target/i386/pr103861-1-xop.C @@ -0,0 +1,5 @@ +/* PR target/103861 */ +/* { dg-do compile } */ +/* { dg-options "-O2 -mxop" } */ + +#include "pr103861-1.C"