From patchwork Wed Jan 12 14:57:40 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tom de Vries X-Patchwork-Id: 49921 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id CABF43940CE3 for ; Wed, 12 Jan 2022 14:59:19 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org CABF43940CE3 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1641999559; bh=pom62Y9qiOBL4NL/r32vL7RJXrNQsw9PQi8ndxJCFdI=; h=Date:To:Subject:List-Id:List-Unsubscribe:List-Archive:List-Post: List-Help:List-Subscribe:From:Reply-To:From; b=HF0zv+Je0MOaAlzSBW8QyQKOwNcrV1bRn02TMEYAuEO9NhD2puTei1naEdBm+dzgx pzdiRRNiICflGfezBLNW8TrND316dZJdKBtnNB2uoEmmHne2E8i/EP7ipJ/UghqdT3 bRuL4DcEh0FKN69UnDdXWHGCPKC4a3yPW9vuvGV8= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from smtp-out2.suse.de (smtp-out2.suse.de [195.135.220.29]) by sourceware.org (Postfix) with ESMTPS id 981F0394083C for ; Wed, 12 Jan 2022 14:57:42 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 981F0394083C Received: from imap2.suse-dmz.suse.de (imap2.suse-dmz.suse.de [192.168.254.74]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-521) server-digest SHA512) (No client certificate requested) by smtp-out2.suse.de (Postfix) with ESMTPS id C7ACE1F3C9 for ; Wed, 12 Jan 2022 14:57:41 +0000 (UTC) Received: from imap2.suse-dmz.suse.de (imap2.suse-dmz.suse.de [192.168.254.74]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-521) server-digest SHA512) (No client certificate requested) by imap2.suse-dmz.suse.de (Postfix) with ESMTPS id B496113B70 for ; Wed, 12 Jan 2022 14:57:41 +0000 (UTC) Received: from dovecot-director2.suse.de ([192.168.254.65]) by imap2.suse-dmz.suse.de with ESMTPSA id HIXyKmXs3mGUEAAAMHmgww (envelope-from ) for ; Wed, 12 Jan 2022 14:57:41 +0000 Date: Wed, 12 Jan 2022 15:57:40 +0100 To: gcc-patches@gcc.gnu.org Subject: [committed][nvptx] Add gcc.target/nvptx/atomic-exchange-*.c test-cases Message-ID: <20220112145738.GA5206@delia> MIME-Version: 1.0 Content-Disposition: inline User-Agent: Mutt/1.10.1 (2018-07-13) X-Spam-Status: No, score=-12.6 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Tom de Vries via Gcc-patches From: Tom de Vries Reply-To: Tom de Vries Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org Sender: "Gcc-patches" Hi, Add a few test-cases that test expansion of __atomic_exchange. Tested on nvptx. Committed to trunk. Thanks, - Tom [nvptx] Add gcc.target/nvptx/atomic-exchange-*.c test-cases gcc/testsuite/ChangeLog: 2022-01-12 Tom de Vries * gcc.target/nvptx/atomic-exchange-1.c: New test. * gcc.target/nvptx/atomic-exchange-2.c: New test. * gcc.target/nvptx/atomic-exchange-3.c: New test. * gcc.target/nvptx/atomic-exchange-4.c: New test. --- gcc/testsuite/gcc.target/nvptx/atomic-exchange-1.c | 39 ++++++++++++ gcc/testsuite/gcc.target/nvptx/atomic-exchange-2.c | 33 ++++++++++ gcc/testsuite/gcc.target/nvptx/atomic-exchange-3.c | 33 ++++++++++ gcc/testsuite/gcc.target/nvptx/atomic-exchange-4.c | 74 ++++++++++++++++++++++ 4 files changed, 179 insertions(+) diff --git a/gcc/testsuite/gcc.target/nvptx/atomic-exchange-1.c b/gcc/testsuite/gcc.target/nvptx/atomic-exchange-1.c new file mode 100644 index 00000000000..c63f52b168c --- /dev/null +++ b/gcc/testsuite/gcc.target/nvptx/atomic-exchange-1.c @@ -0,0 +1,39 @@ +/* Test the atomic exchange expansion, shared state space. */ + +/* { dg-do compile } */ +/* { dg-options "-Wno-long-long" } */ + +enum memmodel +{ + MEMMODEL_SEQ_CST = 5 +}; + +unsigned char u8 __attribute__((shared)); +unsigned short u16 __attribute__((shared)); +unsigned int u32 __attribute__((shared)); +unsigned long long int u64 __attribute__((shared)); + +int +main() +{ + __atomic_exchange_n (&u8, 0, MEMMODEL_SEQ_CST); + __atomic_exchange_n (&u16, 0, MEMMODEL_SEQ_CST); + __atomic_exchange_n (&u32, 0, MEMMODEL_SEQ_CST); + __atomic_exchange_n (&u64, 0, MEMMODEL_SEQ_CST); + + return 0; +} + + +/* Not ptx-native, fallback to libatomic. + Libatomic uses generic addressing with a global lock and membar.sys barriers. + We could implement these more efficiently by cloning libatomic for .shared, + using a per-CTA lock and membar.cta barrier. But we'd expect + performance-critical code to use the ptx-native atomic sizes 32 and 64 bit, + so that doesn't seem to be worth the trouble. */ +/* { dg-final { scan-assembler-times "(?n)call .* __atomic_exchange_1" 1 } } */ +/* { dg-final { scan-assembler-times "(?n)call .* __atomic_exchange_2" 1 } } */ + +/* { dg-final { scan-assembler-times "atom.shared.exch.b32" 1 } } */ +/* { dg-final { scan-assembler-times "atom.shared.exch.b64" 1 } } */ +/* { dg-final { scan-assembler-times "membar.cta" 4 } } */ diff --git a/gcc/testsuite/gcc.target/nvptx/atomic-exchange-2.c b/gcc/testsuite/gcc.target/nvptx/atomic-exchange-2.c new file mode 100644 index 00000000000..4301e74e94e --- /dev/null +++ b/gcc/testsuite/gcc.target/nvptx/atomic-exchange-2.c @@ -0,0 +1,33 @@ +/* Test the atomic exchange expansion, global state space. */ + +/* { dg-do compile } */ +/* { dg-options "-Wno-long-long" } */ + +enum memmodel +{ + MEMMODEL_SEQ_CST = 5 +}; + +unsigned char u8; +unsigned short u16; +unsigned int u32; +unsigned long long int u64; + +int +main() +{ + __atomic_exchange_n (&u8, 0, MEMMODEL_SEQ_CST); + __atomic_exchange_n (&u16, 0, MEMMODEL_SEQ_CST); + __atomic_exchange_n (&u32, 0, MEMMODEL_SEQ_CST); + __atomic_exchange_n (&u64, 0, MEMMODEL_SEQ_CST); + + return 0; +} + +/* Not ptx-native, fallback to libatomic. */ +/* { dg-final { scan-assembler-times "(?n)call .* __atomic_exchange_1" 1 } } */ +/* { dg-final { scan-assembler-times "(?n)call .* __atomic_exchange_2" 1 } } */ + +/* { dg-final { scan-assembler-times "atom.global.exch.b32" 1 } } */ +/* { dg-final { scan-assembler-times "atom.global.exch.b64" 1 } } */ +/* { dg-final { scan-assembler-times "membar.sys" 4 } } */ diff --git a/gcc/testsuite/gcc.target/nvptx/atomic-exchange-3.c b/gcc/testsuite/gcc.target/nvptx/atomic-exchange-3.c new file mode 100644 index 00000000000..2f8232f25eb --- /dev/null +++ b/gcc/testsuite/gcc.target/nvptx/atomic-exchange-3.c @@ -0,0 +1,33 @@ +/* Test the atomic exchange expansion, generic addressing. */ + +/* { dg-do compile } */ +/* { dg-options "-Wno-long-long" } */ + +enum memmodel +{ + MEMMODEL_SEQ_CST = 5 +}; + +unsigned char *u8; +unsigned short *u16; +unsigned int *u32; +unsigned long long int *u64; + +int +main() +{ + __atomic_exchange_n (u8, 0, MEMMODEL_SEQ_CST); + __atomic_exchange_n (u16, 0, MEMMODEL_SEQ_CST); + __atomic_exchange_n (u32, 0, MEMMODEL_SEQ_CST); + __atomic_exchange_n (u64, 0, MEMMODEL_SEQ_CST); + + return 0; +} + +/* Not ptx-native, fallback to libatomic. */ +/* { dg-final { scan-assembler-times "(?n)call .* __atomic_exchange_1" 1 } } */ +/* { dg-final { scan-assembler-times "(?n)call .* __atomic_exchange_2" 1 } } */ + +/* { dg-final { scan-assembler-times "atom.exch.b32" 1 } } */ +/* { dg-final { scan-assembler-times "atom.exch.b64" 1 } } */ +/* { dg-final { scan-assembler-times "membar.sys" 4 } } */ diff --git a/gcc/testsuite/gcc.target/nvptx/atomic-exchange-4.c b/gcc/testsuite/gcc.target/nvptx/atomic-exchange-4.c new file mode 100644 index 00000000000..de1d395cccf --- /dev/null +++ b/gcc/testsuite/gcc.target/nvptx/atomic-exchange-4.c @@ -0,0 +1,74 @@ +/* Test the atomic exchange expansion, execution. */ + +/* { dg-do run } */ +/* { dg-options "-Wno-long-long" } */ + +/* We're trying to generate this type of store/exchange/load sequence: + st.global.u32 [g32], %r60; + atom.global.exch.b32 %r22, [g32], 2; + ld.global.u32 %r23, [g32]; + with no insns inbetween. + + We compile this at -O0, to keep the compiler from optimizing out the + "p = (P)" assignment. If the assignment is optimized out we don't test + the generic case, iow we generate for instance atom.global.exch.b32 instead + of atom.exch.b32. + + Compiling at -O0 however does introduce loads and stores in the + store/exchange/load sequence, so we fix that by using the register + keyword. */ + +enum memmodel +{ + MEMMODEL_RELAXED = 0, +}; + +unsigned int g32; +unsigned long long int g64; + +unsigned int s32 __attribute__((shared)); +unsigned long long int s64 __attribute__((shared)); + +#define TEST(P, V1, V2) \ + { \ + register typeof (*(P)) tmp; \ + register typeof (*(P)) tmp2; \ + __atomic_store_n ((P), (V1), MEMMODEL_RELAXED); \ + tmp = __atomic_exchange_n ((P), (V2), MEMMODEL_RELAXED); \ + tmp2 = __atomic_load_n ((P), MEMMODEL_RELAXED); \ + if (tmp != (V1) || tmp2 != (V2)) \ + __builtin_abort (); \ + } + +#define TEST2(P, V1, V2) \ + { \ + register typeof (*(P)) tmp; \ + register typeof (*(P)) tmp2; \ + *(P) = (V1); \ + tmp = __atomic_exchange_n ((P), (V2), MEMMODEL_RELAXED); \ + tmp2 = *(P); \ + if (tmp != (V1) || tmp2 != (V2)) \ + __builtin_abort (); \ + } + +#define TESTS(P) \ + { \ + TEST ((P), 1, 2); \ + TEST2 ((P), 3, 4); \ + { \ + register typeof (*(P)) * p = (P); \ + TEST (p, 1, 2); \ + TEST2 (p, 3, 4); \ + } \ + } + +int +main () +{ + TESTS (&g32); + TESTS (&g64); + TESTS (&s32); + TESTS (&s64); + + return 0; +}