From patchwork Wed Apr 8 03:36:26 2026 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bohan Lei X-Patchwork-Id: 132786 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from vm01.sourceware.org (localhost [127.0.0.1]) by sourceware.org (Postfix) with ESMTP id A52D64BA2E05 for ; Wed, 8 Apr 2026 03:37:18 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org A52D64BA2E05 Authentication-Results: sourceware.org; dkim=pass (1024-bit key, unprotected) header.d=linux.alibaba.com header.i=@linux.alibaba.com header.a=rsa-sha256 header.s=default header.b=RA2vfgRI X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from out30-97.freemail.mail.aliyun.com (out30-97.freemail.mail.aliyun.com [115.124.30.97]) by sourceware.org (Postfix) with ESMTPS id 492DA4BA2E05 for ; Wed, 8 Apr 2026 03:36:38 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 492DA4BA2E05 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=linux.alibaba.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=linux.alibaba.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 492DA4BA2E05 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=115.124.30.97 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1775619398; cv=none; b=rRkEtU0G4SVCv4EdjBJ115RRtSP4hjgJdrCt+kaDa24vV7m5xt1xwdD20aQL4jD1ymWsg4vevCPk6w+xREryfsPkbUm7qvhYQLLliRcMI99qyMqFE6gc9vyi3C2LgnH/O7qxP7AEYLTrkPZIiE9qfj4xeGKhs+QLt4HHgytNNmY= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1775619398; c=relaxed/simple; bh=h0W26Q5Fy7ZgfHqoGbQEsSOoFXCCMMNfohFeW5GDqr8=; h=DKIM-Signature:From:To:Subject:Date:Message-Id:MIME-Version; b=BkVsboU9aqwb251Gf4ypMfZ+jvD1PtCqNUdDxh6yAKpvJ3CV44aV4nE/laYek+K2J9b6aQ36o22qR2mQRjnY83STyDcw7DDR5czdP++/qscxPdYZ79/bTpEwv2h5KaD7cQO5yu6y9R0ehGaD7rmHZ9UBmUExJSD/vfiToN0c11g= ARC-Authentication-Results: i=1; server2.sourceware.org DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 492DA4BA2E05 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.alibaba.com; s=default; t=1775619395; h=From:To:Subject:Date:Message-Id:MIME-Version; bh=LN9z9h2c7Dtez/k5OkGZg5xQQ6R69lkLlRK3+uVnCzs=; b=RA2vfgRITHLju/Ms5uyf2IGvwqFnuRPg2i8pv+X/jgP5u1oToIC0LS71uPQL7cXfDxODJ8UiFBNgNXJqFgt27T7S+F4nU7EcWWHXnxem2T43SAoTcCEcch0RPOvnc6TQcAWSehSdbfElMrBQVToOktGGTqojydDSHKpCec+m1O0= X-Alimail-AntiSpam: AC=PASS; BC=-1|-1; BR=01201311R101e4; CH=green; DM=||false|; DS=||; FP=0|-1|-1|-1|0|-1|-1|-1; HT=maildocker-contentspam033032089153; MF=garthlei@linux.alibaba.com; NM=1; PH=DS; RN=5; SR=0; TI=SMTPD_---0X0dMbTD_1775619387; Received: from localhost(mailfrom:garthlei@linux.alibaba.com fp:SMTPD_---0X0dMbTD_1775619387 cluster:ay36) by smtp.aliyun-inc.com; Wed, 08 Apr 2026 11:36:34 +0800 From: Bohan Lei To: gcc-patches@gcc.gnu.org Cc: jeffrey.law@oss.qualcomm.com, philipp.tomsich@vrull.eu, andrew.pinski@oss.qualcomm.com, Bohan Lei Subject: [PATCH v3] simplify-rtx: Simplify (op (and/ior x C1) C2) in special cases Date: Wed, 8 Apr 2026 11:36:26 +0800 Message-Id: <20260408033626.36165-1-garthlei@linux.alibaba.com> X-Mailer: git-send-email 2.39.3 (Apple Git-146) In-Reply-To: <20260331101028.10577-1-garthlei@linux.alibaba.com> References: <20260331101028.10577-1-garthlei@linux.alibaba.com> MIME-Version: 1.0 X-Spam-Status: No, score=-28.1 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, ENV_AND_HDR_SPF_MATCH, GIT_PATCH_0, KAM_SHORT, RCVD_IN_DNSWL_NONE, RCVD_IN_VALIDITY_RPBL_BLOCKED, RCVD_IN_VALIDITY_SAFE_BLOCKED, SCC_5_SHORT_WORD_LINES, SPF_HELO_NONE, SPF_PASS, TXREP, UNPARSEABLE_RELAY, USER_IN_DEF_DKIM_WL, USER_IN_DEF_SPF_WL autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces~patchwork=sourceware.org@gcc.gnu.org This is v3 of https://gcc.gnu.org/pipermail/gcc-patches/2026-March/711809.html, fixed and enhanced as was suggested by Philipp and Andrew. The previous version: https://gcc.gnu.org/pipermail/gcc-patches/2026-March/711833.html. This patch adds missing simplifications for (op (and/ior x C1) C2) in special cases. In the AND case, when (and C1 C2) is not equal to C1, some bits set in C2 are not set in C1, and thus (eq (and x C1) C2) can never be true. The OR case is similar when (and C1 C2) is not equal to C2. As we know that the result of (and x C1) cannot be greater than C1, and that that of (or x C1) cannot be less than C1 for unsigned integers, LTU, LEU, GTU, GEU cases can be optimized, too. The patch is meant to fix an ICE on RISC-V. In a former patch, I tried to change the insn condition directly, but Jeff pointed out that it was more reasonable to optimize it out before the split. As was suggested by Jeff, this patch tries to simplify the expression in simplify_relational_operation_1. The URL for the former patch: https://patchwork.sourceware.org/project/gcc/patch/20251229024238.15044-1-garthlei@linux.alibaba.com/ gcc/ChangeLog: * simplify-rtx.cc (simplify_context::simplify_relational_operation_1): Add simplifications for (op (and/ior x C1) C2) in special cases. gcc/testsuite/ChangeLog: * gcc.target/riscv/zbs-if_then_else-02.c: New test. --- gcc/simplify-rtx.cc | 45 +++++++++++++++++++ .../gcc.target/riscv/zbs-if_then_else-02.c | 32 +++++++++++++ 2 files changed, 77 insertions(+) create mode 100644 gcc/testsuite/gcc.target/riscv/zbs-if_then_else-02.c diff --git a/gcc/simplify-rtx.cc b/gcc/simplify-rtx.cc index 50fc51152ca..eeabcb4af6f 100644 --- a/gcc/simplify-rtx.cc +++ b/gcc/simplify-rtx.cc @@ -6731,6 +6731,51 @@ simplify_context::simplify_relational_operation_1 (rtx_code code, } } + /* Several optimizable scenerios of (op (and/ior x C1) C2) */ + if ((op0code == AND || op0code == IOR) + && CONST_INT_P (op1) + && CONST_INT_P (XEXP (op0, 1))) + { + unsigned HOST_WIDE_INT c1 = UINTVAL (XEXP (op0, 1)); + unsigned HOST_WIDE_INT c2 = UINTVAL (op1); + + /* For AND operations: + - (x & c1) == c2 when some bits are set in c2 but not in c1 -> false + - (x & c1) != c2 when some bits are set in c2 but not in c1 -> true + - (x & c1) >= c2 when c1 is less than c2 -> false + - (x & c1) < c2 when c1 is less than c2 -> true + - (x & c1) > c2 when c1 is less than or equal to c2 -> false + - (x & c1) <= c2 when c1 is less than or equal to c2 -> true + + For IOR operations: + - (x | c1) == c2 when some bits are set in c1 but not in c2 -> false + - (x | c1) != c2 when some bits are set in c1 but not in c2 -> true + - (x | c1) <= c2 when c1 is greater than c2 -> false + - (x | c1) > c2 when c1 is greater than c2 -> true + - (x | c1) < c2 when c1 is greater than or equal to c2 -> false + - (x | c1) >= c2 when c1 is greater than or equal to c2 -> true */ + if ((op0code == AND + && ((code == EQ && (c1 & c2) != c2) + || (code == GEU && c1 < c2) + || (code == GTU && c1 <= c2))) + || ((op0code == IOR + && ((code == EQ && (c1 & c2) != c1) + || (code == LEU && c1 > c2) + || (code == LTU && c1 >= c2))))) + return const0_rtx; + + + if ((op0code == AND + && ((code == NE && (c1 & c2) != c2) + || (code == LTU && c1 < c2) + || (code == LEU && c1 <= c2))) + || ((op0code == IOR + && ((code == NE && (c1 & c2) != c1) + || (code == GTU && c1 > c2) + || (code == GEU && c1 >= c2))))) + return const_true_rtx; + } + /* (eq/ne (bswap x) C1) simplifies to (eq/ne x C2) with C2 swapped. */ if ((code == EQ || code == NE) && GET_CODE (op0) == BSWAP diff --git a/gcc/testsuite/gcc.target/riscv/zbs-if_then_else-02.c b/gcc/testsuite/gcc.target/riscv/zbs-if_then_else-02.c new file mode 100644 index 00000000000..3393bea8898 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/zbs-if_then_else-02.c @@ -0,0 +1,32 @@ +/* { dg-do link { target { rv64 } } } */ +/* { dg-options "-march=rv64gc_zbb_zbs -mabi=lp64d -flto" } */ +/* { dg-skip-if "" { *-*-* } { "-O0" "-Og" "-O1" } } */ + +struct S { + int a; + char b; + int c; +} s; + +const signed char c = -37; +int d; +struct S v1[] = {{0, 8}, 0, 0, -108976}, v2[] = {{}, 0, 0, 2804}; +int a; +struct S v3[3]; +int *p = &a; + +void foo() { + int a; + if (a) + ; + else if (v1[0].b) + s.a = 0; + else + d = 0; + if (*p) + if (v3[1].c) + if (1 ^ (d & c & v2[1].c & ~v1[1].c | s.a)) + v3[2].c = 0; +} + +int main() { foo(); }