From patchwork Tue Mar 31 20:42:09 2026 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vineet Gupta X-Patchwork-Id: 132545 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from vm01.sourceware.org (localhost [127.0.0.1]) by sourceware.org (Postfix) with ESMTP id 53BB54B7A1E0 for ; Tue, 31 Mar 2026 20:43:18 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 53BB54B7A1E0 Authentication-Results: sourceware.org; dkim=pass (1024-bit key, unprotected) header.d=linux.dev header.i=@linux.dev header.a=rsa-sha256 header.s=key1 header.b=og0cHrCt X-Original-To: binutils@sourceware.org Delivered-To: binutils@sourceware.org Received: from out-180.mta1.migadu.com (out-180.mta1.migadu.com [95.215.58.180]) by sourceware.org (Postfix) with ESMTPS id 6CCCC4BA23F3 for ; Tue, 31 Mar 2026 20:42:31 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 6CCCC4BA23F3 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=linux.dev Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=linux.dev ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 6CCCC4BA23F3 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=95.215.58.180 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1774989751; cv=none; b=pXebzaymtx2h2OOQ1K6cTO8XxqgWeWz+qg2sSsvfgK76GWW7X1fblw5/fZkJCwDhzjqE+EWLImgiPQjccmGrk3qTdtE56fQbhqIkPkjzBD5cvPnRIQKOHuPSfQKyE+5mhPBMhKx2WSWGW/wII3CE7xjlUReXAdx6Eib0oEcJwSk= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1774989751; c=relaxed/simple; bh=dpP7U/ny96Axb5GNCPJoyt2h0u2zDKhZ1DuAyM1cZaE=; h=DKIM-Signature:From:To:Subject:Date:Message-ID:MIME-Version; b=F/tgHsCbuUAb94Q240ZxQz2Ta+U5M1Sw72qKxZVABpLhNJh/sshXahCQ7G9jPn9ENaG24sFqCrM64ucZ9oUDT3xJd0Mf2PU1Yxhi9rRFP+3OA+ZtudFRrgk8v7v3czKPqQZ2U6wB+2WoNVXWKre634HjmTXZsqLglxZSx39LIEA= ARC-Authentication-Results: i=1; server2.sourceware.org DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 6CCCC4BA23F3 X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1774989750; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=5QSVryiLTibsXqqbTnl+9TQgQCsSTrpPVYsKacvOf8E=; b=og0cHrCtMaIIT/xDlGgzFN1Nxv0g9mPuIsWE752pm7yHVoddlaJ5N+fTlfKbhVpktlsi68 FA49FhiBeaEph/8YPa4s5p6tW6UTwea268wB8o0udWzyb8CA7TJK9ig/brGPNqs5AwVMRr USJih3bcTpCwdf6u83H+4zRRULgtdk8= From: Vineet Gupta To: bpf@gcc.gnu.org Cc: binutils@sourceware.org, jose.marchesi@oracle.com, ast@kernel.org, Eduard Zingerman , Yonghong Song , Vineet Gupta Subject: [v2 1/4] bpf: print failing insn for unexpected register Date: Tue, 31 Mar 2026 13:42:09 -0700 Message-ID: <20260331204212.3992270-2-vineet.gupta@linux.dev> In-Reply-To: <20260331204212.3992270-1-vineet.gupta@linux.dev> References: <20260331204212.3992270-1-vineet.gupta@linux.dev> MIME-Version: 1.0 X-Migadu-Flow: FLOW_OUT X-Spam-Status: No, score=-8.4 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, RCVD_IN_DNSWL_BLOCKED, RCVD_IN_VALIDITY_RPBL_BLOCKED, RCVD_IN_VALIDITY_SAFE_BLOCKED, SPF_HELO_PASS, SPF_PASS, TXREP, URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: binutils-bounces~patchwork=sourceware.org@sourceware.org prev: | /tmp/cc7214hK.s: Assembler messages: | /tmp/cc7214hK.s:40: Error: unexpected register name `w0' in expression New | /tmp/cc7214hK.s: Assembler messages: | /tmp/cc7214hK.s:40: Error: unexpected register name `w0' in instruction `*(u32 *) (r9+0) = w0' Signed-off-by: Vineet Gupta --- gas/config/tc-bpf.c | 6 ++++-- gas/testsuite/gas/bpf/regs-for-symbols-pseudoc.l | 14 +++++++------- 2 files changed, 11 insertions(+), 9 deletions(-) diff --git a/gas/config/tc-bpf.c b/gas/config/tc-bpf.c index bc83d3d19d58..57c2b869cbab 100644 --- a/gas/config/tc-bpf.c +++ b/gas/config/tc-bpf.c @@ -1235,6 +1235,7 @@ add_relaxed_insn (struct bpf_insn *insn, expressionS *exp) static int exp_parse_failed = 0; static bool parsing_insn_operands = false; +static char *g_curr_insn_str; static char * parse_expression (char *s, expressionS *exp) @@ -1357,8 +1358,8 @@ bpf_parse_name (const char *name, expressionS *exp, enum expr_mode mode) if (parse_bpf_register ((char *) name, 'r', ®no) || parse_bpf_register ((char *) name, 'w', ®no)) { - as_bad (_("unexpected register name `%s' in expression"), - name); + as_bad (_("unexpected register name `%s' in instruction `%s'"), + name, g_curr_insn_str); return false; } } @@ -1464,6 +1465,7 @@ md_assemble (char *str ATTRIBUTE_UNUSED) function above. */ partial_match_length = 0; errmsg = NULL; + g_curr_insn_str = str; #define PARSE_ERROR(...) parse_error (s > str ? s - str : 0, __VA_ARGS__) diff --git a/gas/testsuite/gas/bpf/regs-for-symbols-pseudoc.l b/gas/testsuite/gas/bpf/regs-for-symbols-pseudoc.l index eeda735fb993..b12739ed7a68 100644 --- a/gas/testsuite/gas/bpf/regs-for-symbols-pseudoc.l +++ b/gas/testsuite/gas/bpf/regs-for-symbols-pseudoc.l @@ -1,8 +1,8 @@ .*: Assembler messages: -.*:1: Error: unexpected register name `w3' in expression -.*:2: Error: unexpected register name `r3' in expression -.*:2: Error: unexpected register name `r3' in expression -.*:3: Error: unexpected register name `r3' in expression -.*:3: Error: unexpected register name `r3' in expression -.*:4: Error: unexpected register name `r3' in expression -.*:4: Error: unexpected register name `r3' in expression +.*:1: Error: unexpected register name `w3' in instruction `goto w3' +.*:2: Error: unexpected register name `r3' in instruction `r2 =r3' +.*:2: Error: unexpected register name `r3' in instruction `r2 =r3' +.*:3: Error: unexpected register name `r3' in instruction `r2 =r3' +.*:3: Error: unexpected register name `r3' in instruction `r2 =r3' +.*:4: Error: unexpected register name `r3' in instruction `r2 =1\+r3' +.*:4: Error: unexpected register name `r3' in instruction `r2 =1\+r3' From patchwork Tue Mar 31 20:42:10 2026 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vineet Gupta X-Patchwork-Id: 132547 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from vm01.sourceware.org (localhost [127.0.0.1]) by sourceware.org (Postfix) with ESMTP id 50A854BA23C1 for ; Tue, 31 Mar 2026 20:46:39 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 50A854BA23C1 Authentication-Results: sourceware.org; dkim=pass (1024-bit key, unprotected) header.d=linux.dev header.i=@linux.dev header.a=rsa-sha256 header.s=key1 header.b=pCzjz9DT X-Original-To: binutils@sourceware.org Delivered-To: binutils@sourceware.org Received: from out-180.mta1.migadu.com (out-180.mta1.migadu.com [95.215.58.180]) by sourceware.org (Postfix) with ESMTPS id 7B08D4B7A1EA for ; Tue, 31 Mar 2026 20:42:35 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 7B08D4B7A1EA Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=linux.dev Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=linux.dev ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 7B08D4B7A1EA Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=95.215.58.180 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1774989755; cv=none; b=AnscunFq/Xy4w6yHYZV+o8mh4K6TutAgB5l0DKEhOpGam8LNZh9X3RLQDx31a7GuTIK4isYs2/aA+L7XhMUkNTzmVNKzQrHwZcafWbAFuvt7Sn3APcpaNu6jQVps+FTeAa4r69Jtn411Vbv3ol1u14J+zZh4nOkTs+03s/4BG/I= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1774989755; c=relaxed/simple; bh=ytx6TwZSz1vFYyzbqsHkYmV1RPFqJRB37aN6ktUfX08=; h=DKIM-Signature:From:To:Subject:Date:Message-ID:MIME-Version; b=Ez3Ut2l4TuVBDeU/rY+QDDpI2ZoBsM+Km/YLrRTnvckX/WHCltJIGDmSIcmFu2vuLijgOMWIijFYddUvx8sIssKMTAlvfBGGlQNK+EYdI0cch2bSeQ1MNxABj7+EIUwJN7MkT4R+/cpshE8UxThjIjj9a1B3DXzJZTuc2j/asb8= ARC-Authentication-Results: i=1; server2.sourceware.org DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 7B08D4B7A1EA X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1774989753; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=6b6bhOW/MbEkT4Yvlv0/HtpNyC53b0q7zsXpjx2bo60=; b=pCzjz9DTqQBkZCc2K+wGq/zyxz0Z3Fn6mKT05jw/SJaFXplddJfBVMkg7zJRB35XYtxbrx s/7JFgm3QEl9gakJ8ky1XIzBUijouCX1EUM4St5uhOEvByOwCUs9BTr1o9cN6mCkxBMTat +11HNIUvcmKdWgOXANzDEsZT40AGR+c= From: Vineet Gupta To: bpf@gcc.gnu.org Cc: binutils@sourceware.org, jose.marchesi@oracle.com, ast@kernel.org, Eduard Zingerman , Yonghong Song , Vineet Gupta Subject: [v2 2/4] bpf: consolidate register format specifier handling [NFC] Date: Tue, 31 Mar 2026 13:42:10 -0700 Message-ID: <20260331204212.3992270-3-vineet.gupta@linux.dev> In-Reply-To: <20260331204212.3992270-1-vineet.gupta@linux.dev> References: <20260331204212.3992270-1-vineet.gupta@linux.dev> MIME-Version: 1.0 X-Migadu-Flow: FLOW_OUT X-Spam-Status: No, score=-11.1 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, RCVD_IN_DNSWL_BLOCKED, RCVD_IN_VALIDITY_RPBL_BLOCKED, RCVD_IN_VALIDITY_SAFE_BLOCKED, SPF_HELO_PASS, SPF_PASS, TXREP, URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: binutils-bounces~patchwork=sourceware.org@sourceware.org NFC. Combine the separate if blocks for %dr/%dw and %sr/%sw into single blocks each, using the tag character to drive parse_bpf_register(). Signed-off-by: Vineet Gupta --- gas/config/tc-bpf.c | 50 ++++++++------------------------------------- opcodes/bpf-dis.c | 16 ++++----------- 2 files changed, 12 insertions(+), 54 deletions(-) diff --git a/gas/config/tc-bpf.c b/gas/config/tc-bpf.c index 57c2b869cbab..ecb6c5a70535 100644 --- a/gas/config/tc-bpf.c +++ b/gas/config/tc-bpf.c @@ -1524,10 +1524,12 @@ md_assemble (char *str ATTRIBUTE_UNUSED) s += 1; p += 2; } - else if (strncmp (p, "%dr", 3) == 0) + else if (strncmp (p, "%dr", 3) == 0 + || strncmp (p, "%dw", 3) == 0) { + char rw = *(p + 2); uint8_t regno; - char *news = parse_bpf_register (s, 'r', ®no); + char *news = parse_bpf_register (s, rw, ®no); if (news == NULL || (insn.has_dst && regno != insn.dst)) { @@ -1543,48 +1545,12 @@ md_assemble (char *str ATTRIBUTE_UNUSED) insn.has_dst = 1; p += 3; } - else if (strncmp (p, "%sr", 3) == 0) + else if (strncmp (p, "%sr", 3) == 0 + || strncmp (p, "%sw", 3) == 0) { + char rw = *(p + 2); uint8_t regno; - char *news = parse_bpf_register (s, 'r', ®no); - - if (news == NULL || (insn.has_src && regno != insn.src)) - { - if (news != NULL) - PARSE_ERROR ("expected register r%d, got r%d", - insn.dst, regno); - else - PARSE_ERROR ("expected register name, got '%s'", s); - break; - } - s = news; - insn.src = regno; - insn.has_src = 1; - p += 3; - } - else if (strncmp (p, "%dw", 3) == 0) - { - uint8_t regno; - char *news = parse_bpf_register (s, 'w', ®no); - - if (news == NULL || (insn.has_dst && regno != insn.dst)) - { - if (news != NULL) - PARSE_ERROR ("expected register r%d, got r%d", - insn.dst, regno); - else - PARSE_ERROR ("expected register name, got '%s'", s); - break; - } - s = news; - insn.dst = regno; - insn.has_dst = 1; - p += 3; - } - else if (strncmp (p, "%sw", 3) == 0) - { - uint8_t regno; - char *news = parse_bpf_register (s, 'w', ®no); + char *news = parse_bpf_register (s, rw, ®no); if (news == NULL || (insn.has_src && regno != insn.src)) { diff --git a/opcodes/bpf-dis.c b/opcodes/bpf-dis.c index 7b89a7994ee6..de8d417dcd38 100644 --- a/opcodes/bpf-dis.c +++ b/opcodes/bpf-dis.c @@ -214,22 +214,14 @@ print_insn_bpf (bfd_vma pc, disassemble_info *info) (*info->fprintf_styled_func) (info->stream, dis_style_text, " "); p += 2; } - else if (strncmp (p, "%dr", 3) == 0) + else if (strncmp (p, "%dr", 3) == 0 + || strncmp (p, "%dw", 3) == 0) { print_register (info, p, bpf_extract_dst (word, endian)); p += 3; } - else if (strncmp (p, "%sr", 3) == 0) - { - print_register (info, p, bpf_extract_src (word, endian)); - p += 3; - } - else if (strncmp (p, "%dw", 3) == 0) - { - print_register (info, p, bpf_extract_dst (word, endian)); - p += 3; - } - else if (strncmp (p, "%sw", 3) == 0) + else if (strncmp (p, "%sr", 3) == 0 + || strncmp (p, "%sw", 3) == 0) { print_register (info, p, bpf_extract_src (word, endian)); p += 3; From patchwork Tue Mar 31 20:42:11 2026 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vineet Gupta X-Patchwork-Id: 132546 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from vm01.sourceware.org (localhost [127.0.0.1]) by sourceware.org (Postfix) with ESMTP id 97FD04BA23F3 for ; Tue, 31 Mar 2026 20:44:15 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 97FD04BA23F3 Authentication-Results: sourceware.org; dkim=pass (1024-bit key, unprotected) header.d=linux.dev header.i=@linux.dev header.a=rsa-sha256 header.s=key1 header.b=q/CDoAUY X-Original-To: binutils@sourceware.org Delivered-To: binutils@sourceware.org Received: from out-179.mta1.migadu.com (out-179.mta1.migadu.com [95.215.58.179]) by sourceware.org (Postfix) with ESMTPS id E76ED4B7A1D2 for ; Tue, 31 Mar 2026 20:42:38 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org E76ED4B7A1D2 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=linux.dev Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=linux.dev ARC-Filter: OpenARC Filter v1.0.0 sourceware.org E76ED4B7A1D2 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=95.215.58.179 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1774989759; cv=none; b=QHoOQfY8OU+OD0HaSrH+OZ9Io1u04zsQ/yITX2rT5bimoRcmz3JHRNbL6uvXPjywkH7VkgV1baMLlzcRgVSX0rksUfy/EXKMb/hmWl0bfs922w6na50AqEBUYMDFzq940PW0ST64sSXJXUaRrJYdfPPAlH6NBnv8iDKafZqVlbY= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1774989759; c=relaxed/simple; bh=euTb2CBM68u4GKCvIxBD+iYPmlf0JDCwv3fOb/5+eZs=; h=DKIM-Signature:From:To:Subject:Date:Message-ID:MIME-Version; b=DljGYCUAMLG+JHtslkPiVDVYUnkWnP3qTLyKTX9N7+PL3IL84Gz5jyMXKfxyLWEUnBNAamc7D1fMWC3JEuRyfFrhF92V6E1rJ5Nha/sN/wbfWIWmPkaET9tYyZHTY4K6Y0X7DFDRZNjd/rpJ/PFczTH4UDlM9yKFy67IhY2u/XU= ARC-Authentication-Results: i=1; server2.sourceware.org DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org E76ED4B7A1D2 X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1774989758; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=51ADWBOi/zh8OabowtsmedfM+nPHgXcl7frWBujogiU=; b=q/CDoAUYqvBHV/d4ArbLbkyCXKuLHbwjQhCIirmvMIFBDizWmxULiE8bU+w92TXTvt8Qpe 2TZGgmjjD+3Ij91rGedozd34mS2CgjPE6E5n+6Vjo/HLNJUVmvYbRmYTPMxZRZZRg0mZgC yfRU+20+J3VeORlIaO6vWHdgpq8pjgY= From: Vineet Gupta To: bpf@gcc.gnu.org Cc: binutils@sourceware.org, jose.marchesi@oracle.com, ast@kernel.org, Eduard Zingerman , Yonghong Song , Vineet Gupta Subject: [v2 3/4] PR 34029: bpf: add %dR/%sR register format specifiers Date: Tue, 31 Mar 2026 13:42:11 -0700 Message-ID: <20260331204212.3992270-4-vineet.gupta@linux.dev> In-Reply-To: <20260331204212.3992270-1-vineet.gupta@linux.dev> References: <20260331204212.3992270-1-vineet.gupta@linux.dev> MIME-Version: 1.0 X-Migadu-Flow: FLOW_OUT X-Spam-Status: No, score=-10.9 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, RCVD_IN_DNSWL_BLOCKED, RCVD_IN_VALIDITY_RPBL_BLOCKED, RCVD_IN_VALIDITY_SAFE_BLOCKED, SPF_HELO_PASS, SPF_PASS, TXREP, URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: binutils-bounces~patchwork=sourceware.org@sourceware.org These accept either r or w prefix registers during assembly (pseudoc dialect), while disassembling canonically as r registers. This eliminates the need for duplicate opcode table entries for instructions that accept both w and r register forms. Signed-off-by: Vineet Gupta --- gas/config/tc-bpf.c | 16 ++++++++++++---- include/opcode/bpf.h | 4 +++- opcodes/bpf-dis.c | 6 ++++-- 3 files changed, 19 insertions(+), 7 deletions(-) diff --git a/gas/config/tc-bpf.c b/gas/config/tc-bpf.c index ecb6c5a70535..8d48b128fb90 100644 --- a/gas/config/tc-bpf.c +++ b/gas/config/tc-bpf.c @@ -1525,12 +1525,16 @@ md_assemble (char *str ATTRIBUTE_UNUSED) p += 2; } else if (strncmp (p, "%dr", 3) == 0 - || strncmp (p, "%dw", 3) == 0) + || strncmp (p, "%dw", 3) == 0 + || strncmp (p, "%dR", 3) == 0) { char rw = *(p + 2); uint8_t regno; - char *news = parse_bpf_register (s, rw, ®no); + char *news = parse_bpf_register (s, rw == 'R' ? 'r' : rw, + ®no); + if (rw == 'R' && news == NULL) + news = parse_bpf_register (s, 'w', ®no); if (news == NULL || (insn.has_dst && regno != insn.dst)) { if (news != NULL) @@ -1546,12 +1550,16 @@ md_assemble (char *str ATTRIBUTE_UNUSED) p += 3; } else if (strncmp (p, "%sr", 3) == 0 - || strncmp (p, "%sw", 3) == 0) + || strncmp (p, "%sw", 3) == 0 + || strncmp (p, "%sR", 3) == 0) { char rw = *(p + 2); uint8_t regno; - char *news = parse_bpf_register (s, rw, ®no); + char *news = parse_bpf_register (s, rw == 'R' ? 'r' : rw, + ®no); + if (rw == 'R' && news == NULL) + news = parse_bpf_register (s, 'w', ®no); if (news == NULL || (insn.has_src && regno != insn.src)) { if (news != NULL) diff --git a/include/opcode/bpf.h b/include/opcode/bpf.h index e4ccd430f0ce..e17ca2fdd2c1 100644 --- a/include/opcode/bpf.h +++ b/include/opcode/bpf.h @@ -252,8 +252,10 @@ struct bpf_opcode %% - literal %. %dr - destination 64-bit register. %dw - destination 32-bit register. + %dR - destination register, either r or w prefix accepted. %sr - source 64-bit register. %sw - source 32-bit register. + %sR - source register, either r or w prefix accepted. %d32 - 32-bit signed displacement (in 64-bit words minus one.) %d16 - 16-bit signed displacement (in 64-bit words minus one.) %o16 - 16-bit signed offset (in bytes.) @@ -268,7 +270,7 @@ struct bpf_opcode denote something like `[%r3 + 10]', please use a template like `[ %sr %o16]' instead of `[ %sr + %o16 ]'. - If %dr, %dw, %sr or %sw are found multiple times in a template, + If %dr, %dw, %dR, %sr, %sw or %sR are found multiple times in a template, they refer to the same register, i.e. `%rd = le64 %rd' denotes `r2 = le64 r2', but not `r2 = le64 r1'. diff --git a/opcodes/bpf-dis.c b/opcodes/bpf-dis.c index de8d417dcd38..07aacb621a3b 100644 --- a/opcodes/bpf-dis.c +++ b/opcodes/bpf-dis.c @@ -215,13 +215,15 @@ print_insn_bpf (bfd_vma pc, disassemble_info *info) p += 2; } else if (strncmp (p, "%dr", 3) == 0 - || strncmp (p, "%dw", 3) == 0) + || strncmp (p, "%dw", 3) == 0 + || strncmp (p, "%dR", 3) == 0) { print_register (info, p, bpf_extract_dst (word, endian)); p += 3; } else if (strncmp (p, "%sr", 3) == 0 - || strncmp (p, "%sw", 3) == 0) + || strncmp (p, "%sw", 3) == 0 + || strncmp (p, "%sR", 3) == 0) { print_register (info, p, bpf_extract_src (word, endian)); p += 3; From patchwork Tue Mar 31 20:42:12 2026 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vineet Gupta X-Patchwork-Id: 132548 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from vm01.sourceware.org (localhost [127.0.0.1]) by sourceware.org (Postfix) with ESMTP id 2B8034B7A1E3 for ; Tue, 31 Mar 2026 20:47:17 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 2B8034B7A1E3 Authentication-Results: sourceware.org; dkim=pass (1024-bit key, unprotected) header.d=linux.dev header.i=@linux.dev header.a=rsa-sha256 header.s=key1 header.b=lR2mDVJJ X-Original-To: binutils@sourceware.org Delivered-To: binutils@sourceware.org Received: from out-178.mta1.migadu.com (out-178.mta1.migadu.com [95.215.58.178]) by sourceware.org (Postfix) with ESMTPS id EED884BA9001 for ; Tue, 31 Mar 2026 20:42:40 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org EED884BA9001 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=linux.dev Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=linux.dev ARC-Filter: OpenARC Filter v1.0.0 sourceware.org EED884BA9001 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=95.215.58.178 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1774989761; cv=none; b=sowZ3BlcDT3aIxsyUt0HUU9RLGNK0lkhV/UeOzMr8bIDhD5cjMhzv6kV+YnCsd1ITlcbPWRsGP8iSQF1+IQmfmlcTcRPPcsLPWyltfBE+bRUhrO1Z7ZF1Xu3KAc38Z1sVOzUpb3QabZpNqKP8Z+sit1J3FAuEd761Plf1MYEqiQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1774989761; c=relaxed/simple; bh=YKjNWZEMnX+OoOcBbB/Klpz/QKlntVkSbg5HaMr3DM8=; h=DKIM-Signature:From:To:Subject:Date:Message-ID:MIME-Version; b=boAf+UalcW3xSGsiVV1tViLGHo+BWQoN9ltLHYASPqFfkuL6h/SwroRatpiaXYdvjmh8xvUSQbPgSvtuJ8xttrvmBnRc4peYJlibYIMDoceFUxCO0kCxQyCusO8szDliAONKA5fz+A8tDvlqdYKmSI+5n+DmB6CNI/4F1qHy6bk= ARC-Authentication-Results: i=1; server2.sourceware.org DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org EED884BA9001 X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1774989760; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=FBxuqXqbPLlfCBQ9lyUysotcfye4IKbpRKZHXQtpvnM=; b=lR2mDVJJKwR62Ngyl9qSeKRe6Zy/j1kR8Jmhi6rCZrcFEtQgGtKTkuFVde1awZlVqp05aR XtXs0JF7lVF+FZKlhysKBEA5csZIrXsJu3SCHkf+ZyeA+aFkwz2M2m/fxk1sihPUZdDazZ yaU4UzpvbDwUlykF8+DvMD+W3vDMPO0= From: Vineet Gupta To: bpf@gcc.gnu.org Cc: binutils@sourceware.org, jose.marchesi@oracle.com, ast@kernel.org, Eduard Zingerman , Yonghong Song , Vineet Gupta Subject: [v2 4/4] PR 34029: bpf: allow w regs in load/store insns similar to llvm Date: Tue, 31 Mar 2026 13:42:12 -0700 Message-ID: <20260331204212.3992270-5-vineet.gupta@linux.dev> In-Reply-To: <20260331204212.3992270-1-vineet.gupta@linux.dev> References: <20260331204212.3992270-1-vineet.gupta@linux.dev> MIME-Version: 1.0 X-Migadu-Flow: FLOW_OUT X-Spam-Status: No, score=-11.2 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, RCVD_IN_DNSWL_BLOCKED, RCVD_IN_VALIDITY_RPBL_BLOCKED, RCVD_IN_VALIDITY_SAFE_BLOCKED, SPF_HELO_PASS, SPF_PASS, TXREP, URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: binutils-bounces~patchwork=sourceware.org@sourceware.org e.g. | *(u32 *)(r9 +0) = w0 | Error: unexpected register name `w0' in expression | w0 = *(u32 *)(r9 +0) | Error: unexpected register name `w0' in expression This syntax is allowed by llvm, athough encoding wise it is same as the insn with rN reg. Use newly added %dR and %sR to accept either r or w prefix registers in load and store insns respectively (except u64 variants which have no w-form). The original motivation was a now abondoned gcc change which would generate these patterns. Signed-off-by: Vineet Gupta --- gas/testsuite/gas/bpf/mem-be-pseudoc.d | 32 +++++++++++++++----------- gas/testsuite/gas/bpf/mem-pseudoc.d | 32 +++++++++++++++----------- gas/testsuite/gas/bpf/mem-pseudoc.s | 6 +++++ opcodes/bpf-opc.c | 12 +++++----- 4 files changed, 50 insertions(+), 32 deletions(-) diff --git a/gas/testsuite/gas/bpf/mem-be-pseudoc.d b/gas/testsuite/gas/bpf/mem-be-pseudoc.d index b7715c463a24..e53b20c0e22f 100644 --- a/gas/testsuite/gas/bpf/mem-be-pseudoc.d +++ b/gas/testsuite/gas/bpf/mem-be-pseudoc.d @@ -18,16 +18,22 @@ Disassembly of section .text: 38: 69 21 7e ef 00 00 00 00 r2=\*\(u16\*\)\(r1\+0x7eef\) 40: 71 21 7e ef 00 00 00 00 r2=\*\(u8\*\)\(r1\+0x7eef\) 48: 79 21 ff fe 00 00 00 00 r2=\*\(u64\*\)\(r1\+0xfffe\) - 50: 63 12 7e ef 00 00 00 00 \*\(u32\*\)\(r1\+0x7eef\)=r2 - 58: 6b 12 7e ef 00 00 00 00 \*\(u16\*\)\(r1\+0x7eef\)=r2 - 60: 73 12 7e ef 00 00 00 00 \*\(u8\*\)\(r1\+0x7eef\)=r2 - 68: 7b 12 ff fe 00 00 00 00 \*\(u64\*\)\(r1\+0xfffe\)=r2 - 70: 72 10 7e ef 11 22 33 44 \*\(u8\*\)\(r1\+0x7eef\)=0x11223344 - 78: 6a 10 7e ef 11 22 33 44 \*\(u16\*\)\(r1\+0x7eef\)=0x11223344 - 80: 62 10 7e ef 11 22 33 44 \*\(u32\*\)\(r1\+0x7eef\)=0x11223344 - 88: 7a 10 ff fe 11 22 33 44 \*\(u64\*\)\(r1\+0xfffe\)=0x11223344 - 90: 81 21 7e ef 00 00 00 00 r2=\*\(s32\*\)\(r1\+0x7eef\) - 98: 89 21 7e ef 00 00 00 00 r2=\*\(s16\*\)\(r1\+0x7eef\) - a0: 91 21 7e ef 00 00 00 00 r2=\*\(s8\*\)\(r1\+0x7eef\) - a8: 99 21 7e ef 00 00 00 00 r2=\*\(s64\*\)\(r1\+0x7eef\) - b0: 61 21 00 00 00 00 00 00 r2=\*\(u32\*\)\(r1\+0x0\) + 50: 61 21 7e ef 00 00 00 00 r2=\*\(u32\*\)\(r1\+0x7eef\) + 58: 69 21 7e ef 00 00 00 00 r2=\*\(u16\*\)\(r1\+0x7eef\) + 60: 71 21 7e ef 00 00 00 00 r2=\*\(u8\*\)\(r1\+0x7eef\) + 68: 63 12 7e ef 00 00 00 00 \*\(u32\*\)\(r1\+0x7eef\)=r2 + 70: 6b 12 7e ef 00 00 00 00 \*\(u16\*\)\(r1\+0x7eef\)=r2 + 78: 73 12 7e ef 00 00 00 00 \*\(u8\*\)\(r1\+0x7eef\)=r2 + 80: 7b 12 ff fe 00 00 00 00 \*\(u64\*\)\(r1\+0xfffe\)=r2 + 88: 63 12 7e ef 00 00 00 00 \*\(u32\*\)\(r1\+0x7eef\)=r2 + 90: 6b 12 7e ef 00 00 00 00 \*\(u16\*\)\(r1\+0x7eef\)=r2 + 98: 73 12 7e ef 00 00 00 00 \*\(u8\*\)\(r1\+0x7eef\)=r2 + a0: 72 10 7e ef 11 22 33 44 \*\(u8\*\)\(r1\+0x7eef\)=0x11223344 + a8: 6a 10 7e ef 11 22 33 44 \*\(u16\*\)\(r1\+0x7eef\)=0x11223344 + b0: 62 10 7e ef 11 22 33 44 \*\(u32\*\)\(r1\+0x7eef\)=0x11223344 + b8: 7a 10 ff fe 11 22 33 44 \*\(u64\*\)\(r1\+0xfffe\)=0x11223344 + c0: 81 21 7e ef 00 00 00 00 r2=\*\(s32\*\)\(r1\+0x7eef\) + c8: 89 21 7e ef 00 00 00 00 r2=\*\(s16\*\)\(r1\+0x7eef\) + d0: 91 21 7e ef 00 00 00 00 r2=\*\(s8\*\)\(r1\+0x7eef\) + d8: 99 21 7e ef 00 00 00 00 r2=\*\(s64\*\)\(r1\+0x7eef\) + e0: 61 21 00 00 00 00 00 00 r2=\*\(u32\*\)\(r1\+0x0\) diff --git a/gas/testsuite/gas/bpf/mem-pseudoc.d b/gas/testsuite/gas/bpf/mem-pseudoc.d index b704de51f8fa..4f6a7131be3f 100644 --- a/gas/testsuite/gas/bpf/mem-pseudoc.d +++ b/gas/testsuite/gas/bpf/mem-pseudoc.d @@ -18,16 +18,22 @@ Disassembly of section .text: 38: 69 12 ef 7e 00 00 00 00 r2=\*\(u16\*\)\(r1\+0x7eef\) 40: 71 12 ef 7e 00 00 00 00 r2=\*\(u8\*\)\(r1\+0x7eef\) 48: 79 12 fe ff 00 00 00 00 r2=\*\(u64\*\)\(r1\+0xfffe\) - 50: 63 21 ef 7e 00 00 00 00 \*\(u32\*\)\(r1\+0x7eef\)=r2 - 58: 6b 21 ef 7e 00 00 00 00 \*\(u16\*\)\(r1\+0x7eef\)=r2 - 60: 73 21 ef 7e 00 00 00 00 \*\(u8\*\)\(r1\+0x7eef\)=r2 - 68: 7b 21 fe ff 00 00 00 00 \*\(u64\*\)\(r1\+0xfffe\)=r2 - 70: 72 01 ef 7e 44 33 22 11 \*\(u8\*\)\(r1\+0x7eef\)=0x11223344 - 78: 6a 01 ef 7e 44 33 22 11 \*\(u16\*\)\(r1\+0x7eef\)=0x11223344 - 80: 62 01 ef 7e 44 33 22 11 \*\(u32\*\)\(r1\+0x7eef\)=0x11223344 - 88: 7a 01 fe ff 44 33 22 11 \*\(u64\*\)\(r1\+0xfffe\)=0x11223344 - 90: 81 12 ef 7e 00 00 00 00 r2=\*\(s32\*\)\(r1\+0x7eef\) - 98: 89 12 ef 7e 00 00 00 00 r2=\*\(s16\*\)\(r1\+0x7eef\) - a0: 91 12 ef 7e 00 00 00 00 r2=\*\(s8\*\)\(r1\+0x7eef\) - a8: 99 12 ef 7e 00 00 00 00 r2=\*\(s64\*\)\(r1\+0x7eef\) - b0: 61 12 00 00 00 00 00 00 r2=\*\(u32\*\)\(r1\+0x0\) + 50: 61 12 ef 7e 00 00 00 00 r2=\*\(u32\*\)\(r1\+0x7eef\) + 58: 69 12 ef 7e 00 00 00 00 r2=\*\(u16\*\)\(r1\+0x7eef\) + 60: 71 12 ef 7e 00 00 00 00 r2=\*\(u8\*\)\(r1\+0x7eef\) + 68: 63 21 ef 7e 00 00 00 00 \*\(u32\*\)\(r1\+0x7eef\)=r2 + 70: 6b 21 ef 7e 00 00 00 00 \*\(u16\*\)\(r1\+0x7eef\)=r2 + 78: 73 21 ef 7e 00 00 00 00 \*\(u8\*\)\(r1\+0x7eef\)=r2 + 80: 7b 21 fe ff 00 00 00 00 \*\(u64\*\)\(r1\+0xfffe\)=r2 + 88: 63 21 ef 7e 00 00 00 00 \*\(u32\*\)\(r1\+0x7eef\)=r2 + 90: 6b 21 ef 7e 00 00 00 00 \*\(u16\*\)\(r1\+0x7eef\)=r2 + 98: 73 21 ef 7e 00 00 00 00 \*\(u8\*\)\(r1\+0x7eef\)=r2 + a0: 72 01 ef 7e 44 33 22 11 \*\(u8\*\)\(r1\+0x7eef\)=0x11223344 + a8: 6a 01 ef 7e 44 33 22 11 \*\(u16\*\)\(r1\+0x7eef\)=0x11223344 + b0: 62 01 ef 7e 44 33 22 11 \*\(u32\*\)\(r1\+0x7eef\)=0x11223344 + b8: 7a 01 fe ff 44 33 22 11 \*\(u64\*\)\(r1\+0xfffe\)=0x11223344 + c0: 81 12 ef 7e 00 00 00 00 r2=\*\(s32\*\)\(r1\+0x7eef\) + c8: 89 12 ef 7e 00 00 00 00 r2=\*\(s16\*\)\(r1\+0x7eef\) + d0: 91 12 ef 7e 00 00 00 00 r2=\*\(s8\*\)\(r1\+0x7eef\) + d8: 99 12 ef 7e 00 00 00 00 r2=\*\(s64\*\)\(r1\+0x7eef\) + e0: 61 12 00 00 00 00 00 00 r2=\*\(u32\*\)\(r1\+0x0\) diff --git a/gas/testsuite/gas/bpf/mem-pseudoc.s b/gas/testsuite/gas/bpf/mem-pseudoc.s index 199077539163..f9f94db4acbb 100644 --- a/gas/testsuite/gas/bpf/mem-pseudoc.s +++ b/gas/testsuite/gas/bpf/mem-pseudoc.s @@ -11,10 +11,16 @@ r2 = *(u16 *)(r1 + 32495) r2 = *(u8 *)(r1 + 32495) r2 = *(u64 *)(r1 - 2) + w2 = *(u32 *)(r1 + 32495) + w2 = *(u16 *)(r1 + 32495) + w2 = *(u8 *)(r1 + 32495) *(u32 *)(r1 + 32495) = r2 *(u16 *)(r1 + 32495) = r2 *(u8 *)(r1 + 32495) = r2 *(u64 *)(r1 - 2) = r2 + *(u32 *)(r1 + 32495) = w2 + *(u16 *)(r1 + 32495) = w2 + *(u8 *)(r1 + 32495) = w2 *(u8 *)(r1 + 0x7eef) = 0x11223344 *(u16 *)(r1 + 0x7eef) = 0x11223344 *(u32 *)(r1 + 0x7eef) = 0x11223344 diff --git a/opcodes/bpf-opc.c b/opcodes/bpf-opc.c index aa5493280eaa..4babf6e8649b 100644 --- a/opcodes/bpf-opc.c +++ b/opcodes/bpf-opc.c @@ -208,11 +208,11 @@ const struct bpf_opcode bpf_opcodes[] = BPF_V1, BPF_CODE, BPF_CLASS_LD|BPF_SIZE_W|BPF_MODE_ABS}, /* Generic load instructions (to register.) */ - {BPF_INSN_LDXB, "ldxb%W%dr , [ %sr %o16 ]", "%dr = * ( u8 * ) ( %sr %o16 )", + {BPF_INSN_LDXB, "ldxb%W%dr , [ %sr %o16 ]", "%dR = * ( u8 * ) ( %sr %o16 )", BPF_V1, BPF_CODE, BPF_CLASS_LDX|BPF_SIZE_B|BPF_MODE_MEM}, - {BPF_INSN_LDXH, "ldxh%W%dr , [ %sr %o16 ]", "%dr = * ( u16 * ) ( %sr %o16 )", + {BPF_INSN_LDXH, "ldxh%W%dr , [ %sr %o16 ]", "%dR = * ( u16 * ) ( %sr %o16 )", BPF_V1, BPF_CODE, BPF_CLASS_LDX|BPF_SIZE_H|BPF_MODE_MEM}, - {BPF_INSN_LDXW, "ldxw%W%dr , [ %sr %o16 ]", "%dr = * ( u32 * ) ( %sr %o16 )", + {BPF_INSN_LDXW, "ldxw%W%dr , [ %sr %o16 ]", "%dR = * ( u32 * ) ( %sr %o16 )", BPF_V1, BPF_CODE, BPF_CLASS_LDX|BPF_SIZE_W|BPF_MODE_MEM}, {BPF_INSN_LDXDW, "ldxdw%W%dr , [ %sr %o16 ]","%dr = * ( u64 * ) ( %sr %o16 )", BPF_V1, BPF_CODE, BPF_CLASS_LDX|BPF_SIZE_DW|BPF_MODE_MEM}, @@ -228,11 +228,11 @@ const struct bpf_opcode bpf_opcodes[] = BPF_V4, BPF_CODE, BPF_CLASS_LDX|BPF_SIZE_DW|BPF_MODE_SMEM}, /* Generic store instructions (from register.) */ - {BPF_INSN_STXBR, "stxb%W[ %dr %o16 ] , %sr", "* ( u8 * ) ( %dr %o16 ) = %sr", + {BPF_INSN_STXBR, "stxb%W[ %dr %o16 ] , %sr", "* ( u8 * ) ( %dr %o16 ) = %sR", BPF_V1, BPF_CODE, BPF_CLASS_STX|BPF_SIZE_B|BPF_MODE_MEM}, - {BPF_INSN_STXHR, "stxh%W[ %dr %o16 ] , %sr", "* ( u16 * ) ( %dr %o16 ) = %sr", + {BPF_INSN_STXHR, "stxh%W[ %dr %o16 ] , %sr", "* ( u16 * ) ( %dr %o16 ) = %sR", BPF_V1, BPF_CODE, BPF_CLASS_STX|BPF_SIZE_H|BPF_MODE_MEM}, - {BPF_INSN_STXWR, "stxw%W[ %dr %o16 ], %sr", "* ( u32 * ) ( %dr %o16 ) = %sr", + {BPF_INSN_STXWR, "stxw%W[ %dr %o16 ], %sr", "* ( u32 * ) ( %dr %o16 ) = %sR", BPF_V1, BPF_CODE, BPF_CLASS_STX|BPF_SIZE_W|BPF_MODE_MEM}, {BPF_INSN_STXDWR, "stxdw%W[ %dr %o16 ] , %sr", "* ( u64 * ) ( %dr %o16 ) = %sr", BPF_V1, BPF_CODE, BPF_CLASS_STX|BPF_SIZE_DW|BPF_MODE_MEM},