From patchwork Fri Dec 10 14:26:38 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roger Sayle X-Patchwork-Id: 48784 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 21A16385781E for ; Fri, 10 Dec 2021 14:26:57 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from server.nextmovesoftware.com (server.nextmovesoftware.com [162.254.253.69]) by sourceware.org (Postfix) with ESMTPS id 1FA9F3858403 for ; Fri, 10 Dec 2021 14:26:40 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 1FA9F3858403 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=nextmovesoftware.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=nextmovesoftware.com DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=nextmovesoftware.com; s=default; h=Content-Type:MIME-Version:Message-ID: Date:Subject:To:From:Sender:Reply-To:Cc:Content-Transfer-Encoding:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:In-Reply-To:References:List-Id:List-Help:List-Unsubscribe: List-Subscribe:List-Post:List-Owner:List-Archive; bh=Scdvx1WzHAhjvzYCGF+0kM9mi98ESFPU43WXpCKHu4A=; b=nENRm6aMcRKpergYg0HpLn/qU2 eeCiVqgLcJTZvtbZXeS+NHG0byLZnHsUYhaVCyoIPZyp0q5LSNKY8TGTe2cDnG7zWGgRZAZA1+ujn 7uF/AxV4YWzMS05L6QaNmzVpbCOoRgVGaoKZ/je5xDDU38luU0M2wmW08VtMbRYFJ0q4pbSACmUDX zoBvMhCOB+ya+22Tu+fLG1oXwGkmZLbcSLkRC3JQpmfJBk+dqukJOPB3nDnYdN0LVRa4wcfEW2Ncf uk5PiuEsJfeUJ5TjI8uWBKDisf2H3Tbs77VZVkkSADhNE+u1HoLOLnxyKc9Q22nNi0Qm30SQYoAbF CqVYnMKg==; Received: from [185.62.158.67] (port=60518 helo=Dell) by server.nextmovesoftware.com with esmtpsa (TLS1.2) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1mvgr9-0000tF-KB for gcc-patches@gcc.gnu.org; Fri, 10 Dec 2021 09:26:39 -0500 From: "Roger Sayle" To: "'GCC Patches'" Subject: [PATCH] Improved handling of REG_UNUSED notes on PARALLEL in try_combine. Date: Fri, 10 Dec 2021 14:26:38 -0000 Message-ID: <002301d7edd1$f218fa70$d64aef50$@nextmovesoftware.com> MIME-Version: 1.0 X-Mailer: Microsoft Outlook 16.0 Thread-Index: Adft0MsY90fNoxXjQC2vXNqDKotp2g== Content-Language: en-gb X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - server.nextmovesoftware.com X-AntiAbuse: Original Domain - gcc.gnu.org X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - nextmovesoftware.com X-Get-Message-Sender-Via: server.nextmovesoftware.com: authenticated_id: roger@nextmovesoftware.com X-Authenticated-Sender: server.nextmovesoftware.com: roger@nextmovesoftware.com X-Source: X-Source-Args: X-Source-Dir: X-Spam-Status: No, score=-12.2 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org Sender: "Gcc-patches" This patch is the middle-end piece of a set of patches for PR target/43892, that improves combine's ability to optimize instructions with multiple side-effects, such as updating explicit carry (flag) registers. In RTL, an instruction that updates multiple registers is represented as a PARALLEL of several SETs, such as PowerPC's subfc instruction: (insn 80 79 81 4 (parallel [ (set (reg:SI 143) (minus:SI (reg/v:SI 142 [ ]) (reg:SI 141 [ _16 ]))) (set (reg:SI 98 ca) (leu:SI (reg:SI 141 [ _16 ]) (reg/v:SI 142 [ ]))) ]) "../pr43892.c":8:6 104 {subfsi3_carry} (expr_list:REG_DEAD (reg:SI 141 [ _16 ]) (expr_list:REG_UNUSED (reg:SI 143) (nil)))) As shown above, it's relatively common for only one of the results of these instructions to be used, and the other destination register(s) ignored, annotated with a REG_UNUSED note (as above). This patch teaches combine to take advantage of these REG_UNUSED annotations when trying to simplify instruction sequences. Currently, these annotations are ignored and the useless SETs preserved in try_combine's combination attempts: Trying 79 -> 80: 79: r142:SI=r139:SI+r141:SI REG_DEAD r139:SI 80: {r143:SI=r142:SI-r141:SI;ca:SI=leu(r141:SI,r142:SI);} REG_DEAD r141:SI REG_UNUSED r143:SI Failed to match this instruction: (parallel [ (set (reg:SI 143) (reg/v:SI 139 [ ])) (set (reg:SI 98 ca) (geu:SI (plus:SI (reg/v:SI 139 [ ]) (reg:SI 141 [ _16 ])) (reg/v:SI 139 [ ]))) (set (reg/v:SI 142 [ ]) (plus:SI (reg/v:SI 139 [ ]) (reg:SI 141 [ _16 ]))) ]) Notice that the combined/fused instruction passed to recog contains a (set (reg:SI 143) (reg:139)), even though r143 was marked as unused in the input sequence. Fortunately, it's trivial to prune these vestigial SETs, using the logic in single_set to determine that only one of the SETs in a PARALLEL is useful, or expressed another way, that the parallel can be simplified to the single_set. This patch has been tested on x86_64-pc-linux-gnu with a make bootstrap and make -k check with no new failures, and in combination with other patches on powerpc64-unknown-linux-gnu (c.f. https://gcc.gnu.org/pipermail/gcc-patches/2021-December/585977.html) I'll include a testcase for this functionality with the final rs6000 backend patch in the series. Ok for mainline? 2021-12-10 Roger Sayle gcc/ChangeLog * combine.c (try_combine): When I2 or I3 is PARALLEL without clobbers that is effectively just a single_set, just use that SET during the recombination/fusion attempt. Thanks in advance, Roger diff --git a/gcc/combine.c b/gcc/combine.c index 03e9a78..07f70b3 100644 --- a/gcc/combine.c +++ b/gcc/combine.c @@ -2901,6 +2901,17 @@ try_combine (rtx_insn *i3, rtx_insn *i2, rtx_insn *i1, rtx_insn *i0, alloc_insn_link (i1, regno, LOG_LINKS (i2))); } + /* If I2 is a PARALLEL with only one useful SET and without clobbers, + transform I2 into that SET. */ + if (GET_CODE (PATTERN (i2)) == PARALLEL + && GET_CODE (XVECEXP (PATTERN (i2), 0, XVECLEN (PATTERN (i2), 0) - 1)) + != CLOBBER) + { + rtx tmp = single_set (i2); + if (tmp) + SUBST (PATTERN (i2), tmp); + } + /* If I2 is a PARALLEL of two SETs of REGs (and perhaps some CLOBBERs), make those two SETs separate I1 and I2 insns, and make an I0 that is the original I1. */ @@ -3389,6 +3400,18 @@ try_combine (rtx_insn *i3, rtx_insn *i2, rtx_insn *i1, rtx_insn *i0, int extra_sets = added_sets_0 + added_sets_1 + added_sets_2; combine_extras++; + /* If I3 was a PARALLEL with only one useful SET, we can discard + the other SETs now before constructing the new PARALLEL. */ + if (GET_CODE (newpat) == PARALLEL + && newpat == PATTERN (i3) + && GET_CODE (XVECEXP (newpat, 0, XVECLEN (newpat, 0) - 1)) + != CLOBBER) + { + rtx tmp = single_set (i3); + if (tmp) + newpat = tmp; + } + if (GET_CODE (newpat) == PARALLEL) { rtvec old = XVEC (newpat, 0);