From patchwork Wed Dec 8 06:47:03 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Jiang, Haochen" X-Patchwork-Id: 48625 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 5BE8E3858418 for ; Wed, 8 Dec 2021 06:47:38 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 5BE8E3858418 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1638946058; bh=GeisludhpddSh15ulr7JGk0skiMh6d4978+U82bLF2A=; h=To:Subject:Date:List-Id:List-Unsubscribe:List-Archive:List-Post: List-Help:List-Subscribe:From:Reply-To:Cc:From; b=Ts5r9/PQh0lGji8onhfaHn/crDDaHopgqWAGiwPNPKN9BqJF8YZ9TszPLNanD6F/K vSOD9x96GWjhnyRdS2mU16A0l82Sgksus1iQxky1bDsJh9BQNZBeOcadGoGM4Uz6Js WtXBS87tS0CFatpECX2Hk2Ei5zmTL+KCcvE36CAw= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by sourceware.org (Postfix) with ESMTPS id 990373858D3C for ; Wed, 8 Dec 2021 06:47:07 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 990373858D3C X-IronPort-AV: E=McAfee;i="6200,9189,10191"; a="225027091" X-IronPort-AV: E=Sophos;i="5.87,296,1631602800"; d="scan'208";a="225027091" Received: from orsmga006.jf.intel.com ([10.7.209.51]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Dec 2021 22:47:06 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.87,296,1631602800"; d="scan'208";a="462652570" Received: from scymds01.sc.intel.com ([10.148.94.138]) by orsmga006.jf.intel.com with ESMTP; 07 Dec 2021 22:47:06 -0800 Received: from shliclel320.sh.intel.com (shliclel320.sh.intel.com [10.239.236.50]) by scymds01.sc.intel.com with ESMTP id 1B86l41r002411; Tue, 7 Dec 2021 22:47:05 -0800 To: gcc-patches@gcc.gnu.org Subject: [PATCH] [i386]Add combine splitter to transform vashr/vlshr/vashl_optab to ashr/lshr/ashl_optab for const vector duplicate operand. Date: Wed, 8 Dec 2021 14:47:03 +0800 Message-Id: <20211208064703.90991-1-haochen.jiang@intel.com> X-Mailer: git-send-email 2.18.1 X-Spam-Status: No, score=-11.6 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_NONE, KAM_DMARC_STATUS, KAM_LAZY_DOMAIN_SECURITY, KAM_SHORT, RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Haochen Jiang via Gcc-patches From: "Jiang, Haochen" Reply-To: Haochen Jiang Cc: hongtao.liu@intel.com Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org Sender: "Gcc-patches" Hi, This patch add combine splitter to transform vashr/vlshr/vashl_optab to ashr/lshr/ashl_optab for const vector duplicate operand. Regtested on x86_64-pc-linux-gnu. Ok for trunk? BRs, Haochen gcc/ChangeLog: PR target/101796 * config/i386/predicates.md (const_vector_operand): Add new predicate. * config/i386/sse.md(3): Add new define_split below. gcc/testsuite/ChangeLog: PR target/101796 * gcc.target/i386/pr101796-1.c: New test. --- gcc/config/i386/predicates.md | 13 +++++++++++++ gcc/config/i386/sse.md | 14 ++++++++++++++ gcc/testsuite/gcc.target/i386/pr101796-1.c | 20 ++++++++++++++++++++ 3 files changed, 47 insertions(+) create mode 100755 gcc/testsuite/gcc.target/i386/pr101796-1.c diff --git a/gcc/config/i386/predicates.md b/gcc/config/i386/predicates.md index 4ccbe11b842..770e2f0c0dd 100644 --- a/gcc/config/i386/predicates.md +++ b/gcc/config/i386/predicates.md @@ -1844,6 +1844,19 @@ return true; }) +;; Return true if OP is a const vector with duplicate value. +(define_predicate "const_vector_duplicate_operand" + (match_code "const_vector") +{ + rtx elt = XVECEXP (op, 0, 0); + int i, nelt = XVECLEN (op, 0); + + for (i = 1; i < nelt; ++i) + if (!rtx_equal_p (elt, XVECEXP (op, 0, i))) + return false; + return true; +}) + ;; Return true if OP is a parallel for a vbroadcast permute. (define_predicate "avx_vbroadcast_operand" (and (match_code "parallel") diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index 08bdcddc111..a2c0c1209c7 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -15232,6 +15232,20 @@ (const_string "0"))) (set_attr "mode" "")]) +;; PR target/101796: Transfrom movl+vpbranchcastw+vpsravw to vpsraw +;; when COUNT is immediate. +(define_split + [(set (match_operand:VI248_AVX512BW 0 "register_operand") + (any_shift:VI248_AVX512BW + (match_operand:VI248_AVX512BW 1 "nonimmediate_operand") + (match_operand:VI248_AVX512BW 2 "const_vector_duplicate_operand")))] + "TARGET_AVX512F && GET_MODE_UNIT_BITSIZE (mode) + > INTVAL (XVECEXP (operands[2], 0, 0))" + [(set (match_dup 0) + (any_shift:VI248_AVX512BW + (match_dup 1) + (match_dup 3)))] + "operands[3] = XVECEXP (operands[2], 0, 0);") (define_expand "vec_shl_" [(set (match_dup 3) diff --git a/gcc/testsuite/gcc.target/i386/pr101796-1.c b/gcc/testsuite/gcc.target/i386/pr101796-1.c new file mode 100755 index 00000000000..32ae5909913 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr101796-1.c @@ -0,0 +1,20 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512bw" } */ +/* { dg-final {scan-assembler-times "vpsrlw\[ \\t\]" 1 } } */ +/* { dg-final {scan-assembler-times "vpsllw\[ \\t\]" 1 } } */ +/* { dg-final {scan-assembler-times "vpsraw\[ \\t\]" 1 } } */ +/* { dg-final {scan-assembler-not "vpbroadcastw\[ \\t\]" } } */ +/* { dg-final {scan-assembler-not "vpsrlvw\[ \\t\]" } } */ +/* { dg-final {scan-assembler-not "vpsllvw\[ \\t\]" } } */ +/* { dg-final {scan-assembler-not "vpsravw\[ \\t\]" } } */ +#include + +volatile __m512i a, b; + +void +foo() +{ + b = _mm512_srlv_epi16 (a, _mm512_set1_epi16 (3)); + b = _mm512_sllv_epi16 (a, _mm512_set1_epi16 (4)); + b = _mm512_srav_epi16 (a, _mm512_set1_epi16 (5)); +}