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Fri, 05 Dec 2025 05:03:20 +0000 Received: from smtpav03.wdc07v.mail.ibm.com (smtpav03.wdc07v.mail.ibm.com [10.39.53.230]) by smtprelay05.dal12v.mail.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 5B553H4x29819392 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Fri, 5 Dec 2025 05:03:18 GMT Received: from smtpav03.wdc07v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id AFFA05805D; Fri, 5 Dec 2025 05:03:17 +0000 (GMT) Received: from smtpav03.wdc07v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id AC8975805C; Fri, 5 Dec 2025 05:03:16 +0000 (GMT) Received: from cowardly-lion.the-meissners.org (unknown [9.61.151.62]) by smtpav03.wdc07v.mail.ibm.com (Postfix) with ESMTPS; Fri, 5 Dec 2025 05:03:16 +0000 (GMT) Date: Fri, 5 Dec 2025 00:03:14 -0500 From: Michael Meissner To: gcc-patches@gcc.gnu.org, Michael Meissner , Segher Boessenkool , jeevitha , Surya Kumari Jangala , Kishan Parmar , Avinash Jayakar , Ayappan Perumal , Juergen Christ Subject: [PATCH V10] Add -mcpu=future to the PowerPC Message-ID: Mail-Followup-To: Michael Meissner , gcc-patches@gcc.gnu.org, Segher Boessenkool , jeevitha , Surya Kumari Jangala , Kishan Parmar , Avinash Jayakar , Ayappan Perumal , Juergen Christ MIME-Version: 1.0 Content-Disposition: inline X-TM-AS-GCONF: 00 X-Authority-Analysis: v=2.4 cv=dK+rWeZb c=1 sm=1 tr=0 ts=69326799 cx=c_pps a=3Bg1Hr4SwmMryq2xdFQyZA==:117 a=3Bg1Hr4SwmMryq2xdFQyZA==:17 a=kj9zAlcOel0A:10 a=wP3pNCr1ah4A:10 a=VkNPw1HP01LnGYTKEx00:22 a=VnNF1IyMAAAA:8 a=l_L7oT7Ewqm4Ofuwli8A:9 a=CjuIK1q_8ugA:10 X-Proofpoint-GUID: GUIXWXJfGP_tuinEa0YP4Wqn40NwSLGz X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMTI5MDAyMCBTYWx0ZWRfX2bxQMjojsW1q PP3q49CEsQQJ0zv/MxVvkxBaUzs/Hp4woZ8pqrZU/cYc0r43DYuqCWUDGim0OrZstwtVLOWeLHU W7/ZHG79ScbDCLJpiq4nP38RQZLXTVCce0NPrcodxCRx3xf3naU9t6q4SMo4s+POr7HHTCqnN3f HB1XqGusu2GGbtIu0TumbICvrl3PXVkuZQ92lzlTnempKVznujRNvyK9qTqeuUFAS1uB+oE1C0K oSGnA4jF4nRUqJaz0zf7xk64GwrGlTzwZ9uROlxTphijQv9AcpKt1XBJ0Jkow+66nqjkiLiAY07 Dfr47cSjhAMPTuQqilDqvKI3debhpndqSbNeItBWSYHvjy93rFeaCo4zmZ3sq1GXqNP86AX3oIX 4+frU1eML9FVw84MHADEtckM965wEg== X-Proofpoint-ORIG-GUID: GUIXWXJfGP_tuinEa0YP4Wqn40NwSLGz X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.100.49 definitions=2025-12-05_01,2025-12-04_04,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 lowpriorityscore=0 clxscore=1015 priorityscore=1501 bulkscore=0 adultscore=0 phishscore=0 impostorscore=0 spamscore=0 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2510240000 definitions=main-2511290020 X-Spam-Status: No, score=-12.0 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, RCVD_IN_DNSWL_LOW, RCVD_IN_MSPIKE_H4, RCVD_IN_MSPIKE_WL, RCVD_IN_VALIDITY_RPBL_BLOCKED, RCVD_IN_VALIDITY_SAFE_BLOCKED, SPF_HELO_NONE, SPF_PASS, TXREP, URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces~patchwork=sourceware.org@gcc.gnu.org This patch adds support for a new PowerPC cpu (future). Until it is announced, the features of future processors may be changed. These patches allow people to use the new features of processors being developed. If/when the a processor is announced that has the features, future GCC revisions will be modified to add support for that new machine. If the features provided by -mcpu=future are incorporated into an official PowerPC server, this option will be renamed to the official name for that platform. This is version 10 of the -mcpu=future patch. If the user uses -mcpu=future, -mfuture is passed to the assembler. I added support so that if GCC is configured with the --with-cpu=future option is used, it will set the default cpu type. Can I check this patch into the GCC trunk? I have built bootstrap builds on both a little endian Power10 system and a big endian Power9 system and there were no regressions. On the little endian Power10 system, I built the last run using the --with-cpu=future configuration option. 2025-12-05 Michael Meissner gcc/ * config.gcc (powerpc*-*-*): Add support for -mcpu=future. * config/rs6000/aix71.h (ASM_CPU_SPEC): Add support for -mcpu=future. * config/rs6000/aix72.h (ASM_CPU_SPEC): Likewise. * config/rs6000/aix73.h (ASM_CPU_SPEC): Likewise. * config/rs6000/rs6000-c.cc (rs6000_target_modify_macros): Define _ARCH_FUTURE if -mcpu=future. * config/rs6000/rs6000-cpus.def (FUTURE_MASKS_SERVER): New macro. (POWERPC_MASKS): Add OPTION_MASK_FUTURE. (rs6000_cpu_opt_value): New entry for 'future' via the RS6000_CPU macro. * config/rs6000/rs6000-opts.h (PROCESSOR_FUTURE): New macro. * config/rs6000/rs6000-tables.opt: Regenerate. * config/rs6000/rs6000.cc (rs6000_machine_from_flags) If -mcpu=future, set the .machine directive to "future". (rs6000_opt_masks): Add entry for -mfuture. * config/rs6000/rs6000.h (ASM_CPU_SPEC): Add support for -mcpu=future. * config/rs6000/rs6000.opt (-mfuture): New option. * doc/invoke.texi (IBM RS/6000 and PowerPC Options): Document -mcpu=future. gcc/testsuite/ * gcc.target/powerpc/future-1.c: New test. * gcc.target/powerpc/future-2.c: Likewise. --- gcc/config.gcc | 4 ++-- gcc/config/rs6000/aix71.h | 1 + gcc/config/rs6000/aix72.h | 1 + gcc/config/rs6000/aix73.h | 1 + gcc/config/rs6000/rs6000-c.cc | 2 ++ gcc/config/rs6000/rs6000-cpus.def | 6 ++++++ gcc/config/rs6000/rs6000-opts.h | 2 ++ gcc/config/rs6000/rs6000-tables.opt | 11 ++++++---- gcc/config/rs6000/rs6000.cc | 3 +++ gcc/config/rs6000/rs6000.h | 1 + gcc/config/rs6000/rs6000.opt | 5 +++++ gcc/doc/invoke.texi | 2 +- gcc/testsuite/gcc.target/powerpc/future-1.c | 13 +++++++++++ gcc/testsuite/gcc.target/powerpc/future-2.c | 24 +++++++++++++++++++++ 14 files changed, 69 insertions(+), 7 deletions(-) create mode 100644 gcc/testsuite/gcc.target/powerpc/future-1.c create mode 100644 gcc/testsuite/gcc.target/powerpc/future-2.c diff --git a/gcc/config.gcc b/gcc/config.gcc index fb465dac147..74b6aee9656 100644 --- a/gcc/config.gcc +++ b/gcc/config.gcc @@ -543,7 +543,7 @@ powerpc*-*-*) extra_headers="${extra_headers} ppu_intrinsics.h spu2vmx.h vec_types.h si2vmx.h" extra_headers="${extra_headers} amo.h" case x$with_cpu in - xpowerpc64|xdefault64|x6[23]0|x970|xG5|xpower[3456789]|xpower1[01]|xpower6x|xrs64a|xcell|xa2|xe500mc64|xe5500|xe6500) + xpowerpc64|xdefault64|x6[23]0|x970|xG5|xpower[3456789]|xpower1[01]|xpower6x|xrs64a|xcell|xa2|xe500mc64|xe5500|xe6500|xfuture) cpu_is_64bit=yes ;; esac @@ -5750,7 +5750,7 @@ case "${target}" in tm_defines="${tm_defines} CONFIG_PPC405CR" eval "with_$which=405" ;; - "" | common | native \ + "" | common | native | future \ | power[3456789] | power1[01] | power5+ | power6x \ | powerpc | powerpc64 | powerpc64le \ | rs64 \ diff --git a/gcc/config/rs6000/aix71.h b/gcc/config/rs6000/aix71.h index 2b21dd7cd1e..77651f5ea30 100644 --- a/gcc/config/rs6000/aix71.h +++ b/gcc/config/rs6000/aix71.h @@ -79,6 +79,7 @@ do { \ #undef ASM_CPU_SPEC #define ASM_CPU_SPEC \ "%{mcpu=native: %(asm_cpu_native); \ + mcpu=future: -mfuture; \ mcpu=power11: -mpwr11; \ mcpu=power10: -mpwr10; \ mcpu=power9: -mpwr9; \ diff --git a/gcc/config/rs6000/aix72.h b/gcc/config/rs6000/aix72.h index 53c0bde5ad4..652f60c7f49 100644 --- a/gcc/config/rs6000/aix72.h +++ b/gcc/config/rs6000/aix72.h @@ -79,6 +79,7 @@ do { \ #undef ASM_CPU_SPEC #define ASM_CPU_SPEC \ "%{mcpu=native: %(asm_cpu_native); \ + mcpu=future: -mfuture; \ mcpu=power11: -mpwr11; \ mcpu=power10: -mpwr10; \ mcpu=power9: -mpwr9; \ diff --git a/gcc/config/rs6000/aix73.h b/gcc/config/rs6000/aix73.h index c7639368a26..3c66ac1d917 100644 --- a/gcc/config/rs6000/aix73.h +++ b/gcc/config/rs6000/aix73.h @@ -79,6 +79,7 @@ do { \ #undef ASM_CPU_SPEC #define ASM_CPU_SPEC \ "%{mcpu=native: %(asm_cpu_native); \ + mcpu=future: -mfuture; \ mcpu=power11: -mpwr11; \ mcpu=power10: -mpwr10; \ mcpu=power9: -mpwr9; \ diff --git a/gcc/config/rs6000/rs6000-c.cc b/gcc/config/rs6000/rs6000-c.cc index d3b0a566821..6757a2477ad 100644 --- a/gcc/config/rs6000/rs6000-c.cc +++ b/gcc/config/rs6000/rs6000-c.cc @@ -437,6 +437,8 @@ rs6000_target_modify_macros (bool define_p, HOST_WIDE_INT flags) rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR10"); if ((flags & OPTION_MASK_POWER11) != 0) rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR11"); + if ((flags & OPTION_MASK_FUTURE) != 0) + rs6000_define_or_undefine_macro (define_p, "_ARCH_FUTURE"); if ((flags & OPTION_MASK_SOFT_FLOAT) != 0) rs6000_define_or_undefine_macro (define_p, "_SOFT_FLOAT"); if ((flags & OPTION_MASK_RECIP_PRECISION) != 0) diff --git a/gcc/config/rs6000/rs6000-cpus.def b/gcc/config/rs6000/rs6000-cpus.def index 4a1037616d7..6e5d6c2ed23 100644 --- a/gcc/config/rs6000/rs6000-cpus.def +++ b/gcc/config/rs6000/rs6000-cpus.def @@ -83,6 +83,10 @@ #define POWER11_MASKS_SERVER (ISA_3_1_MASKS_SERVER \ | OPTION_MASK_POWER11) +/* -mcpu=future flags. */ +#define FUTURE_MASKS_SERVER (POWER11_MASKS_SERVER \ + | OPTION_MASK_FUTURE) + /* Flags that need to be turned off if -mno-vsx. */ #define OTHER_VSX_VECTOR_MASKS (OPTION_MASK_EFFICIENT_UNALIGNED_VSX \ | OPTION_MASK_FLOAT128_KEYWORD \ @@ -121,6 +125,7 @@ | OPTION_MASK_FPRND \ | OPTION_MASK_POWER10 \ | OPTION_MASK_POWER11 \ + | OPTION_MASK_FUTURE \ | OPTION_MASK_P10_FUSION \ | OPTION_MASK_HTM \ | OPTION_MASK_ISEL \ @@ -249,6 +254,7 @@ RS6000_CPU ("power9", PROCESSOR_POWER9, MASK_POWERPC64 | ISA_3_0_MASKS_SERVER | OPTION_MASK_HTM) RS6000_CPU ("power10", PROCESSOR_POWER10, MASK_POWERPC64 | ISA_3_1_MASKS_SERVER) RS6000_CPU ("power11", PROCESSOR_POWER11, MASK_POWERPC64 | POWER11_MASKS_SERVER) +RS6000_CPU ("future", PROCESSOR_FUTURE, MASK_POWERPC64 | FUTURE_MASKS_SERVER) RS6000_CPU ("powerpc", PROCESSOR_POWERPC, 0) RS6000_CPU ("powerpc64", PROCESSOR_POWERPC64, OPTION_MASK_PPC_GFXOPT | MASK_POWERPC64) diff --git a/gcc/config/rs6000/rs6000-opts.h b/gcc/config/rs6000/rs6000-opts.h index c31d2975f04..e13ba2ba527 100644 --- a/gcc/config/rs6000/rs6000-opts.h +++ b/gcc/config/rs6000/rs6000-opts.h @@ -71,6 +71,8 @@ enum processor_type PROCESSOR_TITAN }; +/* For now, just use power11 as the base processor for -mcpu=future. */ +#define PROCESSOR_FUTURE PROCESSOR_POWER11 /* Types of costly dependences. */ enum rs6000_dependence_cost diff --git a/gcc/config/rs6000/rs6000-tables.opt b/gcc/config/rs6000/rs6000-tables.opt index f5bbed5ea74..518324e7aea 100644 --- a/gcc/config/rs6000/rs6000-tables.opt +++ b/gcc/config/rs6000/rs6000-tables.opt @@ -189,14 +189,17 @@ EnumValue Enum(rs6000_cpu_opt_value) String(power11) Value(53) EnumValue -Enum(rs6000_cpu_opt_value) String(powerpc) Value(54) +Enum(rs6000_cpu_opt_value) String(future) Value(54) EnumValue -Enum(rs6000_cpu_opt_value) String(powerpc64) Value(55) +Enum(rs6000_cpu_opt_value) String(powerpc) Value(55) EnumValue -Enum(rs6000_cpu_opt_value) String(powerpc64le) Value(56) +Enum(rs6000_cpu_opt_value) String(powerpc64) Value(56) EnumValue -Enum(rs6000_cpu_opt_value) String(rs64) Value(57) +Enum(rs6000_cpu_opt_value) String(powerpc64le) Value(57) + +EnumValue +Enum(rs6000_cpu_opt_value) String(rs64) Value(58) diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc index bf899adc531..b5bdf42c3d5 100644 --- a/gcc/config/rs6000/rs6000.cc +++ b/gcc/config/rs6000/rs6000.cc @@ -5913,6 +5913,8 @@ rs6000_machine_from_flags (void) flags &= ~(OPTION_MASK_PPC_GFXOPT | OPTION_MASK_PPC_GPOPT | OPTION_MASK_ISEL | OPTION_MASK_ALTIVEC); + if ((flags & (FUTURE_MASKS_SERVER & ~POWER11_MASKS_SERVER)) != 0) + return "future"; if ((flags & (POWER11_MASKS_SERVER & ~ISA_3_1_MASKS_SERVER)) != 0) return "power11"; if ((flags & (ISA_3_1_MASKS_SERVER & ~ISA_3_0_MASKS_SERVER)) != 0) @@ -24465,6 +24467,7 @@ static struct rs6000_opt_mask const rs6000_opt_masks[] = { "fprnd", OPTION_MASK_FPRND, false, true }, { "power10", OPTION_MASK_POWER10, false, true }, { "power11", OPTION_MASK_POWER11, false, false }, + { "future", OPTION_MASK_FUTURE, false, false }, { "hard-dfp", OPTION_MASK_DFP, false, true }, { "htm", OPTION_MASK_HTM, false, true }, { "isel", OPTION_MASK_ISEL, false, true }, diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h index db6112a09e1..76c6cd1ab8e 100644 --- a/gcc/config/rs6000/rs6000.h +++ b/gcc/config/rs6000/rs6000.h @@ -101,6 +101,7 @@ you make changes here, make them also there. */ #define ASM_CPU_SPEC \ "%{mcpu=native: %(asm_cpu_native); \ + mcpu=future: -mfuture; \ mcpu=power11: -mpower11; \ mcpu=power10: -mpower10; \ mcpu=power9: -mpower9; \ diff --git a/gcc/config/rs6000/rs6000.opt b/gcc/config/rs6000/rs6000.opt index 88cf16ca581..b53d480bf54 100644 --- a/gcc/config/rs6000/rs6000.opt +++ b/gcc/config/rs6000/rs6000.opt @@ -595,6 +595,11 @@ Target Undocumented Mask(POWER10) Var(rs6000_isa_flags) WarnRemoved mpower11 Target Undocumented Mask(POWER11) Var(rs6000_isa_flags) WarnRemoved +;; Potential future machine +mfuture +Target Undocumented Mask(FUTURE) Var(rs6000_isa_flags) Warn(Do not use %<-mfuture>, use %<-mcpu=future>) +Generate (do not generate) potential future instructions. + mprefixed Target Mask(PREFIXED) Var(rs6000_isa_flags) Generate (do not generate) prefixed memory instructions. diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index a6d2b54cc7f..48b2ebc4185 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -32452,7 +32452,7 @@ Supported values for @var{cpu_type} are @samp{401}, @samp{403}, @samp{titan}, @samp{power3}, @samp{power4}, @samp{power5}, @samp{power5+}, @samp{power6}, @samp{power6x}, @samp{power7}, @samp{power8}, @samp{power9}, @samp{power10}, @samp{power11}, @samp{powerpc}, @samp{powerpc64}, -@samp{powerpc64le}, @samp{rs64}, and @samp{native}. +@samp{powerpc64le}, @samp{rs64}, @samp{future}, and @samp{native}. @option{-mcpu=powerpc}, @option{-mcpu=powerpc64}, and @option{-mcpu=powerpc64le} specify pure 32-bit PowerPC (either diff --git a/gcc/testsuite/gcc.target/powerpc/future-1.c b/gcc/testsuite/gcc.target/powerpc/future-1.c new file mode 100644 index 00000000000..7bd8e5ddbd0 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/future-1.c @@ -0,0 +1,13 @@ +/* { dg-do compile } */ +/* { dg-options "-mdejagnu-cpu=future -O2" } */ + +/* Basic check to see if the compiler supports -mcpu=future and if it defines + _ARCH_FUTURE. */ + +#ifndef _ARCH_FUTURE +#error "-mcpu=future is not supported" +#endif + +void foo (void) +{ +} diff --git a/gcc/testsuite/gcc.target/powerpc/future-2.c b/gcc/testsuite/gcc.target/powerpc/future-2.c new file mode 100644 index 00000000000..5552cefa3c2 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/future-2.c @@ -0,0 +1,24 @@ +/* { dg-do compile } */ +/* { dg-options "-O2" } */ + +/* Check if we can set the future target via a target attribute. */ + +__attribute__((__target__("cpu=power9"))) +void foo_p9 (void) +{ +} + +__attribute__((__target__("cpu=power10"))) +void foo_p10 (void) +{ +} + +__attribute__((__target__("cpu=power11"))) +void foo_p11 (void) +{ +} + +__attribute__((__target__("cpu=future"))) +void foo_future (void) +{ +}