From patchwork Tue Dec 2 11:17:34 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: mengqinggang X-Patchwork-Id: 125751 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from vm01.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 916D74C31873 for ; Tue, 2 Dec 2025 11:21:44 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 916D74C31873 X-Original-To: binutils@sourceware.org Delivered-To: binutils@sourceware.org Received: from mail.loongson.cn (mail.loongson.cn [114.242.206.163]) by sourceware.org (Postfix) with ESMTP id 9A8E24BB3BCC for ; Tue, 2 Dec 2025 11:21:09 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 9A8E24BB3BCC Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=loongson.cn Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=loongson.cn ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 9A8E24BB3BCC Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=114.242.206.163 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1764674470; cv=none; b=cYGepXlWctADsznJgnrqsPr9ZtM1uIv91a6JHr0l3rfSVeVIKy8wAcxjxiBsL5tbA30N4agEH3x/LQj/pl1EHct05xx8Y3k4K7e+5pBcbkbHngxyb8y5ZmjEEFoLyLcILZft4mgSc+ETzmtG4IC8MgeqpcRgcX2QGqf6fIpceSk= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1764674470; c=relaxed/simple; bh=KfF5o8xA+ZC7dzwoPjJaiUQcPcQGR3IGld+YnbpmXE0=; h=From:To:Subject:Date:Message-Id:MIME-Version; b=iJkY+fGaIuwaHevlK2tTnnx0yb//bk9RifkPK0RJVzNWWHTw2/BPxw4ki3cvFr1NHEVz6e4lrMz7ACtwJfJUx7F8a2r0icWfPVlESw7HzEb1vz5BO+qfYCqx+kEWbWN9T4vkl9+Y6oVKA3gNCYqsMyZVDdF1VCix7Cduz2msPBE= ARC-Authentication-Results: i=1; server2.sourceware.org DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 9A8E24BB3BCC Received: from loongson.cn (unknown [10.2.6.7]) by gateway (Coremail) with SMTP id _____8Bx37+ayy5p90gqAA--.23327S3; Tue, 02 Dec 2025 19:20:58 +0800 (CST) Received: from amd9754.. (unknown [10.2.6.7]) by front1 (Coremail) with SMTP id qMiowJAx+8CXyy5pZ3xEAQ--.56739S2; Tue, 02 Dec 2025 19:20:56 +0800 (CST) From: mengqinggang To: binutils@sourceware.org Cc: xuchenghua@loongson.cn, chenglulu@loongson.cn, cailulu@loongson.cn, xry111@xry111.site, i.swmail@xen0n.name, maskray@google.com, luweining@loongson.cn, hejinyang@loongson.cn, c@jia.je, mengqinggang@loongson.cn Subject: [PATCH v2 01/12] LoongArch: Enable loongarch_elf64_vec loongarch64_pei_vec on LA32 target Date: Tue, 2 Dec 2025 19:17:34 +0800 Message-Id: <20251202111745.1558349-2-mengqinggang@loongson.cn> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20251202111745.1558349-1-mengqinggang@loongson.cn> References: <20251202111745.1558349-1-mengqinggang@loongson.cn> MIME-Version: 1.0 X-CM-TRANSID: qMiowJAx+8CXyy5pZ3xEAQ--.56739S2 X-CM-SenderInfo: 5phqw15lqjwttqj6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== X-Spam-Status: No, score=-12.9 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, RCVD_IN_DNSWL_BLOCKED, RCVD_IN_VALIDITY_RPBL_BLOCKED, RCVD_IN_VALIDITY_SAFE_BLOCKED, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: binutils-bounces~patchwork=sourceware.org@sourceware.org Fix -march=loongarch64 error on LA32 target. --- bfd/config.bfd | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/bfd/config.bfd b/bfd/config.bfd index 7343f7cb367..4a0b7886acc 100644 --- a/bfd/config.bfd +++ b/bfd/config.bfd @@ -1472,7 +1472,7 @@ case "${targ}" in #ifdef BFD64 loongarch32-*) targ_defvec=loongarch_elf32_vec - targ_selvecs="loongarch_elf32_vec" + targ_selvecs="loongarch_elf32_vec loongarch_elf64_vec loongarch64_pei_vec" want64=true ;; From patchwork Tue Dec 2 11:17:35 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: mengqinggang X-Patchwork-Id: 125752 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from vm01.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id C600D4C31890 for ; Tue, 2 Dec 2025 11:21:45 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org C600D4C31890 X-Original-To: binutils@sourceware.org Delivered-To: binutils@sourceware.org Received: from mail.loongson.cn (mail.loongson.cn [114.242.206.163]) by sourceware.org (Postfix) with ESMTP id 69F7A4BB3BB9 for ; Tue, 2 Dec 2025 11:21:11 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 69F7A4BB3BB9 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=loongson.cn Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=loongson.cn ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 69F7A4BB3BB9 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=114.242.206.163 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1764674472; cv=none; b=W9JQvOaeXOzJIkNzUIcSmb20820kXIvWpEz1Cf+RXhjXZqUGNUWv3tceFnP2XIIkSn7yuLg6ZOaCnhbXTGOToqdtqL6aSebLjsDDPr8CfG0+NeiSa5ntLQGluz+TGluUAAd5wN7KSI+wZfUrnZQlLcoiQR0knZ0rBuePMi5aVls= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1764674472; c=relaxed/simple; bh=N/NOxAKySHKoVnW8DkNbcSRcYWg+nyFUIBbScGQPq/A=; h=From:To:Subject:Date:Message-Id:MIME-Version; b=pgDBftTvNWkwMppoP4tZFCODMgqgd8hvplnHlagFm8Hk+tst0JeTw6Ww2nR5SKGHNpzMeEVGThhKNCIj1Qu+TqtHEQHdRlt6bVqTu4NmcNn7a8zY1ju3oqwPo2oTCeeXaNX8K435yxcpXVnDskOYBv38hUuWLpYasIjhbeUt2+c= ARC-Authentication-Results: i=1; server2.sourceware.org DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 69F7A4BB3BB9 Received: from loongson.cn (unknown [10.2.6.7]) by gateway (Coremail) with SMTP id _____8CxaNGcyy5p_kgqAA--.26002S3; Tue, 02 Dec 2025 19:21:00 +0800 (CST) Received: from amd9754.. (unknown [10.2.6.7]) by front1 (Coremail) with SMTP id qMiowJAxQMKbyy5panxEAQ--.44059S2; Tue, 02 Dec 2025 19:20:59 +0800 (CST) From: mengqinggang To: binutils@sourceware.org Cc: xuchenghua@loongson.cn, chenglulu@loongson.cn, cailulu@loongson.cn, xry111@xry111.site, i.swmail@xen0n.name, maskray@google.com, luweining@loongson.cn, hejinyang@loongson.cn, c@jia.je, mengqinggang@loongson.cn Subject: [PATCH v2 02/12] LoongArch: Change DWARF2_CIE_DATA_ALIGNMENT to -4 for loongarch32 Date: Tue, 2 Dec 2025 19:17:35 +0800 Message-Id: <20251202111745.1558349-3-mengqinggang@loongson.cn> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20251202111745.1558349-1-mengqinggang@loongson.cn> References: <20251202111745.1558349-1-mengqinggang@loongson.cn> MIME-Version: 1.0 X-CM-TRANSID: qMiowJAxQMKbyy5panxEAQ--.44059S2 X-CM-SenderInfo: 5phqw15lqjwttqj6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== X-Spam-Status: No, score=-12.9 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, RCVD_IN_DNSWL_BLOCKED, RCVD_IN_VALIDITY_RPBL_BLOCKED, RCVD_IN_VALIDITY_SAFE_BLOCKED, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: binutils-bounces~patchwork=sourceware.org@sourceware.org From: Jiajie Chen --- gas/config/tc-loongarch.c | 5 +++++ gas/config/tc-loongarch.h | 3 ++- 2 files changed, 7 insertions(+), 1 deletion(-) diff --git a/gas/config/tc-loongarch.c b/gas/config/tc-loongarch.c index b006c6e6451..dc03956d792 100644 --- a/gas/config/tc-loongarch.c +++ b/gas/config/tc-loongarch.c @@ -118,6 +118,9 @@ static const char default_arch[] = DEFAULT_ARCH; static bool call36 = 0; +/* The dwarf2 data alignment, adjusted for 32 or 64 bit. */ +int loongarch_cie_data_alignment; + /* The lowest 4-bit is the bytes of instructions. */ #define RELAX_BRANCH_16 0xc0000014 #define RELAX_BRANCH_21 0xc0000024 @@ -515,6 +518,8 @@ md_begin () /* FIXME: expressionS use 'offsetT' as constant, * we want this is 64-bit type. */ assert (8 <= sizeof (offsetT)); + + loongarch_cie_data_alignment = LARCH_opts.ase_lp64 ? (-8) : (-4); } /* Called just before the assembler exits. */ diff --git a/gas/config/tc-loongarch.h b/gas/config/tc-loongarch.h index 38ecd036d34..a2444aae0d1 100644 --- a/gas/config/tc-loongarch.h +++ b/gas/config/tc-loongarch.h @@ -108,7 +108,8 @@ extern bool loongarch_force_relocation_sub_same(struct fix *, asection *); FDE Code Alignment Factor (DWARF2_LINE_MIN_INSN_LENGTH) should be 1 because DW_CFA_advance_loc need to be relocated in bytes when linker relaxation. */ -#define DWARF2_CIE_DATA_ALIGNMENT (-8) +extern int loongarch_cie_data_alignment; +#define DWARF2_CIE_DATA_ALIGNMENT loongarch_cie_data_alignment #define DWARF2_DEFAULT_RETURN_COLUMN 1 /* FDE Return Address Register. */ #define tc_cfi_frame_initial_instructions \ From patchwork Tue Dec 2 11:17:36 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: mengqinggang X-Patchwork-Id: 125753 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from vm01.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id F27D14B1A364 for ; Tue, 2 Dec 2025 11:21:53 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org F27D14B1A364 X-Original-To: binutils@sourceware.org Delivered-To: binutils@sourceware.org Received: from mail.loongson.cn (mail.loongson.cn [114.242.206.163]) by sourceware.org (Postfix) with ESMTP id 339E74BB588C for ; Tue, 2 Dec 2025 11:21:19 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 339E74BB588C Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=loongson.cn Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=loongson.cn ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 339E74BB588C Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=114.242.206.163 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1764674481; cv=none; b=tfJp4nVwN8adXnquX+epyimeim7I/CGcLKaLfWgoqKUPI5AJ2sNvu7xysQphbfC9gtnAUtHFOj3a2vPFyjJs1rlE8lygLRGzg7VvZg7/SlgUv4PqipnG0lz7OYmrTlzmsFvnL0ABSREkTavp1EU9Fl6Lwnhdyh4CsR3F8HTOtJ4= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1764674481; c=relaxed/simple; bh=Gevfe7i/5McoqqgE5uHZTq55rMoUc26DsNL8Ic07dvc=; h=From:To:Subject:Date:Message-Id:MIME-Version; b=gbRyLPLiMb+nUPoc0eHfeEserhgjpiZXpf42mm6HPzeJnuuT7TqCpv8eW+u7YB+Wmk8dIcGS7BAy0S5dMmcpY5uWmYMP/dOd9USLz89IXxK0ezKMHG05SeRwCx5N2z4u08bw5V27spoHPHe/WqJXTe547BwlMv8SLvcZY7ya1fU= ARC-Authentication-Results: i=1; server2.sourceware.org DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 339E74BB588C Received: from loongson.cn (unknown [10.2.6.7]) by gateway (Coremail) with SMTP id _____8CxaNGdyy5pBUkqAA--.26005S3; Tue, 02 Dec 2025 19:21:01 +0800 (CST) Received: from amd9754.. (unknown [10.2.6.7]) by front1 (Coremail) with SMTP id qMiowJAxecCdyy5pbHxEAQ--.28439S2; Tue, 02 Dec 2025 19:21:01 +0800 (CST) From: mengqinggang To: binutils@sourceware.org Cc: xuchenghua@loongson.cn, chenglulu@loongson.cn, cailulu@loongson.cn, xry111@xry111.site, i.swmail@xen0n.name, maskray@google.com, luweining@loongson.cn, hejinyang@loongson.cn, c@jia.je, mengqinggang@loongson.cn Subject: [PATCH v2 03/12] LoongArch: Add R_LARCH_TLS_LE_ADD_R relocation support for add.w Date: Tue, 2 Dec 2025 19:17:36 +0800 Message-Id: <20251202111745.1558349-4-mengqinggang@loongson.cn> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20251202111745.1558349-1-mengqinggang@loongson.cn> References: <20251202111745.1558349-1-mengqinggang@loongson.cn> MIME-Version: 1.0 X-CM-TRANSID: qMiowJAxecCdyy5pbHxEAQ--.28439S2 X-CM-SenderInfo: 5phqw15lqjwttqj6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== X-Spam-Status: No, score=-12.9 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, RCVD_IN_DNSWL_BLOCKED, RCVD_IN_VALIDITY_RPBL_BLOCKED, RCVD_IN_VALIDITY_SAFE_BLOCKED, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: binutils-bounces~patchwork=sourceware.org@sourceware.org Fix compiler error for "add.w $r12,$r12,$r2,%le_add_r(a)". --- opcodes/loongarch-opc.c | 1 + 1 file changed, 1 insertion(+) diff --git a/opcodes/loongarch-opc.c b/opcodes/loongarch-opc.c index fa53021cfae..23aa167e0d4 100644 --- a/opcodes/loongarch-opc.c +++ b/opcodes/loongarch-opc.c @@ -511,6 +511,7 @@ static struct loongarch_opcode loongarch_fix_opcodes[] = { 0x00080000, 0xfffe0000, "bytepick.w", "r0:5,r5:5,r10:5,u15:2", 0, 0, 0, 0 }, { 0x000c0000, 0xfffc0000, "bytepick.d", "r0:5,r5:5,r10:5,u15:3", 0, 0, 0, 0 }, { 0x00100000, 0xffff8000, "add.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, + { 0x00100000, 0xffff8000, "add.w", "r0:5,r5:5,r10:5,t", 0, 0, 0, 0 }, { 0x00108000, 0xffff8000, "add.d", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, { 0x00108000, 0xffff8000, "add.d", "r0:5,r5:5,r10:5,t", 0, 0, 0, 0 }, { 0x00110000, 0xffff8000, "sub.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, From patchwork Tue Dec 2 11:17:37 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: mengqinggang X-Patchwork-Id: 125755 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from vm01.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 8B99E4BBCDB0 for ; Tue, 2 Dec 2025 11:23:08 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 8B99E4BBCDB0 X-Original-To: binutils@sourceware.org Delivered-To: binutils@sourceware.org Received: from mail.loongson.cn (mail.loongson.cn [114.242.206.163]) by sourceware.org (Postfix) with ESMTP id 03C884BB58DF for ; Tue, 2 Dec 2025 11:21:21 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 03C884BB58DF Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=loongson.cn Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=loongson.cn ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 03C884BB58DF Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=114.242.206.163 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1764674483; cv=none; b=blwLW2dUWs/EH9G5GMHPEPCmyBvIjvksA2XLpVaBiaWoJlaZc0keosITiFwu0jkp7i/9UpxNZqw9iC2ixfWiePJi8H6y6BQAv+am2DXf0NTJBHanIxqdVkVHsC62nOGuiZ6QL9IUD0Go/+eRrKzTfiBH2B7QO61VV7Q+IfIlt4o= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1764674483; c=relaxed/simple; bh=VrKQeuJjny96K3rG1IEyuNRtfaXQIgwQ/MikPtXnHjk=; h=From:To:Subject:Date:Message-Id:MIME-Version; b=gn+GRwB6IGAoL7D+4i7kRR5ZAqTx0R/5vijX/2zTEetik1z82WL95wt6b/71yX9HEKVEA37OhI9v4+HfakHSHA+ojwGc0+hZ1+9g3bBWmtCTY2MHPvvwXc5RQu2eMaP4K4yj5i+QtKPJTsfp9r7Pe1uotCzWl9jMWBzGffBXYVU= ARC-Authentication-Results: i=1; server2.sourceware.org DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 03C884BB58DF Received: from loongson.cn (unknown [10.2.6.7]) by gateway (Coremail) with SMTP id _____8BxF9Gfyy5pC0kqAA--.25553S3; Tue, 02 Dec 2025 19:21:03 +0800 (CST) Received: from amd9754.. (unknown [10.2.6.7]) by front1 (Coremail) with SMTP id qMiowJBxpeSeyy5pbXxEAQ--.50048S2; Tue, 02 Dec 2025 19:21:03 +0800 (CST) From: mengqinggang To: binutils@sourceware.org Cc: xuchenghua@loongson.cn, chenglulu@loongson.cn, cailulu@loongson.cn, xry111@xry111.site, i.swmail@xen0n.name, maskray@google.com, luweining@loongson.cn, hejinyang@loongson.cn, c@jia.je, mengqinggang@loongson.cn Subject: [PATCH v2 04/12] LoongArch: Enable all instructions defaultly on LA32/LA64 Date: Tue, 2 Dec 2025 19:17:37 +0800 Message-Id: <20251202111745.1558349-5-mengqinggang@loongson.cn> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20251202111745.1558349-1-mengqinggang@loongson.cn> References: <20251202111745.1558349-1-mengqinggang@loongson.cn> MIME-Version: 1.0 X-CM-TRANSID: qMiowJBxpeSeyy5pbXxEAQ--.50048S2 X-CM-SenderInfo: 5phqw15lqjwttqj6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== X-Spam-Status: No, score=-12.9 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, RCVD_IN_DNSWL_BLOCKED, RCVD_IN_VALIDITY_RPBL_BLOCKED, RCVD_IN_VALIDITY_SAFE_BLOCKED, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: binutils-bounces~patchwork=sourceware.org@sourceware.org Glibc checks LSX/LASX support when configure. Kernel has float instructions but with -msoft-float option. --- gas/config/tc-loongarch.c | 85 +++++++++++++++++++-------------------- 1 file changed, 42 insertions(+), 43 deletions(-) diff --git a/gas/config/tc-loongarch.c b/gas/config/tc-loongarch.c index dc03956d792..a37cde9b38c 100644 --- a/gas/config/tc-loongarch.c +++ b/gas/config/tc-loongarch.c @@ -27,6 +27,7 @@ #include "opcode/loongarch.h" #include "obj-elf.h" #include "bfd/elfxx-loongarch.h" +#include "config.h" #include #include #include @@ -181,34 +182,24 @@ int md_parse_option (int c, const char *arg) { int ret = 1; - char lp64[256] = ""; - char ilp32[256] = ""; - - lp64['s'] = lp64['S'] = EF_LOONGARCH_ABI_SOFT_FLOAT; - lp64['f'] = lp64['F'] = EF_LOONGARCH_ABI_SINGLE_FLOAT; - lp64['d'] = lp64['D'] = EF_LOONGARCH_ABI_DOUBLE_FLOAT; - - ilp32['s'] = ilp32['S'] = EF_LOONGARCH_ABI_SOFT_FLOAT; - ilp32['f'] = ilp32['F'] = EF_LOONGARCH_ABI_SINGLE_FLOAT; - ilp32['d'] = ilp32['D'] = EF_LOONGARCH_ABI_DOUBLE_FLOAT; + char fabi[256] = ""; + fabi['s'] = fabi['S'] = EF_LOONGARCH_ABI_SOFT_FLOAT; + fabi['f'] = fabi['F'] = EF_LOONGARCH_ABI_SINGLE_FLOAT; + fabi['d'] = fabi['D'] = EF_LOONGARCH_ABI_DOUBLE_FLOAT; switch (c) { case OPTION_ABI: - if (strncasecmp (arg, "lp64", 4) == 0 && lp64[arg[4] & 0xff] != 0) + if (strncasecmp (arg, "lp64", 4) == 0 && fabi[arg[4] & 0xff] != 0) { LARCH_opts.ase_ilp32 = 1; LARCH_opts.ase_lp64 = 1; - LARCH_opts.ase_lsx = 1; - LARCH_opts.ase_lasx = 1; - LARCH_opts.ase_lvz = 1; - LARCH_opts.ase_lbt = 1; - LARCH_opts.ase_abi = lp64[arg[4] & 0xff]; + LARCH_opts.ase_abi = fabi[arg[4] & 0xff]; } - else if (strncasecmp (arg, "ilp32", 5) == 0 && ilp32[arg[5] & 0xff] != 0) + else if (strncasecmp (arg, "ilp32", 5) == 0 && fabi[arg[5] & 0xff] != 0) { - LARCH_opts.ase_abi = ilp32[arg[5] & 0xff]; LARCH_opts.ase_ilp32 = 1; + LARCH_opts.ase_abi = fabi[arg[5] & 0xff]; } else ret = 0; @@ -284,43 +275,51 @@ static struct htab *cfi_f_htab = NULL; void loongarch_after_parse_args () { - /* Set default ABI/ISA LP64D. */ + /* If no -mabi specified, set ABI by default_arch. */ if (!LARCH_opts.ase_ilp32) { if (strcmp (default_arch, "loongarch64") == 0) { - LARCH_opts.ase_abi = EF_LOONGARCH_ABI_DOUBLE_FLOAT; LARCH_opts.ase_ilp32 = 1; LARCH_opts.ase_lp64 = 1; - LARCH_opts.ase_lsx = 1; - LARCH_opts.ase_lasx = 1; - LARCH_opts.ase_lvz = 1; - LARCH_opts.ase_lbt = 1; } else if (strcmp (default_arch, "loongarch32") == 0) - { - LARCH_opts.ase_abi = EF_LOONGARCH_ABI_DOUBLE_FLOAT; LARCH_opts.ase_ilp32 = 1; - } else as_bad ("unknown default architecture `%s'", default_arch); } - LARCH_opts.ase_abi |= EF_LOONGARCH_OBJABI_V1; - /* Set default ISA double-float. */ - if (!LARCH_opts.ase_nf - && !LARCH_opts.ase_sf - && !LARCH_opts.ase_df) + /* Enable all instructions defaultly. + Glibc checks LSX/LASX support when configure. + Kernel has float instructions but with -msoft-float option. + TODO: SPlit la32/la64 instructions. + TODO: Instruction selection and macro expansion may need + to be controlled by different variables. */ + LARCH_opts.ase_sf = 1; + LARCH_opts.ase_df = 1; + LARCH_opts.ase_lsx = 1; + LARCH_opts.ase_lasx = 1; + LARCH_opts.ase_lvz = 1; + LARCH_opts.ase_lbt = 1; + + /* If no -mabi specified, set e_flags base ABI by target os. */ + if (!LARCH_opts.ase_abi) { - LARCH_opts.ase_sf = 1; - LARCH_opts.ase_df = 1; + if (strcmp (TARGET_OS, "linux-gnusf") == 0) + LARCH_opts.ase_abi = EF_LOONGARCH_ABI_SOFT_FLOAT; + else if (strcmp (TARGET_OS, "linux-gnuf32") == 0) + LARCH_opts.ase_abi = EF_LOONGARCH_ABI_SINGLE_FLOAT; + else if (strcmp (TARGET_OS, "linux-gnu") == 0) + LARCH_opts.ase_abi = EF_LOONGARCH_ABI_DOUBLE_FLOAT; + else + as_fatal (_("unsupport TARGET_OS %s"), TARGET_OS); } - size_t i; - - assert(LARCH_opts.ase_ilp32); + /* Set eflags ABI version to v1 (ABI 2.0). */ + LARCH_opts.ase_abi |= EF_LOONGARCH_OBJABI_V1; /* Init ilp32/lp64 registers names. */ + size_t i; if (!r_htab) r_htab = str_htab_create (); if (!r_deprecated_htab) @@ -390,12 +389,12 @@ loongarch_after_parse_args () str_hash_insert_int (f_deprecated_htab, loongarch_f_alias_deprecated[i], i, 0); - /* The .cfi directive supports register aliases without the "$" prefix. */ - for (i = 0; i < ARRAY_SIZE (loongarch_f_cfi_name); i++) - { - str_hash_insert_int (cfi_f_htab, loongarch_f_cfi_name[i], i, 0); - str_hash_insert_int (cfi_f_htab, loongarch_f_cfi_name_alias[i], i, 0); - } + /* The .cfi directive supports register aliases without the "$" prefix. */ + for (i = 0; i < ARRAY_SIZE (loongarch_f_cfi_name); i++) + { + str_hash_insert_int (cfi_f_htab, loongarch_f_cfi_name[i], i, 0); + str_hash_insert_int (cfi_f_htab, loongarch_f_cfi_name_alias[i], i, 0); + } if (!fc_htab) fc_htab = str_htab_create (); From patchwork Tue Dec 2 11:17:38 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: mengqinggang X-Patchwork-Id: 125756 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from vm01.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 7FA544D108C5 for ; Tue, 2 Dec 2025 11:23:11 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 7FA544D108C5 X-Original-To: binutils@sourceware.org Delivered-To: binutils@sourceware.org Received: from mail.loongson.cn (mail.loongson.cn [114.242.206.163]) by sourceware.org (Postfix) with ESMTP id 91B674BB5883 for ; Tue, 2 Dec 2025 11:21:28 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 91B674BB5883 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=loongson.cn Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=loongson.cn ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 91B674BB5883 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=114.242.206.163 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1764674489; cv=none; b=uRbjC7PmyMt25cs61mERdC8YPQ9YebS0VRcVd+8XzQbGW0K8uHvPpR6Y2Mxx0NPZM67eTcpibM5/lbQOEtJh7ULU2QsOh7lODjBVTzZGxdC0TeVrXm1+EPIa5bVmUM5XJRQNGupuR80kFIzO386/smChDBSn87261AfodF2HGCs= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1764674489; c=relaxed/simple; bh=lu8Tmi6rMQL9JEssv2FAEQkP04/A3k5Dwt2VLrUefEc=; h=From:To:Subject:Date:Message-Id:MIME-Version; b=yAc6gnTDN96gYHblTH25lF7pLUuISsAP55ZMxy72xDxUkq5NzMLy2FFakC/YOnPutS800lyGfQSfdJv32zoASc8UmHF4yBBnpGpV1EBET8LqB5EqI2Nv9gZqESsb2kqCO/2v5yXNjv1mBdjrWWfJGhK34XsgCVWdg39Y5nCQkoI= ARC-Authentication-Results: i=1; server2.sourceware.org DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 91B674BB5883 Received: from loongson.cn (unknown [10.2.6.7]) by gateway (Coremail) with SMTP id _____8BxndKhyy5pEkkqAA--.24878S3; Tue, 02 Dec 2025 19:21:05 +0800 (CST) Received: from amd9754.. (unknown [10.2.6.7]) by front1 (Coremail) with SMTP id qMiowJAxecCgyy5pbnxEAQ--.28440S2; Tue, 02 Dec 2025 19:21:04 +0800 (CST) From: mengqinggang To: binutils@sourceware.org Cc: xuchenghua@loongson.cn, chenglulu@loongson.cn, cailulu@loongson.cn, xry111@xry111.site, i.swmail@xen0n.name, maskray@google.com, luweining@loongson.cn, hejinyang@loongson.cn, c@jia.je, mengqinggang@loongson.cn Subject: [PATCH v2 05/12] LoongArch: Add LA32 and LA32R relocations Date: Tue, 2 Dec 2025 19:17:38 +0800 Message-Id: <20251202111745.1558349-6-mengqinggang@loongson.cn> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20251202111745.1558349-1-mengqinggang@loongson.cn> References: <20251202111745.1558349-1-mengqinggang@loongson.cn> MIME-Version: 1.0 X-CM-TRANSID: qMiowJAxecCgyy5pbnxEAQ--.28440S2 X-CM-SenderInfo: 5phqw15lqjwttqj6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== X-Spam-Status: No, score=-12.8 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, PROLO_LEO2, RCVD_IN_DNSWL_BLOCKED, RCVD_IN_VALIDITY_RPBL_BLOCKED, RCVD_IN_VALIDITY_SAFE_BLOCKED, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: binutils-bounces~patchwork=sourceware.org@sourceware.org LA32 and LA32R do not have pcaddu18i. LA32R does not have pcalau12i. Add R_LARCH_CALL30 for pcaddu12i + jirl used in LA32 and LA32R. Add R_LARCH_*_PCADD_HI20 for pcaddu12i used in LA32R. Add R_LARCH_*_PCADD_LO12 for addi.w/ld.w used in LA32R. --- bfd/bfd-in2.h | 13 +++ bfd/elfnn-loongarch.c | 21 ++-- bfd/elfxx-loongarch.c | 222 ++++++++++++++++++++++++++++++++++++++++ bfd/libbfd.h | 13 +++ bfd/reloc.c | 27 +++++ include/elf/loongarch.h | 35 +++++++ 6 files changed, 318 insertions(+), 13 deletions(-) diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h index 6c05c21a0da..e4e3c26de26 100644 --- a/bfd/bfd-in2.h +++ b/bfd/bfd-in2.h @@ -7453,6 +7453,19 @@ enum bfd_reloc_code_real BFD_RELOC_LARCH_TLS_LD_PCREL20_S2, BFD_RELOC_LARCH_TLS_GD_PCREL20_S2, BFD_RELOC_LARCH_TLS_DESC_PCREL20_S2, + BFD_RELOC_LARCH_CALL30, + BFD_RELOC_LARCH_PCADD_HI20, + BFD_RELOC_LARCH_PCADD_LO12, + BFD_RELOC_LARCH_GOT_PCADD_HI20, + BFD_RELOC_LARCH_GOT_PCADD_LO12, + BFD_RELOC_LARCH_TLS_IE_PCADD_HI20, + BFD_RELOC_LARCH_TLS_IE_PCADD_LO12, + BFD_RELOC_LARCH_TLS_LD_PCADD_HI20, + BFD_RELOC_LARCH_TLS_LD_PCADD_LO12, + BFD_RELOC_LARCH_TLS_GD_PCADD_HI20, + BFD_RELOC_LARCH_TLS_GD_PCADD_LO12, + BFD_RELOC_LARCH_TLS_DESC_PCADD_HI20, + BFD_RELOC_LARCH_TLS_DESC_PCADD_LO12, BFD_RELOC_UNUSED }; typedef enum bfd_reloc_code_real bfd_reloc_code_real_type; diff --git a/bfd/elfnn-loongarch.c b/bfd/elfnn-loongarch.c index ddb809760ab..dd6ac76a042 100644 --- a/bfd/elfnn-loongarch.c +++ b/bfd/elfnn-loongarch.c @@ -5136,9 +5136,8 @@ loongarch_tls_perform_trans (bfd *abfd, asection *sec, if (local_exec) { /* DESC -> LE relaxation: - pcalalau12i $a0,%desc_pc_hi20(var) => - lu12i.w $a0,%le_hi20(var) - */ + pcalau12i $a0,%desc_pc_hi20(var) => + lu12i.w $a0,%le_hi20(var) */ bfd_put (32, abfd, LARCH_OP_LU12I_W | LARCH_RD_A0, contents + rel->r_offset); rel->r_info = ELFNN_R_INFO (r_symndx, R_LARCH_TLS_LE_HI20); @@ -5146,9 +5145,8 @@ loongarch_tls_perform_trans (bfd *abfd, asection *sec, else { /* DESC -> IE relaxation: - pcalalau12i $a0,%desc_pc_hi20(var) => - pcalalau12i $a0,%ie_pc_hi20(var) - */ + pcalau12i $a0,%desc_pc_hi20(var) => + pcalau12i $a0,%ie_pc_hi20(var) */ rel->r_info = ELFNN_R_INFO (r_symndx, R_LARCH_TLS_IE_PC_HI20); } return true; @@ -5158,8 +5156,7 @@ loongarch_tls_perform_trans (bfd *abfd, asection *sec, { /* DESC -> LE relaxation: addi.d $a0,$a0,%desc_pc_lo12(var) => - ori $a0,$a0,le_lo12(var) - */ + ori $a0,$a0,le_lo12(var) */ insn = LARCH_OP_ORI | LARCH_RD_RJ_A0; bfd_put (32, abfd, LARCH_OP_ORI | LARCH_RD_RJ_A0, contents + rel->r_offset); @@ -5181,8 +5178,7 @@ loongarch_tls_perform_trans (bfd *abfd, asection *sec, case R_LARCH_TLS_DESC_CALL: /* DESC -> LE/IE relaxation: ld.d $ra,$a0,%desc_ld(var) => NOP - jirl $ra,$ra,%desc_call(var) => NOP - */ + jirl $ra,$ra,%desc_call(var) => NOP */ rel->r_info = ELFNN_R_INFO (0, R_LARCH_NONE); bfd_put (32, abfd, LARCH_NOP, contents + rel->r_offset); /* link with -relax option will delete NOP. */ @@ -5194,9 +5190,8 @@ loongarch_tls_perform_trans (bfd *abfd, asection *sec, if (local_exec) { /* IE -> LE relaxation: - pcalalau12i $rd,%ie_pc_hi20(var) => - lu12i.w $rd,%le_hi20(var) - */ + pcalau12i $rd,%ie_pc_hi20(var) => + lu12i.w $rd,%le_hi20(var) */ insn = bfd_getl32 (contents + rel->r_offset); bfd_put (32, abfd, LARCH_OP_LU12I_W | LARCH_GET_RD(insn), contents + rel->r_offset); diff --git a/bfd/elfxx-loongarch.c b/bfd/elfxx-loongarch.c index ce1032f30e9..b29ca218f24 100644 --- a/bfd/elfxx-loongarch.c +++ b/bfd/elfxx-loongarch.c @@ -1882,6 +1882,228 @@ static loongarch_reloc_howto_type loongarch_howto_table[] = BFD_RELOC_LARCH_TLS_DESC_PCREL20_S2, /* bfd_reloc_code_real_type. */ reloc_sign_bits, /* adjust_reloc_bits. */ "desc_pcrel_20"), /* larch_reloc_type_name. */ + + /* For LA32R medium call. */ + LOONGARCH_HOWTO (R_LARCH_CALL30, /* type (127). */ + 2, /* rightshift. */ + 8, /* size. */ + 30, /* bitsize. */ + true, /* pc_relative. */ + 0, /* bitpos. */ + complain_overflow_signed, /* complain_on_overflow. */ + bfd_elf_generic_reloc, /* special_function. */ + "R_LARCH_CALL30", /* name. */ + false, /* partial_inplace. */ + 0, /* src_mask. */ + 0x000ffc0001ffffe0, /* dst_mask. */ + false, /* pcrel_offset. */ + BFD_RELOC_LARCH_CALL30, /* bfd_reloc_code_real_type. */ + reloc_sign_bits, /* adjust_reloc_bits. */ + "call30"), /* larch_reloc_type_name. */ + + LOONGARCH_HOWTO (R_LARCH_PCADD_HI20, /* type (128). */ + 12, /* rightshift. */ + 4, /* size. */ + 20, /* bitsize. */ + true, /* pc_relative. */ + 5, /* bitpos. */ + complain_overflow_signed, /* complain_on_overflow. */ + bfd_elf_generic_reloc, /* special_function. */ + "R_LARCH_PCADD_HI20", /* name. */ + false, /* partial_inplace. */ + 0, /* src_mask */ + 0x1ffffe0, /* dst_mask */ + true, /* pcrel_offset */ + BFD_RELOC_LARCH_PCADD_HI20, /* bfd_reloc_code_real_type */ + reloc_bits, /* adjust_reloc_bits */ + "pcadd_hi20"), /* larch_reloc_type_name */ + + LOONGARCH_HOWTO (R_LARCH_PCADD_LO12, /* type (129). */ + 0, /* rightshift. */ + 4, /* size. */ + 12, /* bitsize. */ + false, /* pc_relative. */ + 10, /* bitpos. */ + complain_overflow_signed, /* complain_on_overflow. */ + bfd_elf_generic_reloc, /* special_function. */ + "R_LARCH_PCADD_LO12", /* name. */ + false, /* partial_inplace. */ + 0, /* src_mask */ + 0x3ffc00, /* dst_mask */ + false, /* pcrel_offset */ + BFD_RELOC_LARCH_PCADD_LO12, /* bfd_reloc_code_real_type */ + reloc_bits, /* adjust_reloc_bits */ + "pcadd_lo12"), /* larch_reloc_type_name */ + + LOONGARCH_HOWTO (R_LARCH_GOT_PCADD_HI20, /* type (130). */ + 12, /* rightshift. */ + 4, /* size. */ + 20, /* bitsize. */ + true, /* pc_relative. */ + 5, /* bitpos. */ + complain_overflow_signed, /* complain_on_overflow. */ + bfd_elf_generic_reloc, /* special_function. */ + "R_LARCH_GOT_PCADD_HI20", /* name. */ + false, /* partial_inplace. */ + 0, /* src_mask */ + 0x1ffffe0, /* dst_mask */ + true, /* pcrel_offset */ + BFD_RELOC_LARCH_GOT_PCADD_HI20, /* bfd_reloc_code_real_type */ + reloc_bits, /* adjust_reloc_bits */ + "got_pcadd_hi20"), /* larch_reloc_type_name */ + + LOONGARCH_HOWTO (R_LARCH_GOT_PCADD_LO12, /* type (131). */ + 0, /* rightshift. */ + 4, /* size. */ + 12, /* bitsize. */ + false, /* pc_relative. */ + 10, /* bitpos. */ + complain_overflow_signed, /* complain_on_overflow. */ + bfd_elf_generic_reloc, /* special_function. */ + "R_LARCH_GOT_PCADD_LO12", /* name. */ + false, /* partial_inplace. */ + 0, /* src_mask */ + 0x3ffc00, /* dst_mask */ + false, /* pcrel_offset */ + BFD_RELOC_LARCH_GOT_PCADD_LO12, /* bfd_reloc_code_real_type */ + reloc_bits, /* adjust_reloc_bits */ + "got_pcadd_lo12"), /* larch_reloc_type_name */ + + LOONGARCH_HOWTO (R_LARCH_TLS_IE_PCADD_HI20, /* type (132). */ + 12, /* rightshift. */ + 4, /* size. */ + 20, /* bitsize. */ + true, /* pc_relative. */ + 5, /* bitpos. */ + complain_overflow_signed, /* complain_on_overflow. */ + bfd_elf_generic_reloc, /* special_function. */ + "R_LARCH_TLS_IE_PCADD_HI20", /* name. */ + false, /* partial_inplace. */ + 0, /* src_mask */ + 0x1ffffe0, /* dst_mask */ + true, /* pcrel_offset */ + BFD_RELOC_LARCH_TLS_IE_PCADD_HI20, /* bfd_reloc_code_real_type */ + reloc_bits, /* adjust_reloc_bits */ + "ie_pcadd_hi20"), /* larch_reloc_type_name */ + + LOONGARCH_HOWTO (R_LARCH_TLS_IE_PCADD_LO12, /* type (133). */ + 0, /* rightshift. */ + 4, /* size. */ + 12, /* bitsize. */ + false, /* pc_relative. */ + 10, /* bitpos. */ + complain_overflow_signed, /* complain_on_overflow. */ + bfd_elf_generic_reloc, /* special_function. */ + "R_LARCH_TLS_IE_PCADD_LO12", /* name. */ + false, /* partial_inplace. */ + 0, /* src_mask */ + 0x3ffc00, /* dst_mask */ + false, /* pcrel_offset */ + BFD_RELOC_LARCH_TLS_IE_PCADD_LO12, /* bfd_reloc_code_real_type */ + reloc_bits, /* adjust_reloc_bits */ + "ie_pcadd_lo12"), /* larch_reloc_type_name */ + + LOONGARCH_HOWTO (R_LARCH_TLS_LD_PCADD_HI20, /* type (134). */ + 12, /* rightshift. */ + 4, /* size. */ + 20, /* bitsize. */ + true, /* pc_relative. */ + 5, /* bitpos. */ + complain_overflow_signed, /* complain_on_overflow. */ + bfd_elf_generic_reloc, /* special_function. */ + "R_LARCH_TLS_LD_PCADD_HI20", /* name. */ + false, /* partial_inplace. */ + 0, /* src_mask */ + 0x1ffffe0, /* dst_mask */ + true, /* pcrel_offset */ + BFD_RELOC_LARCH_TLS_LD_PCADD_HI20, /* bfd_reloc_code_real_type */ + reloc_bits, /* adjust_reloc_bits */ + "ld_pcadd_hi20"), /* larch_reloc_type_name */ + + LOONGARCH_HOWTO (R_LARCH_TLS_LD_PCADD_LO12, /* type (135). */ + 0, /* rightshift. */ + 4, /* size. */ + 12, /* bitsize. */ + false, /* pc_relative. */ + 10, /* bitpos. */ + complain_overflow_signed, /* complain_on_overflow. */ + bfd_elf_generic_reloc, /* special_function. */ + "R_LARCH_TLS_LD_PCADD_LO12", /* name. */ + false, /* partial_inplace. */ + 0, /* src_mask */ + 0x3ffc00, /* dst_mask */ + false, /* pcrel_offset */ + BFD_RELOC_LARCH_TLS_LD_PCADD_LO12, /* bfd_reloc_code_real_type */ + reloc_bits, /* adjust_reloc_bits */ + "ld_pcadd_lo12"), /* larch_reloc_type_name */ + + LOONGARCH_HOWTO (R_LARCH_TLS_GD_PCADD_HI20, /* type (136). */ + 12, /* rightshift. */ + 4, /* size. */ + 20, /* bitsize. */ + true, /* pc_relative. */ + 5, /* bitpos. */ + complain_overflow_signed, /* complain_on_overflow. */ + bfd_elf_generic_reloc, /* special_function. */ + "R_LARCH_TLS_GD_PCADD_HI20", /* name. */ + false, /* partial_inplace. */ + 0, /* src_mask */ + 0x1ffffe0, /* dst_mask */ + true, /* pcrel_offset */ + BFD_RELOC_LARCH_TLS_GD_PCADD_HI20, /* bfd_reloc_code_real_type */ + reloc_bits, /* adjust_reloc_bits */ + "gd_pcadd_hi20"), /* larch_reloc_type_name */ + + LOONGARCH_HOWTO (R_LARCH_TLS_GD_PCADD_LO12, /* type (137). */ + 0, /* rightshift. */ + 4, /* size. */ + 12, /* bitsize. */ + false, /* pc_relative. */ + 10, /* bitpos. */ + complain_overflow_signed, /* complain_on_overflow. */ + bfd_elf_generic_reloc, /* special_function. */ + "R_LARCH_TLS_GD_PCADD_LO12", /* name. */ + false, /* partial_inplace. */ + 0, /* src_mask */ + 0x3ffc00, /* dst_mask */ + false, /* pcrel_offset */ + BFD_RELOC_LARCH_TLS_GD_PCADD_LO12, /* bfd_reloc_code_real_type */ + reloc_bits, /* adjust_reloc_bits */ + "gd_pcadd_lo12"), /* larch_reloc_type_name */ + + LOONGARCH_HOWTO (R_LARCH_TLS_DESC_PCADD_HI20, /* type (138). */ + 12, /* rightshift. */ + 4, /* size. */ + 20, /* bitsize. */ + true, /* pc_relative. */ + 5, /* bitpos. */ + complain_overflow_signed, /* complain_on_overflow. */ + bfd_elf_generic_reloc, /* special_function. */ + "R_LARCH_TLS_DESC_PCADD_HI20", /* name. */ + false, /* partial_inplace. */ + 0, /* src_mask. */ + 0x1ffffe0, /* dst_mask. */ + true, /* pcrel_offset. */ + BFD_RELOC_LARCH_TLS_DESC_PCADD_HI20, /* bfd_reloc_code_real_type. */ + reloc_bits, /* adjust_reloc_bits. */ + "desc_pcadd_hi20"), /* larch_reloc_type_name. */ + + LOONGARCH_HOWTO (R_LARCH_TLS_DESC_PCADD_LO12, /* type (139). */ + 0, /* rightshift. */ + 4, /* size. */ + 12, /* bitsize. */ + false, /* pc_relative. */ + 10, /* bitpos. */ + complain_overflow_signed, /* complain_on_overflow. */ + bfd_elf_generic_reloc, /* special_function. */ + "R_LARCH_TLS_DESC_PCADD_LO12", /* name. */ + false, /* partial_inplace. */ + 0, /* src_mask */ + 0x3ffc00, /* dst_mask */ + false, /* pcrel_offset */ + BFD_RELOC_LARCH_TLS_DESC_PCADD_LO12, /* bfd_reloc_code_real_type */ + reloc_bits, /* adjust_reloc_bits */ + "desc_pcadd_lo12"), /* larch_reloc_type_name */ }; reloc_howto_type * diff --git a/bfd/libbfd.h b/bfd/libbfd.h index 2ae9b368c97..02823f7dd80 100644 --- a/bfd/libbfd.h +++ b/bfd/libbfd.h @@ -3595,6 +3595,19 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@", "BFD_RELOC_LARCH_TLS_LD_PCREL20_S2", "BFD_RELOC_LARCH_TLS_GD_PCREL20_S2", "BFD_RELOC_LARCH_TLS_DESC_PCREL20_S2", + "BFD_RELOC_LARCH_CALL30", + "BFD_RELOC_LARCH_PCADD_HI20", + "BFD_RELOC_LARCH_PCADD_LO12", + "BFD_RELOC_LARCH_GOT_PCADD_HI20", + "BFD_RELOC_LARCH_GOT_PCADD_LO12", + "BFD_RELOC_LARCH_TLS_IE_PCADD_HI20", + "BFD_RELOC_LARCH_TLS_IE_PCADD_LO12", + "BFD_RELOC_LARCH_TLS_LD_PCADD_HI20", + "BFD_RELOC_LARCH_TLS_LD_PCADD_LO12", + "BFD_RELOC_LARCH_TLS_GD_PCADD_HI20", + "BFD_RELOC_LARCH_TLS_GD_PCADD_LO12", + "BFD_RELOC_LARCH_TLS_DESC_PCADD_HI20", + "BFD_RELOC_LARCH_TLS_DESC_PCADD_LO12", "@@overflow: BFD_RELOC_UNUSED@@", }; #endif diff --git a/bfd/reloc.c b/bfd/reloc.c index 68a8929413b..95dc67bd483 100644 --- a/bfd/reloc.c +++ b/bfd/reloc.c @@ -8263,6 +8263,33 @@ ENUMX ENUMX BFD_RELOC_LARCH_TLS_DESC_PCREL20_S2 +ENUMX + BFD_RELOC_LARCH_CALL30 +ENUMX + BFD_RELOC_LARCH_PCADD_HI20 +ENUMX + BFD_RELOC_LARCH_PCADD_LO12 +ENUMX + BFD_RELOC_LARCH_GOT_PCADD_HI20 +ENUMX + BFD_RELOC_LARCH_GOT_PCADD_LO12 +ENUMX + BFD_RELOC_LARCH_TLS_IE_PCADD_HI20 +ENUMX + BFD_RELOC_LARCH_TLS_IE_PCADD_LO12 +ENUMX + BFD_RELOC_LARCH_TLS_LD_PCADD_HI20 +ENUMX + BFD_RELOC_LARCH_TLS_LD_PCADD_LO12 +ENUMX + BFD_RELOC_LARCH_TLS_GD_PCADD_HI20 +ENUMX + BFD_RELOC_LARCH_TLS_GD_PCADD_LO12 +ENUMX + BFD_RELOC_LARCH_TLS_DESC_PCADD_HI20 +ENUMX + BFD_RELOC_LARCH_TLS_DESC_PCADD_LO12 + ENUMDOC LARCH relocations. diff --git a/include/elf/loongarch.h b/include/elf/loongarch.h index ca031a18dad..06641133a5c 100644 --- a/include/elf/loongarch.h +++ b/include/elf/loongarch.h @@ -289,6 +289,41 @@ RELOC_NUMBER (R_LARCH_TLS_LD_PCREL20_S2, 124) RELOC_NUMBER (R_LARCH_TLS_GD_PCREL20_S2, 125) RELOC_NUMBER (R_LARCH_TLS_DESC_PCREL20_S2, 126) +/* LA32R medium call + pcaddu12i + jirl + %call30(sym). */ +RELOC_NUMBER (R_LARCH_CALL30, 127) + +/* LA32R PCREL: pcaddu12i, %pcadd_hi20(sym). */ +RELOC_NUMBER (R_LARCH_PCADD_HI20, 128) +/* LA32R PCREL: addi.w/ld.[bhw], %pcadd_lo12(sym). */ +RELOC_NUMBER (R_LARCH_PCADD_LO12, 129) + +/* LA32R GOT: pcaddu12i, %got_pcadd_hi20(sym). */ +RELOC_NUMBER (R_LARCH_GOT_PCADD_HI20, 130) +/* LA32R GOT: ld.w, %got_pcadd_lo12(sym). */ +RELOC_NUMBER (R_LARCH_GOT_PCADD_LO12, 131) + +/* LA32R TLS IE: pcaddu12i, %ie_pcadd_hi20(sym). */ +RELOC_NUMBER (R_LARCH_TLS_IE_PCADD_HI20, 132) +/* LA32R TLS IE: ld.w, %ie_pcadd_lo12(sym). */ +RELOC_NUMBER (R_LARCH_TLS_IE_PCADD_LO12, 133) + +/* LA32R TLS LD: pcaddu12i, %ld_pcadd_hi20(sym). */ +RELOC_NUMBER (R_LARCH_TLS_LD_PCADD_HI20, 134) +/* LA32R TLS LD: addi.w, %ld_pcadd_lo12(sym). */ +RELOC_NUMBER (R_LARCH_TLS_LD_PCADD_LO12, 135) + +/* LA32R TLS GD: pcaddu12i, %gd_pcadd_hi20(sym). */ +RELOC_NUMBER (R_LARCH_TLS_GD_PCADD_HI20, 136) +/* LA32R TLS GD: addi.w, %gd_pcadd_lo12(sym). */ +RELOC_NUMBER (R_LARCH_TLS_GD_PCADD_LO12, 137) + +/* LA32R TLS DESC: pcaddu12i, %desc_pcadd_hi20(sym). */ +RELOC_NUMBER (R_LARCH_TLS_DESC_PCADD_HI20, 138) +/* LA32R TLS DESC: addi.w, %desc_pcadd_lo12(sym). */ +RELOC_NUMBER (R_LARCH_TLS_DESC_PCADD_LO12, 139) + END_RELOC_NUMBERS (R_LARCH_count) /* Processor specific flags for the ELF header e_flags field. */ From patchwork Tue Dec 2 11:17:39 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: mengqinggang X-Patchwork-Id: 125754 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from vm01.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 20ECA4D10849 for ; Tue, 2 Dec 2025 11:23:03 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 20ECA4D10849 X-Original-To: binutils@sourceware.org Delivered-To: binutils@sourceware.org Received: from mail.loongson.cn (mail.loongson.cn [114.242.206.163]) by sourceware.org (Postfix) with ESMTP id 887644C3180F for ; Tue, 2 Dec 2025 11:21:38 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 887644C3180F Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=loongson.cn Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=loongson.cn ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 887644C3180F Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=114.242.206.163 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1764674499; cv=none; b=oWqZXbQ7zXug37gAXJe+bSaXTcRpGNIn+wbIsuI66d4M4aHt0jSEaCL17dbwCUgcjPNxcY/UDtsVPABSXspMtv35lzTtlJOp1vYY142CEFQPxncJmDmKDuheLntEN2+0jHCvdAj9oj/1jG4W1Q/wESuvHpm10dr7G8+IC/zr/uA= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1764674499; c=relaxed/simple; bh=KvKVd+ZkdUw4497Bvm5iNUKmje+UWY7qLion7naoA5A=; h=From:To:Subject:Date:Message-Id:MIME-Version; b=w557MGfr3omsFDfGNYjZZkTkBmwSXLpG5sHDiTINtrFdD3NX8oZxFRWQx1Mkr2zLIjK3mqf4s/ebH8KINdP2f2Rpq8PGSSuHP1o0NSN0t5ggym9ww4rG8PChSptCGOXlt3mQkuhOWvA1MN2otoBpgb9bCMcmkq3eJyUsOOh6bqA= ARC-Authentication-Results: i=1; server2.sourceware.org DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 887644C3180F Received: from loongson.cn (unknown [10.2.6.7]) by gateway (Coremail) with SMTP id _____8Axz7+jyy5pGEkqAA--.23256S3; Tue, 02 Dec 2025 19:21:07 +0800 (CST) Received: from amd9754.. (unknown [10.2.6.7]) by front1 (Coremail) with SMTP id qMiowJBxC8Giyy5pb3xEAQ--.12298S2; Tue, 02 Dec 2025 19:21:06 +0800 (CST) From: mengqinggang To: binutils@sourceware.org Cc: xuchenghua@loongson.cn, chenglulu@loongson.cn, cailulu@loongson.cn, xry111@xry111.site, i.swmail@xen0n.name, maskray@google.com, luweining@loongson.cn, hejinyang@loongson.cn, c@jia.je, mengqinggang@loongson.cn Subject: [PATCH v2 06/12] LoongArch: Add processing for LA32/LA32R relocations Date: Tue, 2 Dec 2025 19:17:39 +0800 Message-Id: <20251202111745.1558349-7-mengqinggang@loongson.cn> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20251202111745.1558349-1-mengqinggang@loongson.cn> References: <20251202111745.1558349-1-mengqinggang@loongson.cn> MIME-Version: 1.0 X-CM-TRANSID: qMiowJBxC8Giyy5pb3xEAQ--.12298S2 X-CM-SenderInfo: 5phqw15lqjwttqj6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== X-Spam-Status: No, score=-12.9 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, RCVD_IN_DNSWL_BLOCKED, RCVD_IN_VALIDITY_RPBL_BLOCKED, RCVD_IN_VALIDITY_SAFE_BLOCKED, SPF_HELO_NONE, SPF_PASS, TXREP, URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: binutils-bounces~patchwork=sourceware.org@sourceware.org R_LARCH_CALL30: pcaddu12i $ra, %call30(func) jirl $ra, $ra, 0 Similar with R_LARCH_CALL36, pcaddu12i and jirl must be adjacent. R_LARCH_PCADD_HI20, R_LARCH_PCADD_LO12: .Lpcadd_hi0: pcaddu12i $t0, %pcadd_hi20(sym) addi.w $t0, $t0, %pcadd_lo12(.Lpcadd_hi0) Similar with RISCV PCREL_HI20, PCREL_LO12, R_LARCH_PCADD_LO12 reference to the symbol at R_LARCH_PCADD_HI20. --- bfd/elfnn-loongarch.c | 277 +++++++++++++++++++++++++++++++++++--- bfd/elfxx-loongarch.c | 7 + gas/config/tc-loongarch.c | 26 +++- 3 files changed, 284 insertions(+), 26 deletions(-) diff --git a/bfd/elfnn-loongarch.c b/bfd/elfnn-loongarch.c index dd6ac76a042..5e5eb237abd 100644 --- a/bfd/elfnn-loongarch.c +++ b/bfd/elfnn-loongarch.c @@ -228,7 +228,8 @@ loongarch_elf_new_section_hook (bfd *abfd, asection *sec) #define IS_CALL_RELOC(R_TYPE) \ ((R_TYPE) == R_LARCH_B26 \ - ||(R_TYPE) == R_LARCH_CALL36) + ||(R_TYPE) == R_LARCH_CALL36 \ + ||(R_TYPE) == R_LARCH_CALL30) /* If TLS GD/IE need dynamic relocations, INDX will be the dynamic indx, and set NEED_RELOC to true used in allocate_dynrelocs and @@ -885,7 +886,8 @@ bad_static_reloc (struct bfd_link_info *info, bool bad_extern_access = (bfd_link_pde (info) || r_type == R_LARCH_PCREL20_S2 - || r_type == R_LARCH_PCALA_HI20); + || r_type == R_LARCH_PCALA_HI20 + || r_type == R_LARCH_PCADD_HI20); if (h) name = h->root.root.string; @@ -1051,6 +1053,7 @@ loongarch_elf_check_relocs (bfd *abfd, struct bfd_link_info *info, switch (r_type) { case R_LARCH_GOT_PC_HI20: + case R_LARCH_GOT_PCADD_HI20: case R_LARCH_GOT_HI20: case R_LARCH_SOP_PUSH_GPREL: /* For la.global. */ @@ -1064,8 +1067,10 @@ loongarch_elf_check_relocs (bfd *abfd, struct bfd_link_info *info, break; case R_LARCH_TLS_LD_PC_HI20: + case R_LARCH_TLS_LD_PCADD_HI20: case R_LARCH_TLS_LD_HI20: case R_LARCH_TLS_GD_PC_HI20: + case R_LARCH_TLS_GD_PCADD_HI20: case R_LARCH_TLS_GD_HI20: case R_LARCH_SOP_PUSH_TLS_GD: if (!loongarch_elf_record_tls_and_got_reference (abfd, info, h, @@ -1076,6 +1081,7 @@ loongarch_elf_check_relocs (bfd *abfd, struct bfd_link_info *info, break; case R_LARCH_TLS_IE_PC_HI20: + case R_LARCH_TLS_IE_PCADD_HI20: case R_LARCH_TLS_IE_HI20: case R_LARCH_SOP_PUSH_TLS_GOT: if (bfd_link_pic (info)) @@ -1103,6 +1109,7 @@ loongarch_elf_check_relocs (bfd *abfd, struct bfd_link_info *info, break; case R_LARCH_TLS_DESC_PC_HI20: + case R_LARCH_TLS_DESC_PCADD_HI20: case R_LARCH_TLS_DESC_HI20: if (!loongarch_elf_record_tls_and_got_reference (abfd, info, h, r_symndx, @@ -1132,6 +1139,7 @@ loongarch_elf_check_relocs (bfd *abfd, struct bfd_link_info *info, should not be used to build shared libraries. In static PIE undefined weak symbols may be allowed by rewriting pcaddi to addi.w if addend is in [-2048, 2048). */ + case R_LARCH_PCADD_HI20: case R_LARCH_PCREL20_S2: if (bfd_link_pic (info) && (sec->flags & SEC_ALLOC) != 0 @@ -1179,6 +1187,7 @@ loongarch_elf_check_relocs (bfd *abfd, struct bfd_link_info *info, case R_LARCH_B21: case R_LARCH_B26: case R_LARCH_CALL36: + case R_LARCH_CALL30: if (h != NULL) { h->needs_plt = 1; @@ -3012,6 +3021,19 @@ perform_relocation (const Elf_Internal_Rela *rel, asection *input_section, case R_LARCH_TLS_LD_PCREL20_S2: case R_LARCH_TLS_GD_PCREL20_S2: case R_LARCH_TLS_DESC_PCREL20_S2: + case R_LARCH_CALL30: + case R_LARCH_PCADD_HI20: + case R_LARCH_PCADD_LO12: + case R_LARCH_GOT_PCADD_HI20: + case R_LARCH_GOT_PCADD_LO12: + case R_LARCH_TLS_IE_PCADD_HI20: + case R_LARCH_TLS_IE_PCADD_LO12: + case R_LARCH_TLS_LD_PCADD_HI20: + case R_LARCH_TLS_LD_PCADD_LO12: + case R_LARCH_TLS_GD_PCADD_HI20: + case R_LARCH_TLS_GD_PCADD_LO12: + case R_LARCH_TLS_DESC_PCADD_HI20: + case R_LARCH_TLS_DESC_PCADD_LO12: r = loongarch_check_offset (rel, input_section); if (r != bfd_reloc_ok) break; @@ -3268,6 +3290,153 @@ tlsoff (struct bfd_link_info *info, bfd_vma addr) return addr - elf_hash_table (info)->tls_sec->vma; } +typedef struct +{ + /* PC value. */ + bfd_vma address; + /* Relocation value with addend. */ + bfd_vma value; +} loongarch_pcrel_hi_reloc; + +typedef struct loongarch_pcrel_lo_reloc +{ + /* PC value of pcaddu12i. */ + bfd_vma address; + /* Internal relocation. */ + Elf_Internal_Rela *reloc; + /* loongarch_elf_relocate_section can only handle an input section at a time, + so we can only resolved pcadd_hi20 and pcadd_lo12 in the same section. If + these pcrel relocs are not in the same section we should report dangerous + relocation errors. */ + asection *input_section; + struct bfd_link_info *info; + reloc_howto_type *howto; + bfd_byte *contents; + /* The next loongarch_pcrel_lo_reloc. */ + struct loongarch_pcrel_lo_reloc *next; +} loongarch_pcrel_lo_reloc; + +typedef struct +{ + /* Hash table for loongarch_pcrel_hi_reloc. */ + htab_t hi_relocs; + /* Linked list for loongarch_pcrel_lo_reloc. */ + loongarch_pcrel_lo_reloc *lo_relocs; +} loongarch_pcrel_relocs; + +/* Hash function of the pcrel_hi_reloc hash table. */ +static hashval_t +loongarch_pcrel_reloc_hash (const void *entry) +{ + const loongarch_pcrel_hi_reloc *e = entry; + return (hashval_t)(e->address >> 2); +} + +/* Comparison function of the pcrel_hi_reloc hash table. */ +static int +loongarch_pcrel_reloc_eq (const void *entry1, const void *entry2) +{ + const loongarch_pcrel_hi_reloc *e1 = entry1, *e2 = entry2; + return e1->address == e2->address; +} + +static bool +loongarch_init_pcrel_relocs (loongarch_pcrel_relocs *p) +{ + p->lo_relocs = NULL; + p->hi_relocs = htab_create (1024, loongarch_pcrel_reloc_hash, + loongarch_pcrel_reloc_eq, free); + return p->hi_relocs != NULL; +} + +static void +loongarch_free_pcrel_reloc (loongarch_pcrel_relocs *p) +{ + loongarch_pcrel_lo_reloc *cur = p->lo_relocs; + + while (cur != NULL) + { + loongarch_pcrel_lo_reloc *next = cur->next; + free (cur); + cur = next; + } + htab_delete (p->hi_relocs); +} + +static bool +loongarch_record_pcrel_hi_reloc (loongarch_pcrel_relocs *p, + bfd_vma addr, + bfd_vma *value) +{ + bfd_vma offset = *value - addr; + bfd_vma off_lo = offset & (bfd_vma)0xfff; + /* If lo12 immediate > 0x7ff, because sign-extend caused by addi.w/ld.w, + hi20 immediate need to add 0x1. + See RELOCATE_CALC_PC32_HI20(relocation, pc) */ + if (off_lo > 0x7ff) + offset += 0x1000; + + *value = offset; + + loongarch_pcrel_hi_reloc entry = {addr, offset}; + loongarch_pcrel_hi_reloc **slot = + (loongarch_pcrel_hi_reloc **)htab_find_slot (p->hi_relocs, &entry, INSERT); + + BFD_ASSERT (*slot == NULL); + *slot = (loongarch_pcrel_hi_reloc *) bfd_malloc (sizeof (loongarch_pcrel_hi_reloc)); + if (*slot == NULL) + return false; + **slot = entry; + return true; +} + +static bool +loongarch_record_pcrel_lo_reloc (loongarch_pcrel_relocs *p, + bfd_vma addr, + Elf_Internal_Rela *reloc, + asection *input_section, + struct bfd_link_info *info, + reloc_howto_type *howto, + bfd_byte *contents) +{ + loongarch_pcrel_lo_reloc *entry; + entry = (loongarch_pcrel_lo_reloc *) bfd_malloc (sizeof (loongarch_pcrel_lo_reloc)); + if (entry == NULL) + return false; + *entry = (loongarch_pcrel_lo_reloc) {addr, reloc, input_section, info, + howto, contents, p->lo_relocs}; + p->lo_relocs = entry; + return true; +} + +static bool +loongarch_resolve_pcrel_lo_relocs (loongarch_pcrel_relocs *p) +{ + loongarch_pcrel_lo_reloc *r; + for (r = p->lo_relocs; r != NULL; r = r->next) + { + bfd *input_bfd = r->input_section->owner; + loongarch_pcrel_hi_reloc search = {r->address, 0}; + loongarch_pcrel_hi_reloc *entry = htab_find (p->hi_relocs, &search); + + char *string = NULL; + if (entry == NULL) + string = _("%pcrel_lo missing marching %pcrel_hi"); + + if (string != NULL) + { + ((*r->info->callbacks->reloc_overflow) + (r->info, NULL, NULL, r->howto->name, (bfd_vma) 0, + input_bfd, r->input_section, r->reloc->r_offset)); + return true; + } + + perform_relocation (r->reloc, r->input_section, r->howto, entry->value, + input_bfd, r->contents); + } + return true; +} + static int loongarch_elf_relocate_section (bfd *output_bfd, struct bfd_link_info *info, bfd *input_bfd, asection *input_section, @@ -3277,6 +3446,7 @@ loongarch_elf_relocate_section (bfd *output_bfd, struct bfd_link_info *info, { Elf_Internal_Rela *rel; Elf_Internal_Rela *relend; + loongarch_pcrel_relocs pcrel_relocs; bool fatal = false; asection *sreloc = elf_section_data (input_section)->sreloc; struct loongarch_elf_link_hash_table *htab = loongarch_elf_hash_table (info); @@ -3287,6 +3457,10 @@ loongarch_elf_relocate_section (bfd *output_bfd, struct bfd_link_info *info, bool is_dyn = elf_hash_table (info)->dynamic_sections_created; asection *plt = htab->elf.splt ? htab->elf.splt : htab->elf.iplt; asection *got = htab->elf.sgot; + uint32_t insn; + + if (!loongarch_init_pcrel_relocs (&pcrel_relocs)) + return false; relend = relocs + input_section->reloc_count; for (rel = relocs; rel < relend; rel++) @@ -4069,6 +4243,7 @@ loongarch_elf_relocate_section (bfd *output_bfd, struct bfd_link_info *info, case R_LARCH_B21: case R_LARCH_B26: case R_LARCH_CALL36: + case R_LARCH_CALL30: unresolved_reloc = false; bool via_plt = plt != NULL && h != NULL && h->plt.offset != (bfd_vma) - 1; @@ -4080,9 +4255,12 @@ loongarch_elf_relocate_section (bfd *output_bfd, struct bfd_link_info *info, /* A call to an undefined weak symbol is converted to 0. */ if (!via_plt && IS_CALL_RELOC (r_type)) { - /* call36 fn1 => pcaddu18i $ra,0+jirl $ra,$zero,0 - tail36 $t0,fn1 => pcaddi18i $t0,0+jirl $zero,$zero,0 */ - if (R_LARCH_CALL36 == r_type) + /* call36 fn1 => pcaddu18i $ra,0 + jirl $ra,$zero,0 + tail36 $t0,fn1 => pcaddi18i $t0,0 + jirl $t0,$zero,0 + call30 fn1 => pcaddu12i $ra,0 + jirl $ra,$zero,0 + tail30 $t0,fn1 => pcaddi12i $t0,0 + jirl $t0,$zero,0 */ + if (r_type == R_LARCH_CALL36 + || r_type == R_LARCH_CALL30) { uint32_t jirl = bfd_get (32, input_bfd, contents + rel->r_offset + 4); @@ -4100,10 +4278,9 @@ loongarch_elf_relocate_section (bfd *output_bfd, struct bfd_link_info *info, if (LARCH_INSN_B (b_bl)) bfd_put (32, input_bfd, LARCH_OP_JIRL, contents + rel->r_offset); - else - /* bl %plt(fn1) => jirl $ra,zero,0. */ - bfd_put (32, input_bfd, LARCH_OP_JIRL | 0x1, - contents + rel->r_offset); + else /* bl %plt(fn1) => jirl $ra,zero,0. */ + bfd_put (32, input_bfd, LARCH_OP_JIRL | 0x1, + contents + rel->r_offset); } r = bfd_reloc_continue; break; @@ -4164,8 +4341,8 @@ loongarch_elf_relocate_section (bfd *output_bfd, struct bfd_link_info *info, case R_LARCH_PCALA64_LO20: pc -= 8; /* Fall through. */ - case R_LARCH_PCREL20_S2: case R_LARCH_PCALA_HI20: + case R_LARCH_PCREL20_S2: unresolved_reloc = false; /* If sym is undef weak and it's hidden or we are doing a static @@ -4206,7 +4383,7 @@ loongarch_elf_relocate_section (bfd *output_bfd, struct bfd_link_info *info, break; } - uint32_t insn = bfd_get (32, input_bfd, + insn = bfd_get (32, input_bfd, contents + rel->r_offset); insn = LARCH_GET_RD (insn) | LARCH_OP_ADDI_W; insn |= (relocation & 0xfff) << 10; @@ -4218,7 +4395,7 @@ loongarch_elf_relocate_section (bfd *output_bfd, struct bfd_link_info *info, RELOCATE_CALC_PC32_HI20 (relocation, pc); if (resolve_pcrel_undef_weak) { - uint32_t insn = bfd_get (32, input_bfd, + insn = bfd_get (32, input_bfd, contents + rel->r_offset); insn = LARCH_GET_RD (insn) | LARCH_OP_LU12I_W; bfd_put_32 (input_bfd, insn, contents + rel->r_offset); @@ -4229,12 +4406,6 @@ loongarch_elf_relocate_section (bfd *output_bfd, struct bfd_link_info *info, } break; - case R_LARCH_TLS_LE_HI20_R: - relocation += rel->r_addend; - relocation = tlsoff (info, relocation); - RELOCATE_TLS_TP32_HI20 (relocation); - break; - case R_LARCH_PCALA_LO12: /* Not support if sym_addr in 2k page edge. pcalau12i pc_hi20 (sym_addr) @@ -4251,7 +4422,7 @@ loongarch_elf_relocate_section (bfd *output_bfd, struct bfd_link_info *info, /* For 2G jump, generate pcalau12i, jirl. */ /* If use jirl, turns to R_LARCH_B16. */ - uint32_t insn = bfd_get (32, input_bfd, contents + rel->r_offset); + insn = bfd_get (32, input_bfd, contents + rel->r_offset); if (LARCH_INSN_JIRL (insn)) { relocation &= 0xfff; @@ -4263,7 +4434,46 @@ loongarch_elf_relocate_section (bfd *output_bfd, struct bfd_link_info *info, } break; + case R_LARCH_PCADD_HI20: + resolve_pcrel_undef_weak = + ((info->nointerp + || (h && ELF_ST_VISIBILITY (h->other) != STV_DEFAULT)) + && is_undefweak); + if (resolve_pcrel_undef_weak) + pc = 0; + + if (h && h->plt.offset != MINUS_ONE) + relocation = sec_addr (plt) + h->plt.offset; + else + relocation += rel->r_addend; + + if (!loongarch_record_pcrel_hi_reloc (&pcrel_relocs, pc, &relocation)) + r = bfd_reloc_overflow; + + if (resolve_pcrel_undef_weak) + { + insn = bfd_get (32, input_bfd, + contents + rel->r_offset); + insn = LARCH_GET_RD (insn) | LARCH_OP_LU12I_W; + bfd_put_32 (input_bfd, insn, contents + rel->r_offset); + } + break; + + case R_LARCH_PCADD_LO12: + case R_LARCH_GOT_PCADD_LO12: + case R_LARCH_TLS_IE_PCADD_LO12: + case R_LARCH_TLS_LD_PCADD_LO12: + case R_LARCH_TLS_GD_PCADD_LO12: + case R_LARCH_TLS_DESC_PCADD_LO12: + if (loongarch_record_pcrel_lo_reloc (&pcrel_relocs, relocation, rel, + input_section, info, howto, + contents)) + continue; + r = bfd_reloc_overflow; + break; + case R_LARCH_GOT_PC_HI20: + case R_LARCH_GOT_PCADD_HI20: case R_LARCH_GOT_HI20: /* Calc got offset. */ { @@ -4356,6 +4566,12 @@ loongarch_elf_relocate_section (bfd *output_bfd, struct bfd_link_info *info, if (r_type == R_LARCH_GOT_PC_HI20) RELOCATE_CALC_PC32_HI20 (relocation, pc); + if (r_type == R_LARCH_GOT_PCADD_HI20) + { + if (!loongarch_record_pcrel_hi_reloc (&pcrel_relocs, pc, + &relocation)) + r = bfd_reloc_overflow; + } break; case R_LARCH_GOT_PC_LO12: @@ -4396,6 +4612,12 @@ loongarch_elf_relocate_section (bfd *output_bfd, struct bfd_link_info *info, break; + case R_LARCH_TLS_LE_HI20_R: + relocation += rel->r_addend; + relocation = tlsoff (info, relocation); + RELOCATE_TLS_TP32_HI20 (relocation); + break; + case R_LARCH_TLS_LE_HI20: case R_LARCH_TLS_LE_LO12: case R_LARCH_TLS_LE_LO12_R: @@ -4418,12 +4640,16 @@ loongarch_elf_relocate_section (bfd *output_bfd, struct bfd_link_info *info, Now, LD and GD is both GOT_TLS_GD type, LD seems to can be omitted. */ case R_LARCH_TLS_IE_PC_HI20: + case R_LARCH_TLS_IE_PCADD_HI20: case R_LARCH_TLS_IE_HI20: case R_LARCH_TLS_LD_PC_HI20: + case R_LARCH_TLS_LD_PCADD_HI20: case R_LARCH_TLS_LD_HI20: case R_LARCH_TLS_GD_PC_HI20: + case R_LARCH_TLS_GD_PCADD_HI20: case R_LARCH_TLS_GD_HI20: case R_LARCH_TLS_DESC_PC_HI20: + case R_LARCH_TLS_DESC_PCADD_HI20: case R_LARCH_TLS_DESC_HI20: case R_LARCH_TLS_LD_PCREL20_S2: case R_LARCH_TLS_GD_PCREL20_S2: @@ -4432,10 +4658,12 @@ loongarch_elf_relocate_section (bfd *output_bfd, struct bfd_link_info *info, unresolved_reloc = false; if (r_type == R_LARCH_TLS_IE_PC_HI20 + || r_type == R_LARCH_TLS_IE_PCADD_HI20 || r_type == R_LARCH_TLS_IE_HI20) is_ie = true; if (r_type == R_LARCH_TLS_DESC_PC_HI20 + || r_type == R_LARCH_TLS_DESC_PCADD_HI20 || r_type == R_LARCH_TLS_DESC_HI20 || r_type == R_LARCH_TLS_DESC_PCREL20_S2) is_desc = true; @@ -4569,6 +4797,13 @@ loongarch_elf_relocate_section (bfd *output_bfd, struct bfd_link_info *info, || r_type == R_LARCH_TLS_GD_PCREL20_S2 || r_type == R_LARCH_TLS_DESC_PCREL20_S2) relocation -= pc; + else if (r_type == R_LARCH_TLS_IE_PCADD_HI20 + || r_type == R_LARCH_TLS_LD_PCADD_HI20 + || r_type == R_LARCH_TLS_GD_PCADD_HI20 + || r_type == R_LARCH_TLS_DESC_PCADD_HI20) + if (!loongarch_record_pcrel_hi_reloc (&pcrel_relocs, pc, + &relocation)) + r = bfd_reloc_overflow; /* else {} ABS relocations. */ break; @@ -4731,6 +4966,10 @@ loongarch_elf_relocate_section (bfd *output_bfd, struct bfd_link_info *info, fatal = true; } + bool ret = loongarch_resolve_pcrel_lo_relocs (&pcrel_relocs); + fatal = !ret; + loongarch_free_pcrel_reloc (&pcrel_relocs); + return !fatal; } diff --git a/bfd/elfxx-loongarch.c b/bfd/elfxx-loongarch.c index b29ca218f24..a5a8dc34e0e 100644 --- a/bfd/elfxx-loongarch.c +++ b/bfd/elfxx-loongarch.c @@ -2281,6 +2281,13 @@ reloc_bits_sanity (bfd *abfd, reloc_howto_type *howto, bfd_vma *fix_val, so the high part need to add 0x8000. */ val = (((val + 0x8000) >> 16) << 5) | (((val & 0xffff) << 10) << 32); break; + case R_LARCH_CALL30: + /* call30 = pcaddu12i+jirl, the jirl immediate field has 16 bits. + Only use 10 bits immediate of jirl, so not need to add 0x8000. + Since there is "val = val >> howto->rightshift" in front, only + the lower 10 bits (0x3ff) need to be saved. */ + val = ((val >> 10) << 5) | (((val & 0x3ff) << 10) << 32); + break; default: val <<= howto->bitpos; break; diff --git a/gas/config/tc-loongarch.c b/gas/config/tc-loongarch.c index a37cde9b38c..e16c328c5da 100644 --- a/gas/config/tc-loongarch.c +++ b/gas/config/tc-loongarch.c @@ -117,7 +117,7 @@ const char md_shortopts[] = "O::g::G:"; static const char default_arch[] = DEFAULT_ARCH; -static bool call36 = 0; +static bool call_reloc = 0; /* The dwarf2 data alignment, adjusted for 32 or 64 bit. */ int loongarch_cie_data_alignment; @@ -863,7 +863,7 @@ loongarch_args_parser_can_match_arg_helper (char esc_ch1, char esc_ch2, esc_ch1, esc_ch2, bit_field, arg); if (ip->reloc_info[0].type >= BFD_RELOC_LARCH_B16 - && ip->reloc_info[0].type <= BFD_RELOC_LARCH_TLS_DESC_PCREL20_S2) + && ip->reloc_info[0].type <= BFD_RELOC_LARCH_TLS_DESC_PCADD_LO12) { /* As we compact stack-relocs, it is no need for pop operation. But break out until here in order to check the imm field. @@ -1166,13 +1166,14 @@ static void append_fixed_insn (struct loongarch_cl_insn *insn) { /* Ensure the jirl is emitted to the same frag as the pcaddu18i. */ - if (BFD_RELOC_LARCH_CALL36 == insn->reloc_info[0].type) + if (insn->reloc_info[0].type == BFD_RELOC_LARCH_CALL36 + || insn->reloc_info[0].type == BFD_RELOC_LARCH_CALL30) frag_grow (8); char *f = frag_more (insn->insn_length); move_insn (insn, frag_now, f - frag_now->fr_literal); - if (call36) + if (call_reloc) { if (strcmp (insn->name, "jirl") == 0) { @@ -1180,11 +1181,12 @@ append_fixed_insn (struct loongarch_cl_insn *insn) frag_wane (frag_now); frag_new (0); } - call36 = 0; + call_reloc = 0; } - if (BFD_RELOC_LARCH_CALL36 == insn->reloc_info[0].type) - call36 = 1; + if (insn->reloc_info[0].type == BFD_RELOC_LARCH_CALL36 + || insn->reloc_info[0].type == BFD_RELOC_LARCH_CALL30) + call_reloc = 1; } /* Add instructions based on the worst-case scenario firstly. */ @@ -1496,6 +1498,8 @@ loongarch_force_relocation (struct fix *fixp) case BFD_RELOC_LARCH_GOT_LO12: case BFD_RELOC_LARCH_GOT64_LO20: case BFD_RELOC_LARCH_GOT64_HI12: + case BFD_RELOC_LARCH_GOT_PCADD_HI20: + case BFD_RELOC_LARCH_GOT_PCADD_LO12: return 1; default: break; @@ -1585,6 +1589,14 @@ md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED) case BFD_RELOC_LARCH_TLS_LE_ADD_R: case BFD_RELOC_LARCH_TLS_LE_HI20_R: case BFD_RELOC_LARCH_TLS_LE_LO12_R: + case BFD_RELOC_LARCH_TLS_IE_PCADD_HI20: + case BFD_RELOC_LARCH_TLS_IE_PCADD_LO12: + case BFD_RELOC_LARCH_TLS_LD_PCADD_HI20: + case BFD_RELOC_LARCH_TLS_LD_PCADD_LO12: + case BFD_RELOC_LARCH_TLS_GD_PCADD_HI20: + case BFD_RELOC_LARCH_TLS_GD_PCADD_LO12: + case BFD_RELOC_LARCH_TLS_DESC_PCADD_HI20: + case BFD_RELOC_LARCH_TLS_DESC_PCADD_LO12: /* Add tls lo (got_lo reloc type). */ if (fixP->fx_addsy == NULL) as_bad_where (fixP->fx_file, fixP->fx_line, From patchwork Tue Dec 2 11:17:40 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: mengqinggang X-Patchwork-Id: 125759 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from vm01.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 75EE148FD3BC for ; Tue, 2 Dec 2025 11:24:28 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 75EE148FD3BC X-Original-To: binutils@sourceware.org Delivered-To: binutils@sourceware.org Received: from mail.loongson.cn (mail.loongson.cn [114.242.206.163]) by sourceware.org (Postfix) with ESMTP id A2D6A4AA51DA for ; Tue, 2 Dec 2025 11:21:50 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org A2D6A4AA51DA Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=loongson.cn Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=loongson.cn ARC-Filter: OpenARC Filter v1.0.0 sourceware.org A2D6A4AA51DA Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=114.242.206.163 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1764674511; cv=none; b=O6HAxC8diEYlKAgcFIRYnq8FfJvFIe5Ccm8dUBGLBHvT7Yev7ljAWBTydfs+ENa1KYpR71SnyS9W4pVflknT/i6crRl/tLrI12D3noEWI3t6tgNHzynaHmDtp8ioSfvriQqpfjn7ZOgPWixaY8iybbXKqqa+c668/ngelFMps2E= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1764674511; c=relaxed/simple; bh=RGUYsgejCs7/oOB+eXqo7hldhxRLprOwNuA0Y4GYwyM=; h=From:To:Subject:Date:Message-Id:MIME-Version; b=ihJIhl3GwbaQ2552P7lAZh9wePft4WfdZFCj/uH6bYGMBZJTjoVPIeb9WnLUvnlWCSHuVIKLSeygmXaGaHfLsCT206XywcGzGHOjO8AX5nk5MeDW3iOaaTXP1qbwP+5YuhfWjZQUjtX9zIqToOGtRb3qwYZm44Ws4FQivyLNCEs= ARC-Authentication-Results: i=1; server2.sourceware.org DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org A2D6A4AA51DA Received: from loongson.cn (unknown [10.2.6.7]) by gateway (Coremail) with SMTP id _____8Axjr+lyy5pHkkqAA--.23493S3; Tue, 02 Dec 2025 19:21:09 +0800 (CST) Received: from amd9754.. (unknown [10.2.6.7]) by front1 (Coremail) with SMTP id qMiowJCxdOSkyy5pcHxEAQ--.52753S2; Tue, 02 Dec 2025 19:21:08 +0800 (CST) From: mengqinggang To: binutils@sourceware.org Cc: xuchenghua@loongson.cn, chenglulu@loongson.cn, cailulu@loongson.cn, xry111@xry111.site, i.swmail@xen0n.name, maskray@google.com, luweining@loongson.cn, hejinyang@loongson.cn, c@jia.je, mengqinggang@loongson.cn Subject: [PATCH v2 07/12] LoongArch: LA32 macros support Date: Tue, 2 Dec 2025 19:17:40 +0800 Message-Id: <20251202111745.1558349-8-mengqinggang@loongson.cn> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20251202111745.1558349-1-mengqinggang@loongson.cn> References: <20251202111745.1558349-1-mengqinggang@loongson.cn> MIME-Version: 1.0 X-CM-TRANSID: qMiowJCxdOSkyy5pcHxEAQ--.52753S2 X-CM-SenderInfo: 5phqw15lqjwttqj6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== X-Spam-Status: No, score=-12.9 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, RCVD_IN_DNSWL_BLOCKED, RCVD_IN_VALIDITY_RPBL_BLOCKED, RCVD_IN_VALIDITY_SAFE_BLOCKED, SPF_HELO_NONE, SPF_PASS, TXREP, URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: binutils-bounces~patchwork=sourceware.org@sourceware.org Change pcalau12i to pcaddu12i for LA32 macros. Add call30 and tail30 macros. --- opcodes/loongarch-opc.c | 41 +++++++++++++++++++++++++++++------------ 1 file changed, 29 insertions(+), 12 deletions(-) diff --git a/opcodes/loongarch-opc.c b/opcodes/loongarch-opc.c index 23aa167e0d4..073a1524f22 100644 --- a/opcodes/loongarch-opc.c +++ b/opcodes/loongarch-opc.c @@ -174,10 +174,11 @@ const char *const loongarch_f_cfi_name_alias[32] = &LARCH_opts.ase_lp64, 0 #define INSN_LA_PCREL32 \ - "pcalau12i %1,%%pc_hi20(%2);" \ - "addi.w %1,%1,%%pc_lo12(%2);", \ + "pcaddu12i %1,%%pcadd_hi20(%2);" \ + "addi.w %1,%1,%%pcadd_lo12(%2);", \ &LARCH_opts.ase_ilp32, \ &LARCH_opts.ase_lp64 + #define INSN_LA_PCREL64 \ "pcalau12i %1,%%pc_hi20(%2);" \ "addi.d %1,%1,%%pc_lo12(%2);", \ @@ -191,10 +192,11 @@ const char *const loongarch_f_cfi_name_alias[32] = &LARCH_opts.ase_lp64, 0 #define INSN_LA_GOT32 \ - "pcalau12i %1,%%got_pc_hi20(%2);" \ - "ld.w %1,%1,%%got_pc_lo12(%2);", \ + "pcaddu12i %1,%%got_pcadd_hi20(%2);" \ + "ld.w %1,%1,%%got_pcadd_lo12(%2);", \ &LARCH_opts.ase_ilp32, \ &LARCH_opts.ase_lp64 + /* got32 abs. */ #define INSN_LA_GOT32_ABS \ "lu12i.w %1,%%got_hi20(%2);" \ @@ -240,10 +242,11 @@ const char *const loongarch_f_cfi_name_alias[32] = &LARCH_opts.ase_lp64, 0 #define INSN_LA_TLS_IE32 \ - "pcalau12i %1,%%ie_pc_hi20(%2);" \ - "ld.w %1,%1,%%ie_pc_lo12(%2);", \ + "pcaddu12i %1,%%ie_pcadd_hi20(%2);" \ + "ld.w %1,%1,%%ie_pcadd_lo12(%2);", \ &LARCH_opts.ase_ilp32, \ &LARCH_opts.ase_lp64 + /* For ie32 abs. */ #define INSN_LA_TLS_IE32_ABS \ "lu12i.w %1,%%ie_hi20(%2);" \ @@ -276,10 +279,11 @@ const char *const loongarch_f_cfi_name_alias[32] = /* For LoongArch32/64 cmode=normal. */ #define INSN_LA_TLS_LD32 \ - "pcalau12i %1,%%ld_pc_hi20(%2);" \ - "addi.w %1,%1,%%got_pc_lo12(%2);", \ + "pcaddu12i %1,%%ld_pcadd_hi20(%2);" \ + "addi.w %1,%1,%%ld_pcadd_lo12(%2);", \ &LARCH_opts.ase_ilp32, \ &LARCH_opts.ase_lp64 + #define INSN_LA_TLS_LD32_ABS \ "lu12i.w %1,%%ld_hi20(%2);" \ "ori %1,%1,%%got_lo12(%2);", \ @@ -306,10 +310,11 @@ const char *const loongarch_f_cfi_name_alias[32] = &LARCH_opts.ase_gpcr #define INSN_LA_TLS_GD32 \ - "pcalau12i %1,%%gd_pc_hi20(%2);" \ - "addi.w %1,%1,%%got_pc_lo12(%2);", \ + "pcaddu12i %1,%%gd_pcadd_hi20(%2);" \ + "addi.w %1,%1,%%gd_pcadd_lo12(%2);", \ &LARCH_opts.ase_ilp32, \ &LARCH_opts.ase_lp64 + #define INSN_LA_TLS_GD32_ABS \ "lu12i.w %1,%%gd_hi20(%2);" \ "ori %1,%1,%%got_lo12(%2);", \ @@ -345,10 +350,20 @@ const char *const loongarch_f_cfi_name_alias[32] = "jirl $zero,%1,0;", \ 0, 0 +#define INSN_LA_CALL30 \ + "pcaddu12i $ra,%%call30(%1);" \ + "jirl $ra,$ra,0;", \ + 0, 0 + +#define INSN_LA_TAIL30 \ + "pcaddu12i %1,%%call30(%2);" \ + "jirl $zero,%1,0;", \ + 0, 0 + /* For TLS_DESC32 pcrel. */ #define INSN_LA_TLS_DESC32 \ - "pcalau12i $r4,%%desc_pc_hi20(%2);" \ - "addi.w $r4,$r4,%%desc_pc_lo12(%2);" \ + "pcaddu12i $r4,%%desc_pcadd_hi20(%2);" \ + "addi.w $r4,$r4,%%desc_pcadd_lo12(%2);" \ "ld.w $r1,$r4,%%desc_ld(%2);" \ "jirl $r1,$r1,%%desc_call(%2);", \ &LARCH_opts.ase_ilp32, \ @@ -442,6 +457,8 @@ static struct loongarch_opcode loongarch_macro_opcodes[] = { 0, 0, "la.tls.gd", "r,r,l", INSN_LA_TLS_GD64_LARGE_PCREL, 0 }, { 0, 0, "call36", "la", INSN_LA_CALL, 0 }, { 0, 0, "tail36", "r,la", INSN_LA_TAIL, 0 }, + { 0, 0, "call30", "la", INSN_LA_CALL30, 0 }, + { 0, 0, "tail30", "r,la", INSN_LA_TAIL30, 0 }, { 0, 0, "pcaddi", "r,la", "pcaddi %1, %%pcrel_20(%2)", &LARCH_opts.ase_ilp32, 0, 0 }, { 0, 0, "la.tls.desc", "r,l", INSN_LA_TLS_DESC32_ABS, 0 }, { 0, 0, "la.tls.desc", "r,l", INSN_LA_TLS_DESC32, 0 }, From patchwork Tue Dec 2 11:17:41 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: mengqinggang X-Patchwork-Id: 125757 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from vm01.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 5030E48F667C for ; Tue, 2 Dec 2025 11:24:21 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 5030E48F667C X-Original-To: binutils@sourceware.org Delivered-To: binutils@sourceware.org Received: from mail.loongson.cn (mail.loongson.cn [114.242.206.163]) by sourceware.org (Postfix) with ESMTP id 16C0B4C318A7 for ; Tue, 2 Dec 2025 11:21:46 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 16C0B4C318A7 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=loongson.cn Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=loongson.cn ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 16C0B4C318A7 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=114.242.206.163 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1764674508; cv=none; b=S2UJi7jLjUJrpeDQ+qksWp8uMBZOgI3wsaHydNinQp8whEiJ+YoJZHhX/Z08rTs3ME/c2Q3opPr1qqJzR7ldz0Ug2SOAKxnVcgeJKvb8s9xqji4V3R6jPL2HJkOAnzYQmQMyhXfgkbZAuWkAd8Mtqv95d7z97Bi9UZcLPH9YUBg= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1764674508; c=relaxed/simple; bh=SrgwphC/X4bRNOu+XL2rlvCEnPW3dbxXOkbditlZvzI=; h=From:To:Subject:Date:Message-Id:MIME-Version; b=lLt/XjyZP4vH+wabsmDyy4EdfKisywZXBNaHxxRFDFlCcamaFdaHKgyxf3/qHZpHwzWdHPH86TkPdRNZ3msvErGsr7/hB7lwhpHqJRldp/O5fAN+UPfKrkOqK8c8eTaDqVBLtMm9jSFwD8XaVr2gyq0ISOkAjJ/fanm2jzx0ESU= ARC-Authentication-Results: i=1; server2.sourceware.org DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 16C0B4C318A7 Received: from loongson.cn (unknown [10.2.6.7]) by gateway (Coremail) with SMTP id _____8Cx7tKnyy5pJEkqAA--.20202S3; Tue, 02 Dec 2025 19:21:11 +0800 (CST) Received: from amd9754.. (unknown [10.2.6.7]) by front1 (Coremail) with SMTP id qMiowJBxysCmyy5pcXxEAQ--.29142S2; Tue, 02 Dec 2025 19:21:10 +0800 (CST) From: mengqinggang To: binutils@sourceware.org Cc: xuchenghua@loongson.cn, chenglulu@loongson.cn, cailulu@loongson.cn, xry111@xry111.site, i.swmail@xen0n.name, maskray@google.com, luweining@loongson.cn, hejinyang@loongson.cn, c@jia.je, mengqinggang@loongson.cn Subject: [PATCH v2 08/12] LoongArch: LA32R macros expand Date: Tue, 2 Dec 2025 19:17:41 +0800 Message-Id: <20251202111745.1558349-9-mengqinggang@loongson.cn> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20251202111745.1558349-1-mengqinggang@loongson.cn> References: <20251202111745.1558349-1-mengqinggang@loongson.cn> MIME-Version: 1.0 X-CM-TRANSID: qMiowJBxysCmyy5pcXxEAQ--.29142S2 X-CM-SenderInfo: 5phqw15lqjwttqj6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== X-Spam-Status: No, score=-12.9 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, RCVD_IN_DNSWL_BLOCKED, RCVD_IN_VALIDITY_RPBL_BLOCKED, RCVD_IN_VALIDITY_SAFE_BLOCKED, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: binutils-bounces~patchwork=sourceware.org@sourceware.org Define a symbol .Lpcadd_hi* at R_LARCH_*_PCADD_HI20 if the instruction expand from macro. Change the symbol of R_LARCH_PCADD_LO12 to .Lpcadd_hi* if the instruction expand from macro. --- gas/config/tc-loongarch.c | 39 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 39 insertions(+) diff --git a/gas/config/tc-loongarch.c b/gas/config/tc-loongarch.c index e16c328c5da..1605b8e99f5 100644 --- a/gas/config/tc-loongarch.c +++ b/gas/config/tc-loongarch.c @@ -1378,6 +1378,18 @@ assember_macro_helper (const char *const args[], void *context_ptr) return ret; } +static unsigned int pcadd_hi = 0; +#define PCADD_HI_LABEL_NAME ".Lpcadd_hi" + +static char * +loongarch_pcadd_hi_label_name (unsigned int n) +{ + static char symbol_name_build[24]; + char *p = symbol_name_build; + sprintf (p, "%s%u", PCADD_HI_LABEL_NAME, n); + return symbol_name_build; +} + /* Accept instructions separated by ';' * assuming 'not starting with space and not ending with space' or pass in * empty c_str. */ @@ -1416,6 +1428,33 @@ loongarch_assemble_INSNs (char *str, unsigned int expand_from_macro) loongarch_split_args_by_comma (str, the_one.arg_strs); get_loongarch_opcode (&the_one); + /* Make a new label .Lpcadd_hi* for pcadd_lo12. */ + if (expand_from_macro + && the_one.reloc_num > 0 + && (the_one.reloc_info[0].type == BFD_RELOC_LARCH_PCADD_HI20 + || the_one.reloc_info[0].type == BFD_RELOC_LARCH_GOT_PCADD_HI20 + || the_one.reloc_info[0].type == BFD_RELOC_LARCH_TLS_IE_PCADD_HI20 + || the_one.reloc_info[0].type == BFD_RELOC_LARCH_TLS_LD_PCADD_HI20 + || the_one.reloc_info[0].type == BFD_RELOC_LARCH_TLS_GD_PCADD_HI20 + || the_one.reloc_info[0].type == BFD_RELOC_LARCH_TLS_DESC_PCADD_HI20)) + { + char *name = loongarch_pcadd_hi_label_name (pcadd_hi); + local_symbol_make (name, now_seg, frag_now, frag_now_fix ()); + } + + /* Change symbol to .Lpcadd_hi*. */ + if (expand_from_macro + && the_one.reloc_num > 0 + && the_one.reloc_info[0].type == BFD_RELOC_LARCH_PCADD_LO12) + { + char *name = loongarch_pcadd_hi_label_name (pcadd_hi); + symbolS *s = symbol_find (name); + if (s == NULL) + as_bad (_("no matched pcadd_hi label: %s"), name); + the_one.reloc_info[0].value.X_add_symbol = s; + pcadd_hi++; + } + if (!the_one.all_match) { char *ss = loongarch_cat_splited_strs (the_one.arg_strs); From patchwork Tue Dec 2 11:17:42 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: mengqinggang X-Patchwork-Id: 125760 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from vm01.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id A2ED94B920B9 for ; Tue, 2 Dec 2025 11:25:35 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org A2ED94B920B9 X-Original-To: binutils@sourceware.org Delivered-To: binutils@sourceware.org Received: from mail.loongson.cn (mail.loongson.cn [114.242.206.163]) by sourceware.org (Postfix) with ESMTP id E24254BCA431 for ; Tue, 2 Dec 2025 11:21:54 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org E24254BCA431 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=loongson.cn Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=loongson.cn ARC-Filter: OpenARC Filter v1.0.0 sourceware.org E24254BCA431 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=114.242.206.163 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1764674515; cv=none; b=RwY8LIHlXUgeUGkH28PCvJXvkPdI+2p5mRUVc5NGP5AxJS/Erzi7YpTLi+jsqN98PAD4N15kCCG7XulbPpNBALr38udsLTH32yP9UyDgH9YDuGrVqgJvCrXvxpfKPQiJvwIcjQBCSoFi7PAnoNFf/3i682PPZI1i4riSFu4KqJc= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1764674515; c=relaxed/simple; bh=WrZpSVQxB2ZgEKrJuN2OoVDCcYJI+jMN7wxP3k9rLtg=; h=From:To:Subject:Date:Message-Id:MIME-Version; b=qm7DncEqrQyoAsTgkAYqL2md2WJ+BRiEmP6D7x/IG2L21VGlccnsvK3CEz07md9peMQ0toUBPCp7cdp32FBiNDj1hUfofttuB74bz8digOeDlnNHNFGnu+Zb7dG90f/oVoCDFWwqtfPoQy8KkyovKpBpoLTJ28GKlmwNKbIMZLo= ARC-Authentication-Results: i=1; server2.sourceware.org DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org E24254BCA431 Received: from loongson.cn (unknown [10.2.6.7]) by gateway (Coremail) with SMTP id _____8AxjdKoyy5pKkkqAA--.20139S3; Tue, 02 Dec 2025 19:21:12 +0800 (CST) Received: from amd9754.. (unknown [10.2.6.7]) by front1 (Coremail) with SMTP id qMiowJDx_8Ooyy5pcnxEAQ--.54019S2; Tue, 02 Dec 2025 19:21:12 +0800 (CST) From: mengqinggang To: binutils@sourceware.org Cc: xuchenghua@loongson.cn, chenglulu@loongson.cn, cailulu@loongson.cn, xry111@xry111.site, i.swmail@xen0n.name, maskray@google.com, luweining@loongson.cn, hejinyang@loongson.cn, c@jia.je, mengqinggang@loongson.cn Subject: [PATCH v2 09/12] LoongArch: Add linker relaxation support for R_LARCH_CALL30 Date: Tue, 2 Dec 2025 19:17:42 +0800 Message-Id: <20251202111745.1558349-10-mengqinggang@loongson.cn> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20251202111745.1558349-1-mengqinggang@loongson.cn> References: <20251202111745.1558349-1-mengqinggang@loongson.cn> MIME-Version: 1.0 X-CM-TRANSID: qMiowJDx_8Ooyy5pcnxEAQ--.54019S2 X-CM-SenderInfo: 5phqw15lqjwttqj6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== X-Spam-Status: No, score=-12.9 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, RCVD_IN_DNSWL_BLOCKED, RCVD_IN_VALIDITY_RPBL_BLOCKED, RCVD_IN_VALIDITY_SAFE_BLOCKED, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: binutils-bounces~patchwork=sourceware.org@sourceware.org Relax call30 to bl, relax tail30 to b. --- bfd/elfnn-loongarch.c | 7 ++++--- gas/config/tc-loongarch.c | 3 ++- 2 files changed, 6 insertions(+), 4 deletions(-) diff --git a/bfd/elfnn-loongarch.c b/bfd/elfnn-loongarch.c index 5e5eb237abd..62696b83397 100644 --- a/bfd/elfnn-loongarch.c +++ b/bfd/elfnn-loongarch.c @@ -6100,6 +6100,7 @@ loongarch_elf_relax_section (bfd *abfd, asection *sec, relax_func = loongarch_relax_pcala_ld; break; case R_LARCH_CALL36: + case R_LARCH_CALL30: relax_func = loongarch_relax_call36; break; case R_LARCH_TLS_LE_HI20_R: @@ -6158,7 +6159,7 @@ loongarch_elf_relax_section (bfd *abfd, asection *sec, + r_symndx; if ((ELF_ST_TYPE (sym->st_info) == STT_GNU_IFUNC - && r_type != R_LARCH_CALL36) + && (r_type != R_LARCH_CALL36 || r_type != R_LARCH_CALL30)) || sym->st_shndx == SHN_ABS) continue; @@ -6195,7 +6196,7 @@ loongarch_elf_relax_section (bfd *abfd, asection *sec, is not set yet. */ if (h != NULL && ((h->type == STT_GNU_IFUNC - && r_type != R_LARCH_CALL36) + && (r_type != R_LARCH_CALL36 || r_type != R_LARCH_CALL30)) || bfd_is_abs_section (h->root.u.def.section) || h->start_stop)) continue; @@ -6223,7 +6224,7 @@ loongarch_elf_relax_section (bfd *abfd, asection *sec, Undefweak for other relocations handing in the future. */ else if (h->root.type == bfd_link_hash_undefweak && !h->root.linker_def - && r_type == R_LARCH_CALL36) + && (r_type == R_LARCH_CALL36 || r_type == R_LARCH_CALL30)) { sym_sec = sec; symval = rel->r_offset; diff --git a/gas/config/tc-loongarch.c b/gas/config/tc-loongarch.c index 1605b8e99f5..1e4dffd9e73 100644 --- a/gas/config/tc-loongarch.c +++ b/gas/config/tc-loongarch.c @@ -878,7 +878,8 @@ loongarch_args_parser_can_match_arg_helper (char esc_ch1, char esc_ch2, || BFD_RELOC_LARCH_TLS_LE_LO12 == reloc_type || BFD_RELOC_LARCH_TLS_LE64_LO20 == reloc_type || BFD_RELOC_LARCH_TLS_LE64_HI12 == reloc_type - || BFD_RELOC_LARCH_CALL36 == reloc_type)) + || BFD_RELOC_LARCH_CALL36 == reloc_type + || BFD_RELOC_LARCH_CALL30 == reloc_type)) { ip->reloc_info[ip->reloc_num].type = BFD_RELOC_LARCH_RELAX; ip->reloc_info[ip->reloc_num].value = const_0; From patchwork Tue Dec 2 11:17:43 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: mengqinggang X-Patchwork-Id: 125758 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from vm01.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 6806348FD3AB for ; Tue, 2 Dec 2025 11:24:27 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 6806348FD3AB X-Original-To: binutils@sourceware.org Delivered-To: binutils@sourceware.org Received: from mail.loongson.cn (mail.loongson.cn [114.242.206.163]) by sourceware.org (Postfix) with ESMTP id 111814BC89A5 for ; Tue, 2 Dec 2025 11:22:16 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 111814BC89A5 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=loongson.cn Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=loongson.cn ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 111814BC89A5 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=114.242.206.163 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1764674538; cv=none; b=SstsHCNFueAigAnWDaxvCZ9h96EDU7rupeZlJm7hrHYf7MGNQsvoLpVrf0tmtg/tc1qEgrYciFgel8tAL3tLfM+DhanbeZGN+akm2CWvShFRl1Jp9jI7SY5/+qhaaxMKiNAhzh69FzXjUqbltPpQFIHSfmeHM0RCMDRJvqamieM= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1764674538; c=relaxed/simple; bh=VeQwintw8KLxEF+fSitMCPHwMGX5WH1IVikYsnUimT4=; h=From:To:Subject:Date:Message-Id:MIME-Version; b=J1xd08kXWUaSJp0FgzJILXUqWlwJ4Rs9bEZGTHGFBkItPvSe2U8Juc3/mtCmr3Csb3WBBiqYarh7UfQ6Y/ZigdNHobURTcWtbNtr5CC5w8Go9v6kED97dfI+JkBvqXPnNHo0Uiz3xSHV6T+mP5Qay3FsIOmaDw/kcEHtoU/kHzI= ARC-Authentication-Results: i=1; server2.sourceware.org DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 111814BC89A5 Received: from loongson.cn (unknown [10.2.6.7]) by gateway (Coremail) with SMTP id _____8BxmdGryy5pMEkqAA--.25725S3; Tue, 02 Dec 2025 19:21:15 +0800 (CST) Received: from amd9754.. (unknown [10.2.6.7]) by front1 (Coremail) with SMTP id qMiowJCxmcCqyy5pc3xEAQ--.28908S2; Tue, 02 Dec 2025 19:21:14 +0800 (CST) From: mengqinggang To: binutils@sourceware.org Cc: xuchenghua@loongson.cn, chenglulu@loongson.cn, cailulu@loongson.cn, xry111@xry111.site, i.swmail@xen0n.name, maskray@google.com, luweining@loongson.cn, hejinyang@loongson.cn, c@jia.je, mengqinggang@loongson.cn Subject: [PATCH v2 10/12] LoongArch: Add support for tls type transition on LA32 Date: Tue, 2 Dec 2025 19:17:43 +0800 Message-Id: <20251202111745.1558349-11-mengqinggang@loongson.cn> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20251202111745.1558349-1-mengqinggang@loongson.cn> References: <20251202111745.1558349-1-mengqinggang@loongson.cn> MIME-Version: 1.0 X-CM-TRANSID: qMiowJCxmcCqyy5pc3xEAQ--.28908S2 X-CM-SenderInfo: 5phqw15lqjwttqj6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== X-Spam-Status: No, score=-12.9 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, RCVD_IN_VALIDITY_RPBL_BLOCKED, RCVD_IN_VALIDITY_SAFE_BLOCKED, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: binutils-bounces~patchwork=sourceware.org@sourceware.org desc -> le ie -> le desc -> ie For desc/ie -> le, need to change the symbol index of le_lo12 to [desc|ie]_pcadd_hi20. --- bfd/elfnn-loongarch.c | 440 ++++++++++++++++++++++++------------- gas/config/tc-loongarch.c | 17 +- include/opcode/loongarch.h | 1 + 3 files changed, 299 insertions(+), 159 deletions(-) diff --git a/bfd/elfnn-loongarch.c b/bfd/elfnn-loongarch.c index 62696b83397..955f0c18ebc 100644 --- a/bfd/elfnn-loongarch.c +++ b/bfd/elfnn-loongarch.c @@ -218,7 +218,11 @@ loongarch_elf_new_section_hook (bfd *abfd, asection *sec) || (R_TYPE) == R_LARCH_TLS_DESC_LD \ || (R_TYPE) == R_LARCH_TLS_DESC_CALL \ || (R_TYPE) == R_LARCH_TLS_IE_PC_HI20 \ - || (R_TYPE) == R_LARCH_TLS_IE_PC_LO12) + || (R_TYPE) == R_LARCH_TLS_IE_PC_LO12 \ + || (R_TYPE) == R_LARCH_TLS_DESC_PCADD_HI20 \ + || (R_TYPE) == R_LARCH_TLS_DESC_PCADD_LO12 \ + || (R_TYPE) == R_LARCH_TLS_IE_PCADD_HI20 \ + || (R_TYPE) == R_LARCH_TLS_IE_PCADD_LO12) #define IS_OUTDATED_TLS_LE_RELOC(R_TYPE) \ ((R_TYPE) == R_LARCH_TLS_LE_HI20 \ @@ -767,10 +771,14 @@ loongarch_reloc_got_type (unsigned int r_type) case R_LARCH_TLS_DESC_PC_LO12: case R_LARCH_TLS_DESC_LD: case R_LARCH_TLS_DESC_CALL: + case R_LARCH_TLS_DESC_PCADD_HI20: + case R_LARCH_TLS_DESC_PCADD_LO12: return GOT_TLS_GDESC; case R_LARCH_TLS_IE_PC_HI20: case R_LARCH_TLS_IE_PC_LO12: + case R_LARCH_TLS_IE_PCADD_HI20: + case R_LARCH_TLS_IE_PCADD_LO12: return GOT_TLS_IE; default: @@ -779,27 +787,179 @@ loongarch_reloc_got_type (unsigned int r_type) return GOT_UNKNOWN; } +typedef struct +{ + /* PC value. */ + bfd_vma address; + /* Relocation value with addend. */ + bfd_vma value; + unsigned int hi_sym; + struct elf_link_hash_entry *h; +} loongarch_pcrel_hi_reloc; + +typedef struct loongarch_pcrel_lo_reloc +{ + /* PC value of pcaddu12i. */ + bfd_vma address; + /* Internal relocation. */ + Elf_Internal_Rela *reloc; + /* loongarch_elf_relocate_section can only handle an input section at a time, + so we can only resolved pcadd_hi20 and pcadd_lo12 in the same section. + If these pcrel relocs are not in the same section we should report + dangerous relocation errors. */ + asection *input_section; + struct bfd_link_info *info; + reloc_howto_type *howto; + bfd_byte *contents; + /* The next loongarch_pcrel_lo_reloc. */ + struct loongarch_pcrel_lo_reloc *next; +} loongarch_pcrel_lo_reloc; + +typedef struct +{ + /* Hash table for loongarch_pcrel_hi_reloc. */ + htab_t hi_relocs; + /* Linked list for loongarch_pcrel_lo_reloc. */ + loongarch_pcrel_lo_reloc *lo_relocs; +} loongarch_pcrel_relocs; + +/* Hash function of the pcrel_hi_reloc hash table. */ +static hashval_t +loongarch_pcrel_reloc_hash (const void *entry) +{ + const loongarch_pcrel_hi_reloc *e = entry; + return (hashval_t)(e->address >> 2); +} + +/* Comparison function of the pcrel_hi_reloc hash table. */ +static int +loongarch_pcrel_reloc_eq (const void *entry1, const void *entry2) +{ + const loongarch_pcrel_hi_reloc *e1 = entry1, *e2 = entry2; + return e1->address == e2->address; +} + +static bool +loongarch_init_pcrel_relocs (loongarch_pcrel_relocs *p) +{ + p->lo_relocs = NULL; + p->hi_relocs = htab_create (1024, loongarch_pcrel_reloc_hash, + loongarch_pcrel_reloc_eq, free); + return p->hi_relocs != NULL; +} + +static void +loongarch_free_pcrel_reloc (loongarch_pcrel_relocs *p) +{ + loongarch_pcrel_lo_reloc *cur = p->lo_relocs; + + while (cur != NULL) + { + loongarch_pcrel_lo_reloc *next = cur->next; + free (cur); + cur = next; + } + htab_delete (p->hi_relocs); +} + +/* sym only need pass on relax. just pass 0 on relocate sections. */ +static bool +loongarch_record_pcrel_hi_reloc (loongarch_pcrel_relocs *p, + bfd_vma addr, + bfd_vma value, + unsigned int sym, + struct elf_link_hash_entry *h) +{ + loongarch_pcrel_hi_reloc entry = {addr, value, sym, h}; + loongarch_pcrel_hi_reloc **slot = + (loongarch_pcrel_hi_reloc **)htab_find_slot (p->hi_relocs, &entry, INSERT); + + if (*slot != NULL) + _bfd_error_handler (_("duplicate pcrel_hi record")); + + *slot = (loongarch_pcrel_hi_reloc *) bfd_malloc (sizeof (loongarch_pcrel_hi_reloc)); + if (*slot == NULL) + return false; + **slot = entry; + return true; +} + +static bool +loongarch_record_pcrel_lo_reloc (loongarch_pcrel_relocs *p, + bfd_vma addr, + Elf_Internal_Rela *reloc, + asection *input_section, + struct bfd_link_info *info, + reloc_howto_type *howto, + bfd_byte *contents) +{ + loongarch_pcrel_lo_reloc *entry; + entry = (loongarch_pcrel_lo_reloc *) bfd_malloc (sizeof (loongarch_pcrel_lo_reloc)); + if (entry == NULL) + return false; + *entry = (loongarch_pcrel_lo_reloc) {addr, reloc, input_section, info, + howto, contents, p->lo_relocs}; + p->lo_relocs = entry; + return true; +} + +static loongarch_pcrel_hi_reloc * +loongarch_find_pcrel_hi_reloc (loongarch_pcrel_relocs *p, bfd_vma address) +{ + loongarch_pcrel_hi_reloc search = {address, 0, 0, NULL}; + loongarch_pcrel_hi_reloc *entry = htab_find (p->hi_relocs, &search); + + if (entry == NULL) + _bfd_error_handler (_("pcrel_lo missing marching pcrel_hi")); + + return entry; +} + /* Return true if tls type transition can be performed. */ static bool -loongarch_can_trans_tls (bfd *input_bfd, +loongarch_can_trans_tls (bfd *input_bfd, asection *sec, + const Elf_Internal_Rela *rel, struct bfd_link_info *info, struct elf_link_hash_entry *h, - unsigned int r_symndx, - unsigned int r_type) + bfd_vma symval, + loongarch_pcrel_relocs *pcrel_relocs) { char symbol_tls_type; unsigned int reloc_got_type; + unsigned long r_type = ELFNN_R_TYPE (rel->r_info); + unsigned long r_symndx = ELFNN_R_SYM (rel->r_info); /* Only TLS DESC/IE in normal code mode will perform type transition. */ if (! IS_LOONGARCH_TLS_TRANS_RELOC (r_type)) return false; + /* Only record hi reloc in loongarch_elf_relax_section. */ + if (sec != NULL && pcrel_relocs != NULL + && (r_type == R_LARCH_TLS_DESC_PCADD_HI20 + || r_type == R_LARCH_TLS_IE_PCADD_HI20)) + { + bfd_vma pc = sec_addr (sec) + rel->r_offset; + loongarch_record_pcrel_hi_reloc (pcrel_relocs, pc, 0, r_symndx, h); + } + /* Obtaining tls got type here may occur before loongarch_elf_record_tls_and_got_reference, so it is necessary to ensure that tls got type has been initialized, otherwise it is set to GOT_UNKNOWN. */ symbol_tls_type = GOT_UNKNOWN; + + /* Only find hi reloc in loongarch_elf_relax_section. */ + loongarch_pcrel_hi_reloc *hi; + if (sec != NULL && pcrel_relocs != NULL + && (r_type == R_LARCH_TLS_DESC_PCADD_LO12 + || r_type == R_LARCH_TLS_IE_PCADD_LO12)) + { + hi = loongarch_find_pcrel_hi_reloc(pcrel_relocs, symval); + h = hi->h; + r_symndx = hi->hi_sym; + } + if (_bfd_loongarch_elf_local_got_tls_type (input_bfd) || h) symbol_tls_type = _bfd_loongarch_elf_tls_type (input_bfd, h, r_symndx); @@ -838,14 +998,26 @@ loongarch_tls_transition_without_check (struct bfd_link_info *info, ? R_LARCH_TLS_LE_LO12 : R_LARCH_TLS_IE_PC_LO12); + case R_LARCH_TLS_DESC_PCADD_HI20: + return (local_exec + ? R_LARCH_TLS_LE_HI20 + : R_LARCH_TLS_IE_PCADD_HI20); + + case R_LARCH_TLS_DESC_PCADD_LO12: + return (local_exec + ? R_LARCH_TLS_LE_HI20 + : R_LARCH_TLS_IE_PCADD_LO12); + case R_LARCH_TLS_DESC_LD: case R_LARCH_TLS_DESC_CALL: return R_LARCH_NONE; case R_LARCH_TLS_IE_PC_HI20: + case R_LARCH_TLS_IE_PCADD_HI20: return local_exec ? R_LARCH_TLS_LE_HI20 : r_type; case R_LARCH_TLS_IE_PC_LO12: + case R_LARCH_TLS_IE_PCADD_LO12: return local_exec ? R_LARCH_TLS_LE_LO12 : r_type; default: @@ -859,10 +1031,10 @@ static unsigned int loongarch_tls_transition (bfd *input_bfd, struct bfd_link_info *info, struct elf_link_hash_entry *h, - unsigned int r_symndx, - unsigned int r_type) + const Elf_Internal_Rela *rel) { - if (! loongarch_can_trans_tls (input_bfd, info, h, r_symndx, r_type)) + unsigned long r_type = ELFNN_R_TYPE (rel->r_info); + if (! loongarch_can_trans_tls (input_bfd, NULL, rel, info, h, 0, NULL)) return r_type; return loongarch_tls_transition_without_check (info, r_type, h); @@ -1030,10 +1202,11 @@ loongarch_elf_check_relocs (bfd *abfd, struct bfd_link_info *info, /* Type transitions are only possible with relocations accompanied by R_LARCH_RELAX. */ bool with_relax_reloc = false; - if (rel + 1 != relocs + sec->reloc_count + if (IS_LOONGARCH_TLS_TRANS_RELOC (r_type) + && rel + 1 != relocs + sec->reloc_count && ELFNN_R_TYPE (rel[1].r_info) == R_LARCH_RELAX) { - r_type = loongarch_tls_transition (abfd, info, h, r_symndx, r_type); + r_type = loongarch_tls_transition (abfd, info, h, rel); with_relax_reloc = true; } @@ -3230,6 +3403,14 @@ loongarch_reloc_is_fatal (struct bfd_link_info *info, relocation += 0x1000; \ }) +#define RELOCATE_CALC_PCADD_HI20(relocation, pc) \ + ({ \ + relocation = (relocation) - (pc); \ + bfd_vma __lo = (relocation) & ((bfd_vma)0xfff); \ + if (__lo > 0x7ff) \ + relocation += 0x1000; \ + }) + /* Handle problems caused by symbol extensions in TLS LE, The processing is similar to the macro RELOCATE_CALC_PC32_HI20 method. */ #define RELOCATE_TLS_TP32_HI20(relocation) \ @@ -3290,125 +3471,6 @@ tlsoff (struct bfd_link_info *info, bfd_vma addr) return addr - elf_hash_table (info)->tls_sec->vma; } -typedef struct -{ - /* PC value. */ - bfd_vma address; - /* Relocation value with addend. */ - bfd_vma value; -} loongarch_pcrel_hi_reloc; - -typedef struct loongarch_pcrel_lo_reloc -{ - /* PC value of pcaddu12i. */ - bfd_vma address; - /* Internal relocation. */ - Elf_Internal_Rela *reloc; - /* loongarch_elf_relocate_section can only handle an input section at a time, - so we can only resolved pcadd_hi20 and pcadd_lo12 in the same section. If - these pcrel relocs are not in the same section we should report dangerous - relocation errors. */ - asection *input_section; - struct bfd_link_info *info; - reloc_howto_type *howto; - bfd_byte *contents; - /* The next loongarch_pcrel_lo_reloc. */ - struct loongarch_pcrel_lo_reloc *next; -} loongarch_pcrel_lo_reloc; - -typedef struct -{ - /* Hash table for loongarch_pcrel_hi_reloc. */ - htab_t hi_relocs; - /* Linked list for loongarch_pcrel_lo_reloc. */ - loongarch_pcrel_lo_reloc *lo_relocs; -} loongarch_pcrel_relocs; - -/* Hash function of the pcrel_hi_reloc hash table. */ -static hashval_t -loongarch_pcrel_reloc_hash (const void *entry) -{ - const loongarch_pcrel_hi_reloc *e = entry; - return (hashval_t)(e->address >> 2); -} - -/* Comparison function of the pcrel_hi_reloc hash table. */ -static int -loongarch_pcrel_reloc_eq (const void *entry1, const void *entry2) -{ - const loongarch_pcrel_hi_reloc *e1 = entry1, *e2 = entry2; - return e1->address == e2->address; -} - -static bool -loongarch_init_pcrel_relocs (loongarch_pcrel_relocs *p) -{ - p->lo_relocs = NULL; - p->hi_relocs = htab_create (1024, loongarch_pcrel_reloc_hash, - loongarch_pcrel_reloc_eq, free); - return p->hi_relocs != NULL; -} - -static void -loongarch_free_pcrel_reloc (loongarch_pcrel_relocs *p) -{ - loongarch_pcrel_lo_reloc *cur = p->lo_relocs; - - while (cur != NULL) - { - loongarch_pcrel_lo_reloc *next = cur->next; - free (cur); - cur = next; - } - htab_delete (p->hi_relocs); -} - -static bool -loongarch_record_pcrel_hi_reloc (loongarch_pcrel_relocs *p, - bfd_vma addr, - bfd_vma *value) -{ - bfd_vma offset = *value - addr; - bfd_vma off_lo = offset & (bfd_vma)0xfff; - /* If lo12 immediate > 0x7ff, because sign-extend caused by addi.w/ld.w, - hi20 immediate need to add 0x1. - See RELOCATE_CALC_PC32_HI20(relocation, pc) */ - if (off_lo > 0x7ff) - offset += 0x1000; - - *value = offset; - - loongarch_pcrel_hi_reloc entry = {addr, offset}; - loongarch_pcrel_hi_reloc **slot = - (loongarch_pcrel_hi_reloc **)htab_find_slot (p->hi_relocs, &entry, INSERT); - - BFD_ASSERT (*slot == NULL); - *slot = (loongarch_pcrel_hi_reloc *) bfd_malloc (sizeof (loongarch_pcrel_hi_reloc)); - if (*slot == NULL) - return false; - **slot = entry; - return true; -} - -static bool -loongarch_record_pcrel_lo_reloc (loongarch_pcrel_relocs *p, - bfd_vma addr, - Elf_Internal_Rela *reloc, - asection *input_section, - struct bfd_link_info *info, - reloc_howto_type *howto, - bfd_byte *contents) -{ - loongarch_pcrel_lo_reloc *entry; - entry = (loongarch_pcrel_lo_reloc *) bfd_malloc (sizeof (loongarch_pcrel_lo_reloc)); - if (entry == NULL) - return false; - *entry = (loongarch_pcrel_lo_reloc) {addr, reloc, input_section, info, - howto, contents, p->lo_relocs}; - p->lo_relocs = entry; - return true; -} - static bool loongarch_resolve_pcrel_lo_relocs (loongarch_pcrel_relocs *p) { @@ -3416,7 +3478,7 @@ loongarch_resolve_pcrel_lo_relocs (loongarch_pcrel_relocs *p) for (r = p->lo_relocs; r != NULL; r = r->next) { bfd *input_bfd = r->input_section->owner; - loongarch_pcrel_hi_reloc search = {r->address, 0}; + loongarch_pcrel_hi_reloc search = {r->address, 0, 0, NULL}; loongarch_pcrel_hi_reloc *entry = htab_find (p->hi_relocs, &search); char *string = NULL; @@ -3446,7 +3508,6 @@ loongarch_elf_relocate_section (bfd *output_bfd, struct bfd_link_info *info, { Elf_Internal_Rela *rel; Elf_Internal_Rela *relend; - loongarch_pcrel_relocs pcrel_relocs; bool fatal = false; asection *sreloc = elf_section_data (input_section)->sreloc; struct loongarch_elf_link_hash_table *htab = loongarch_elf_hash_table (info); @@ -3459,6 +3520,7 @@ loongarch_elf_relocate_section (bfd *output_bfd, struct bfd_link_info *info, asection *got = htab->elf.sgot; uint32_t insn; + loongarch_pcrel_relocs pcrel_relocs; if (!loongarch_init_pcrel_relocs (&pcrel_relocs)) return false; @@ -4447,7 +4509,8 @@ loongarch_elf_relocate_section (bfd *output_bfd, struct bfd_link_info *info, else relocation += rel->r_addend; - if (!loongarch_record_pcrel_hi_reloc (&pcrel_relocs, pc, &relocation)) + RELOCATE_CALC_PCADD_HI20(relocation, pc); + if (!loongarch_record_pcrel_hi_reloc (&pcrel_relocs, pc, relocation, 0, NULL)) r = bfd_reloc_overflow; if (resolve_pcrel_undef_weak) @@ -4565,11 +4628,11 @@ loongarch_elf_relocate_section (bfd *output_bfd, struct bfd_link_info *info, if (r_type == R_LARCH_GOT_PC_HI20) RELOCATE_CALC_PC32_HI20 (relocation, pc); - - if (r_type == R_LARCH_GOT_PCADD_HI20) + else if (r_type == R_LARCH_GOT_PCADD_HI20) { + RELOCATE_CALC_PCADD_HI20(relocation, pc); if (!loongarch_record_pcrel_hi_reloc (&pcrel_relocs, pc, - &relocation)) + relocation, 0, NULL)) r = bfd_reloc_overflow; } break; @@ -4801,9 +4864,13 @@ loongarch_elf_relocate_section (bfd *output_bfd, struct bfd_link_info *info, || r_type == R_LARCH_TLS_LD_PCADD_HI20 || r_type == R_LARCH_TLS_GD_PCADD_HI20 || r_type == R_LARCH_TLS_DESC_PCADD_HI20) - if (!loongarch_record_pcrel_hi_reloc (&pcrel_relocs, pc, - &relocation)) - r = bfd_reloc_overflow; + + { + RELOCATE_CALC_PCADD_HI20(relocation, pc); + if (!loongarch_record_pcrel_hi_reloc (&pcrel_relocs, pc, + relocation, 0, NULL)) + r = bfd_reloc_overflow; + } /* else {} ABS relocations. */ break; @@ -5360,37 +5427,59 @@ static bool loongarch_tls_perform_trans (bfd *abfd, asection *sec, Elf_Internal_Rela *rel, struct elf_link_hash_entry *h, - struct bfd_link_info *info) + struct bfd_link_info *info, + bfd_vma symval, + loongarch_pcrel_relocs *pcrel_relocs) { unsigned long insn; - bool local_exec = bfd_link_executable (info) - && LARCH_REF_LOCAL (info, h); bfd_byte *contents = elf_section_data (sec)->this_hdr.contents; + + unsigned long r_symndx; unsigned long r_type = ELFNN_R_TYPE (rel->r_info); - unsigned long r_symndx = ELFNN_R_SYM (rel->r_info); + if (r_type == R_LARCH_TLS_DESC_PCADD_LO12 + || r_type == R_LARCH_TLS_IE_PCADD_LO12) + { + loongarch_pcrel_hi_reloc *hi; + hi = loongarch_find_pcrel_hi_reloc (pcrel_relocs, symval); + h = hi->h; + r_symndx = hi->hi_sym; + } + else + r_symndx = ELFNN_R_SYM (rel->r_info); + + bool local_exec = bfd_link_executable (info) + && LARCH_REF_LOCAL (info, h); switch (r_type) { case R_LARCH_TLS_DESC_PC_HI20: + case R_LARCH_TLS_DESC_PCADD_HI20: if (local_exec) { /* DESC -> LE relaxation: pcalau12i $a0,%desc_pc_hi20(var) => lu12i.w $a0,%le_hi20(var) */ bfd_put (32, abfd, LARCH_OP_LU12I_W | LARCH_RD_A0, - contents + rel->r_offset); + contents + rel->r_offset); rel->r_info = ELFNN_R_INFO (r_symndx, R_LARCH_TLS_LE_HI20); } else { /* DESC -> IE relaxation: pcalau12i $a0,%desc_pc_hi20(var) => - pcalau12i $a0,%ie_pc_hi20(var) */ - rel->r_info = ELFNN_R_INFO (r_symndx, R_LARCH_TLS_IE_PC_HI20); + pcalau12i $a0,%ie_pc_hi20(var) + or + pcaddu12i $a0,%desc_pcadd_hi20(var) => + pcaddu12i $a0,%ie_pcadd_hi20(var) */ + if (r_type == R_LARCH_TLS_DESC_PC_HI20) + rel->r_info = ELFNN_R_INFO (r_symndx, R_LARCH_TLS_IE_PC_HI20); + else + rel->r_info = ELFNN_R_INFO (r_symndx, R_LARCH_TLS_IE_PCADD_HI20); } return true; case R_LARCH_TLS_DESC_PC_LO12: + case R_LARCH_TLS_DESC_PCADD_LO12: if (local_exec) { /* DESC -> LE relaxation: @@ -5398,7 +5487,7 @@ loongarch_tls_perform_trans (bfd *abfd, asection *sec, ori $a0,$a0,le_lo12(var) */ insn = LARCH_OP_ORI | LARCH_RD_RJ_A0; bfd_put (32, abfd, LARCH_OP_ORI | LARCH_RD_RJ_A0, - contents + rel->r_offset); + contents + rel->r_offset); rel->r_info = ELFNN_R_INFO (r_symndx, R_LARCH_TLS_LE_LO12); } else @@ -5407,9 +5496,20 @@ loongarch_tls_perform_trans (bfd *abfd, asection *sec, addi.d $a0,$a0,%desc_pc_lo12(var) => ld.d $a0,$a0,%ie_pc_lo12(var) */ - bfd_put (32, abfd, LARCH_OP_LD_D | LARCH_RD_RJ_A0, - contents + rel->r_offset); - rel->r_info = ELFNN_R_INFO (r_symndx, R_LARCH_TLS_IE_PC_LO12); + if (r_type == R_LARCH_TLS_DESC_PC_LO12) + { + bfd_put (32, abfd, LARCH_OP_LD_D | LARCH_RD_RJ_A0, + contents + rel->r_offset); + rel->r_info = ELFNN_R_INFO (r_symndx, R_LARCH_TLS_IE_PC_LO12); + } + else + { + /* FIXME: Get insn to see if .d or .w and put insn. */ + bfd_put (32, abfd, LARCH_OP_LD_W | LARCH_RD_RJ_A0, + contents + rel->r_offset); + rel->r_info = ELFNN_R_INFO (r_symndx, + R_LARCH_TLS_IE_PCADD_LO12); + } } return true; @@ -5426,6 +5526,7 @@ loongarch_tls_perform_trans (bfd *abfd, asection *sec, return true; case R_LARCH_TLS_IE_PC_HI20: + case R_LARCH_TLS_IE_PCADD_HI20: if (local_exec) { /* IE -> LE relaxation: @@ -5433,12 +5534,13 @@ loongarch_tls_perform_trans (bfd *abfd, asection *sec, lu12i.w $rd,%le_hi20(var) */ insn = bfd_getl32 (contents + rel->r_offset); bfd_put (32, abfd, LARCH_OP_LU12I_W | LARCH_GET_RD(insn), - contents + rel->r_offset); + contents + rel->r_offset); rel->r_info = ELFNN_R_INFO (r_symndx, R_LARCH_TLS_LE_HI20); } return true; case R_LARCH_TLS_IE_PC_LO12: + case R_LARCH_TLS_IE_PCADD_LO12: if (local_exec) { /* IE -> LE relaxation: @@ -5447,7 +5549,7 @@ loongarch_tls_perform_trans (bfd *abfd, asection *sec, */ insn = bfd_getl32 (contents + rel->r_offset); bfd_put (32, abfd, LARCH_OP_ORI | (insn & 0x3ff), - contents + rel->r_offset); + contents + rel->r_offset); rel->r_info = ELFNN_R_INFO (r_symndx, R_LARCH_TLS_LE_LO12); } return true; @@ -6029,6 +6131,11 @@ loongarch_elf_relax_section (bfd *abfd, asection *sec, 0, NULL, NULL, NULL))) return true; + + loongarch_pcrel_relocs pcrel_relocs; + if (!loongarch_init_pcrel_relocs (&pcrel_relocs)) + return false; + /* Estimate the maximum alignment for all output sections once time should be enough. */ bfd_vma max_alignment = htab->max_alignment; @@ -6044,11 +6151,19 @@ loongarch_elf_relax_section (bfd *abfd, asection *sec, htab->pending_delete_ops = pdops; + /* The section's output_offset need to subtract the bytes of instructions + relaxed by the previous sections, so it needs to be updated beforehand. + size_input_section already took care of updating it after relaxation, + so we additionally update once here. */ + + /* update before tls trans and relax, or may cause same pcadd_hi20 address. */ + sec->output_offset = sec->output_section->size; + for (unsigned int i = 0; i < sec->reloc_count; i++) { char symtype; - bfd_vma symval; asection *sym_sec; + bfd_vma symval = 0; bool local_got = false; Elf_Internal_Rela *rel = relocs + i; struct elf_link_hash_entry *h = NULL; @@ -6063,11 +6178,24 @@ loongarch_elf_relax_section (bfd *abfd, asection *sec, h = (struct elf_link_hash_entry *) h->root.u.i.link; } + /* Get the local symbol value of PCADD_LO12 to find PCADD_HI20. */ + if (r_type == R_LARCH_TLS_IE_PCADD_LO12 + || r_type == R_LARCH_TLS_DESC_PCADD_LO12) + { + BFD_ASSERT (r_symndx < symtab_hdr->sh_info); + Elf_Internal_Sym *sym = (Elf_Internal_Sym *)symtab_hdr->contents + + r_symndx; + sym_sec = elf_elfsections (abfd)[sym->st_shndx]->bfd_section; + symval = sym->st_value; + symval += sec_addr (sym_sec); + } + /* If the conditions for tls type transition are met, type transition is performed instead of relax. During the transition from DESC->IE/LE, there are 2 situations depending on the different configurations of the relax/norelax option. + TLS type transition always perform. If the -relax option is used, the extra nops will be removed, and this transition is performed in pass 0. If the --no-relax option is used, nop will be retained, and @@ -6076,13 +6204,17 @@ loongarch_elf_relax_section (bfd *abfd, asection *sec, && (i + 1 != sec->reloc_count) && ELFNN_R_TYPE (rel[1].r_info) == R_LARCH_RELAX && rel->r_offset == rel[1].r_offset - && loongarch_can_trans_tls (abfd, info, h, r_symndx, r_type)) + && loongarch_can_trans_tls (abfd, sec, rel, info, h, symval, + &pcrel_relocs)) { - loongarch_tls_perform_trans (abfd, sec, rel, h, info); + loongarch_tls_perform_trans (abfd, sec, rel, h, info, symval, + &pcrel_relocs); r_type = ELFNN_R_TYPE (rel->r_info); + continue; } relax_func_t relax_func = NULL; + if (is_alignment_pass) { if (r_type != R_LARCH_ALIGN) @@ -6280,6 +6412,8 @@ loongarch_elf_relax_section (bfd *abfd, asection *sec, info, again, max_alignment); } + loongarch_free_pcrel_reloc (&pcrel_relocs); + if (pdops) { loongarch_relax_perform_deletes (abfd, sec, info); diff --git a/gas/config/tc-loongarch.c b/gas/config/tc-loongarch.c index 1e4dffd9e73..f09220bad5c 100644 --- a/gas/config/tc-loongarch.c +++ b/gas/config/tc-loongarch.c @@ -904,7 +904,11 @@ loongarch_args_parser_can_match_arg_helper (char esc_ch1, char esc_ch2, || BFD_RELOC_LARCH_TLS_DESC_LD == reloc_type || BFD_RELOC_LARCH_TLS_DESC_CALL == reloc_type || BFD_RELOC_LARCH_TLS_IE_PC_HI20 == reloc_type - || BFD_RELOC_LARCH_TLS_IE_PC_LO12 == reloc_type)) + || BFD_RELOC_LARCH_TLS_IE_PC_LO12 == reloc_type + || BFD_RELOC_LARCH_TLS_DESC_PCADD_HI20 == reloc_type + || BFD_RELOC_LARCH_TLS_DESC_PCADD_LO12 == reloc_type + || BFD_RELOC_LARCH_TLS_IE_PCADD_HI20 == reloc_type + || BFD_RELOC_LARCH_TLS_IE_PCADD_LO12 == reloc_type)) { ip->reloc_info[ip->reloc_num].type = BFD_RELOC_LARCH_RELAX; ip->reloc_info[ip->reloc_num].value = const_0; @@ -1446,7 +1450,12 @@ loongarch_assemble_INSNs (char *str, unsigned int expand_from_macro) /* Change symbol to .Lpcadd_hi*. */ if (expand_from_macro && the_one.reloc_num > 0 - && the_one.reloc_info[0].type == BFD_RELOC_LARCH_PCADD_LO12) + && (the_one.reloc_info[0].type == BFD_RELOC_LARCH_PCADD_LO12 + || the_one.reloc_info[0].type == BFD_RELOC_LARCH_GOT_PCADD_LO12 + || the_one.reloc_info[0].type == BFD_RELOC_LARCH_TLS_IE_PCADD_LO12 + || the_one.reloc_info[0].type == BFD_RELOC_LARCH_TLS_LD_PCADD_LO12 + || the_one.reloc_info[0].type == BFD_RELOC_LARCH_TLS_GD_PCADD_LO12 + || the_one.reloc_info[0].type == BFD_RELOC_LARCH_TLS_DESC_PCADD_LO12)) { char *name = loongarch_pcadd_hi_label_name (pcadd_hi); symbolS *s = symbol_find (name); @@ -1630,13 +1639,9 @@ md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED) case BFD_RELOC_LARCH_TLS_LE_HI20_R: case BFD_RELOC_LARCH_TLS_LE_LO12_R: case BFD_RELOC_LARCH_TLS_IE_PCADD_HI20: - case BFD_RELOC_LARCH_TLS_IE_PCADD_LO12: case BFD_RELOC_LARCH_TLS_LD_PCADD_HI20: - case BFD_RELOC_LARCH_TLS_LD_PCADD_LO12: case BFD_RELOC_LARCH_TLS_GD_PCADD_HI20: - case BFD_RELOC_LARCH_TLS_GD_PCADD_LO12: case BFD_RELOC_LARCH_TLS_DESC_PCADD_HI20: - case BFD_RELOC_LARCH_TLS_DESC_PCADD_LO12: /* Add tls lo (got_lo reloc type). */ if (fixP->fx_addsy == NULL) as_bad_where (fixP->fx_file, fixP->fx_line, diff --git a/include/opcode/loongarch.h b/include/opcode/loongarch.h index b20c78ddf9f..367dc2392a5 100644 --- a/include/opcode/loongarch.h +++ b/include/opcode/loongarch.h @@ -50,6 +50,7 @@ extern "C" #define LARCH_OP_LU12I_W 0x14000000 #define LARCH_MK_LD_D 0xffc00000 #define LARCH_OP_LD_D 0x28c00000 + #define LARCH_OP_LD_W 0x28800000 #define LARCH_MK_JIRL 0xfc000000 #define LARCH_OP_JIRL 0x4c000000 #define LARCH_MK_BCEQZ 0xfc000300 From patchwork Tue Dec 2 11:17:44 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: mengqinggang X-Patchwork-Id: 125761 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from vm01.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 4B1854C515EF for ; Tue, 2 Dec 2025 11:26:49 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 4B1854C515EF X-Original-To: binutils@sourceware.org Delivered-To: binutils@sourceware.org Received: from mail.loongson.cn (mail.loongson.cn [114.242.206.163]) by sourceware.org (Postfix) with ESMTP id 8E0394B19723 for ; Tue, 2 Dec 2025 11:22:16 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 8E0394B19723 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=loongson.cn Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=loongson.cn ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 8E0394B19723 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=114.242.206.163 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1764674537; cv=none; b=vo/ylVOoL/UyspjLEpN/te+f5104ryblvZqMjcFk9EnT01j5Yn/VT3UrhLp5KeKxNBUKkISKxRO9rBLv38LwstkSZBSg++BPckefZQJ6T7y+4CuUfdMfculfDuzXUmNlfVGqg+tdecxs6r3S7yXAa+ssK/7wjijsANmMfKBOPzk= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1764674537; c=relaxed/simple; bh=BmZEGXnwQftWXW6kIoo2fl8Px0cPNWUHY4UaCZW5x8c=; h=From:To:Subject:Date:Message-Id:MIME-Version; b=CtUmNiwbIxX3DTnGLZ9EQGtoe8jfEQgu6lDw5A4kwP/w+nVXJhjXUvydfeikGbKjim9iazzIONocqyN+HAgpLuzmUxSniHNkp59SslDNF9lcZOFBA8DP+S99iCM3LL99z7FE3ACdEkyxN2Edim7koS5fp/FHsqLP9aG/yXBPZ8w= ARC-Authentication-Results: i=1; server2.sourceware.org DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 8E0394B19723 Received: from loongson.cn (unknown [10.2.6.7]) by gateway (Coremail) with SMTP id _____8CxrtOtyy5pN0kqAA--.20743S3; Tue, 02 Dec 2025 19:21:17 +0800 (CST) Received: from amd9754.. (unknown [10.2.6.7]) by front1 (Coremail) with SMTP id qMiowJCxH8Ksyy5pdHxEAQ--.61967S2; Tue, 02 Dec 2025 19:21:16 +0800 (CST) From: mengqinggang To: binutils@sourceware.org Cc: xuchenghua@loongson.cn, chenglulu@loongson.cn, cailulu@loongson.cn, xry111@xry111.site, i.swmail@xen0n.name, maskray@google.com, luweining@loongson.cn, hejinyang@loongson.cn, c@jia.je, mengqinggang@loongson.cn Subject: [PATCH v2 11/12] LoongArch: Add linker relaxation for got_pcadd_hi20 and got_pcadd_lo12 Date: Tue, 2 Dec 2025 19:17:44 +0800 Message-Id: <20251202111745.1558349-12-mengqinggang@loongson.cn> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20251202111745.1558349-1-mengqinggang@loongson.cn> References: <20251202111745.1558349-1-mengqinggang@loongson.cn> MIME-Version: 1.0 X-CM-TRANSID: qMiowJCxH8Ksyy5pdHxEAQ--.61967S2 X-CM-SenderInfo: 5phqw15lqjwttqj6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== X-Spam-Status: No, score=-12.9 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, RCVD_IN_DNSWL_BLOCKED, RCVD_IN_VALIDITY_RPBL_BLOCKED, RCVD_IN_VALIDITY_SAFE_BLOCKED, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: binutils-bounces~patchwork=sourceware.org@sourceware.org .L1: pcaddu12i $t0, %got_pcadd_hi20(a) -> pcaddu12i $t0, %pcadd_hi20(a) ld.w/d $t0, $t0, %got_pcadd_lo12(.L1) -> addi.w/d $t0, $t0, %pcadd_lo12(.L1) --- bfd/elfnn-loongarch.c | 63 ++++++++++++++++++++++++++------------ gas/config/tc-loongarch.c | 7 ++++- include/opcode/loongarch.h | 3 ++ 3 files changed, 53 insertions(+), 20 deletions(-) diff --git a/bfd/elfnn-loongarch.c b/bfd/elfnn-loongarch.c index 955f0c18ebc..f44154da1e6 100644 --- a/bfd/elfnn-loongarch.c +++ b/bfd/elfnn-loongarch.c @@ -4502,7 +4502,7 @@ loongarch_elf_relocate_section (bfd *output_bfd, struct bfd_link_info *info, || (h && ELF_ST_VISIBILITY (h->other) != STV_DEFAULT)) && is_undefweak); if (resolve_pcrel_undef_weak) - pc = 0; + relocation = pc; /* Use pc to avoid duplicate pcrel_hi record. */ if (h && h->plt.offset != MINUS_ONE) relocation = sec_addr (plt) + h->plt.offset; @@ -5828,7 +5828,11 @@ loongarch_relax_call36 (bfd *abfd, asection *sec, asection *sym_sec, return true; } -/* Relax pcalau12i,ld.d => pcalau12i,addi.d. */ +/* pcalau12i $t0, %got_pcala_hi20(a) -> pcalau12i $t0, %pcala_hi20(a) + ld.w/d $t0, $t0, %got_pcala_lo12(a) -> addi.w/d $t0, $t0, %pcala_lo12(a) + + pcaddu12i $t0, %got_pcadd_hi20(a) -> pcaddu12i $t0, %pcadd_hi20(a) + ld.w/d $t0, $t0, %got_pcadd_lo12(a) -> addi.w/d $t0, $t0, %pcadd_lo12(a) */ static bool loongarch_relax_pcala_ld (bfd *abfd, asection *sec, asection *sym_sec, @@ -5838,13 +5842,6 @@ loongarch_relax_pcala_ld (bfd *abfd, asection *sec, bool *again ATTRIBUTE_UNUSED, bfd_vma max_alignment) { - bfd_byte *contents = elf_section_data (sec)->this_hdr.contents; - Elf_Internal_Rela *rel_lo = rel_hi + 2; - uint32_t pca = bfd_get (32, abfd, contents + rel_hi->r_offset); - uint32_t ld = bfd_get (32, abfd, contents + rel_lo->r_offset); - uint32_t rd = LARCH_GET_RD (pca); - uint32_t addi_d = LARCH_OP_ADDI_D; - /* This section's output_offset need to subtract the bytes of instructions relaxed by the previous sections, so it needs to be updated beforehand. size_input_section already took care of updating it after relaxation, @@ -5868,22 +5865,46 @@ loongarch_relax_pcala_ld (bfd *abfd, asection *sec, else if (symval < pc) pc += (max_alignment > 4 ? max_alignment : 0); - if ((ELFNN_R_TYPE (rel_lo->r_info) != R_LARCH_GOT_PC_LO12) + bfd_byte *contents = elf_section_data (sec)->this_hdr.contents; + Elf_Internal_Rela *rel_lo = rel_hi + 2; + uint32_t pca = bfd_get (32, abfd, contents + rel_hi->r_offset); + uint32_t ld = bfd_get (32, abfd, contents + rel_lo->r_offset); + uint32_t rd = LARCH_GET_RD (pca); + + if ((ELFNN_R_TYPE (rel_lo->r_info) != R_LARCH_GOT_PC_LO12 + && ELFNN_R_TYPE (rel_lo->r_info) != R_LARCH_GOT_PCADD_LO12) || (LARCH_GET_RD (ld) != rd) || (LARCH_GET_RJ (ld) != rd) - || !LARCH_INSN_LD_D (ld) + || (!LARCH_INSN_LD_D (ld) && !LARCH_INSN_LD_W (ld)) /* Within +-2G addressing range. */ || (bfd_signed_vma)(symval - pc) < (bfd_signed_vma)(int32_t)0x80000000 || (bfd_signed_vma)(symval - pc) > (bfd_signed_vma)(int32_t)0x7fffffff) return false; - addi_d = addi_d | (rd << 5) | rd; - bfd_put (32, abfd, addi_d, contents + rel_lo->r_offset); + uint32_t addi; + if (LARCH_INSN_LD_D (ld)) + addi = LARCH_OP_ADDI_D; + else + addi = LARCH_OP_ADDI_W; + + addi = addi | (rd << 5) | rd; + bfd_put (32, abfd, addi, contents + rel_lo->r_offset); + + if (ELFNN_R_TYPE (rel_hi->r_info) == R_LARCH_GOT_PC_HI20) + { + rel_hi->r_info = ELFNN_R_INFO (ELFNN_R_SYM (rel_hi->r_info), + R_LARCH_PCALA_HI20); + rel_lo->r_info = ELFNN_R_INFO (ELFNN_R_SYM (rel_lo->r_info), + R_LARCH_PCALA_LO12); + } + else + { + rel_hi->r_info = ELFNN_R_INFO (ELFNN_R_SYM (rel_hi->r_info), + R_LARCH_PCADD_HI20); + rel_lo->r_info = ELFNN_R_INFO (ELFNN_R_SYM (rel_lo->r_info), + R_LARCH_PCADD_LO12); + } - rel_hi->r_info = ELFNN_R_INFO (ELFNN_R_SYM (rel_hi->r_info), - R_LARCH_PCALA_HI20); - rel_lo->r_info = ELFNN_R_INFO (ELFNN_R_SYM (rel_lo->r_info), - R_LARCH_PCALA_LO12); return true; } @@ -6229,6 +6250,7 @@ loongarch_elf_relax_section (bfd *abfd, asection *sec, relax_func = loongarch_relax_pcala_addi; break; case R_LARCH_GOT_PC_HI20: + case R_LARCH_GOT_PCADD_HI20: relax_func = loongarch_relax_pcala_ld; break; case R_LARCH_CALL36: @@ -6258,7 +6280,8 @@ loongarch_elf_relax_section (bfd *abfd, asection *sec, || r_type == R_LARCH_TLS_GD_PC_HI20 || r_type == R_LARCH_TLS_DESC_PC_HI20 || r_type == R_LARCH_PCALA_HI20 - || r_type == R_LARCH_GOT_PC_HI20) + || r_type == R_LARCH_GOT_PC_HI20 + || r_type == R_LARCH_GOT_PCADD_HI20) { if ((i + 2) == sec->reloc_count - 1 || ELFNN_R_TYPE ((rel + 1)->r_info) != R_LARCH_RELAX @@ -6402,7 +6425,9 @@ loongarch_elf_relax_section (bfd *abfd, asection *sec, symval += sec_addr (sym_sec); - if (r_type == R_LARCH_GOT_PC_HI20 && !local_got) + if ((r_type == R_LARCH_GOT_PC_HI20 + || r_type == R_LARCH_GOT_PCADD_HI20) + && !local_got) continue; if (relax_func (abfd, sec, sym_sec, rel, symval, diff --git a/gas/config/tc-loongarch.c b/gas/config/tc-loongarch.c index f09220bad5c..307e10c7e1b 100644 --- a/gas/config/tc-loongarch.c +++ b/gas/config/tc-loongarch.c @@ -905,6 +905,8 @@ loongarch_args_parser_can_match_arg_helper (char esc_ch1, char esc_ch2, || BFD_RELOC_LARCH_TLS_DESC_CALL == reloc_type || BFD_RELOC_LARCH_TLS_IE_PC_HI20 == reloc_type || BFD_RELOC_LARCH_TLS_IE_PC_LO12 == reloc_type + || BFD_RELOC_LARCH_GOT_PCADD_HI20 == reloc_type + || BFD_RELOC_LARCH_GOT_PCADD_LO12 == reloc_type || BFD_RELOC_LARCH_TLS_DESC_PCADD_HI20 == reloc_type || BFD_RELOC_LARCH_TLS_DESC_PCADD_LO12 == reloc_type || BFD_RELOC_LARCH_TLS_IE_PCADD_HI20 == reloc_type @@ -1289,7 +1291,10 @@ append_fixp_and_insn (struct loongarch_cl_insn *ip) || BFD_RELOC_LARCH_TLS_LE_HI20 == reloc_info[0].type || BFD_RELOC_LARCH_TLS_LE_LO12 == reloc_info[0].type || BFD_RELOC_LARCH_TLS_LE64_LO20 == reloc_info[0].type - || BFD_RELOC_LARCH_TLS_LE64_HI12 == reloc_info[0].type)) + || BFD_RELOC_LARCH_TLS_LE64_HI12 == reloc_info[0].type + || BFD_RELOC_LARCH_GOT_PCADD_HI20 == reloc_info[0].type + || BFD_RELOC_LARCH_TLS_IE_PCADD_HI20 == reloc_info[0].type + || BFD_RELOC_LARCH_TLS_DESC_PCADD_HI20 == reloc_info[0].type)) { frag_wane (frag_now); frag_new (0); diff --git a/include/opcode/loongarch.h b/include/opcode/loongarch.h index 367dc2392a5..861bcd3dae0 100644 --- a/include/opcode/loongarch.h +++ b/include/opcode/loongarch.h @@ -36,6 +36,7 @@ extern "C" #define LARCH_MK_ADDI_D 0xffc00000 #define LARCH_OP_ADDI_D 0x02c00000 + #define LARCH_MK_ADDI_W LARCH_MK_ADDI_D #define LARCH_OP_ADDI_W 0x02800000 #define LARCH_MK_PCADDI 0xfe000000 #define LARCH_OP_PCADDI 0x18000000 @@ -50,6 +51,7 @@ extern "C" #define LARCH_OP_LU12I_W 0x14000000 #define LARCH_MK_LD_D 0xffc00000 #define LARCH_OP_LD_D 0x28c00000 + #define LARCH_MK_LD_W LARCH_MK_LD_D #define LARCH_OP_LD_W 0x28800000 #define LARCH_MK_JIRL 0xfc000000 #define LARCH_OP_JIRL 0x4c000000 @@ -83,6 +85,7 @@ extern "C" #define LARCH_INSN_ORI(insn) LARCH_INSN_OPS((insn), ORI) #define LARCH_INSN_LU12I_W(insn) LARCH_INSN_OPS((insn), LU12I_W) #define LARCH_INSN_LD_D(insn) LARCH_INSN_OPS((insn), LD_D) + #define LARCH_INSN_LD_W(insn) LARCH_INSN_OPS((insn), LD_W) #define LARCH_INSN_JIRL(insn) LARCH_INSN_OPS((insn), JIRL) #define LARCH_INSN_BCEQZ(insn) LARCH_INSN_OPS((insn), BCEQZ) #define LARCH_INSN_BCNEZ(insn) LARCH_INSN_OPS((insn), BCNEZ) From patchwork Tue Dec 2 11:17:45 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: mengqinggang X-Patchwork-Id: 125762 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from vm01.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 167E94BBCDB9 for ; Tue, 2 Dec 2025 11:28:04 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 167E94BBCDB9 X-Original-To: binutils@sourceware.org Delivered-To: binutils@sourceware.org Received: from mail.loongson.cn (mail.loongson.cn [114.242.206.163]) by sourceware.org (Postfix) with ESMTP id E37474D10855 for ; Tue, 2 Dec 2025 11:22:19 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org E37474D10855 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=loongson.cn Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=loongson.cn ARC-Filter: OpenARC Filter v1.0.0 sourceware.org E37474D10855 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=114.242.206.163 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1764674540; cv=none; b=jIRs15Bd7/mygR62/iLToTcUjNfBhiZ6pU+4/N3h1TenPsuB3fVv3oCv1X/mfBBXsCsFXzcLL9yCB0XghBGICFJZ41JNo5mDxzGs/nvyokF41RcOdRIkZQIXVcvATY+jhlRsXfGa+Y92hdrJmTTTUnuY0Tx9ptBJaQvkmOsUq0s= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1764674540; c=relaxed/simple; bh=LV/ax/jlKVsd9DZYasUwGyE/j1XHoqw6uMElkoRphsk=; h=From:To:Subject:Date:Message-Id:MIME-Version; b=Tcz0NsK7F+ihU6UGK684f9XWiw3iZcOHP40hfKmyS0oABuGEp7OJfqW9h0ne1b7rq5pVy8ZtNDPZ2c1mnW1NjIKJnCQ6q8g+S8AJn3g5fXoJicsdykv1D8ntAKyYeoD6lvtmhZ6tDKiG8poKaeZ358TJdqj4Es6XGhMsq3llcnU= ARC-Authentication-Results: i=1; server2.sourceware.org DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org E37474D10855 Received: from loongson.cn (unknown [10.2.6.7]) by gateway (Coremail) with SMTP id _____8Cx77+vyy5pPkkqAA--.23159S3; Tue, 02 Dec 2025 19:21:19 +0800 (CST) Received: from amd9754.. (unknown [10.2.6.7]) by front1 (Coremail) with SMTP id qMiowJBxpeSuyy5pdXxEAQ--.50049S2; Tue, 02 Dec 2025 19:21:18 +0800 (CST) From: mengqinggang To: binutils@sourceware.org Cc: xuchenghua@loongson.cn, chenglulu@loongson.cn, cailulu@loongson.cn, xry111@xry111.site, i.swmail@xen0n.name, maskray@google.com, luweining@loongson.cn, hejinyang@loongson.cn, c@jia.je, mengqinggang@loongson.cn Subject: [PATCH v2 12/12] LoongArch32: Fixed several regression test failures in gas and ld Date: Tue, 2 Dec 2025 19:17:45 +0800 Message-Id: <20251202111745.1558349-13-mengqinggang@loongson.cn> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20251202111745.1558349-1-mengqinggang@loongson.cn> References: <20251202111745.1558349-1-mengqinggang@loongson.cn> MIME-Version: 1.0 X-CM-TRANSID: qMiowJBxpeSuyy5pdXxEAQ--.50049S2 X-CM-SenderInfo: 5phqw15lqjwttqj6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== X-Spam-Status: No, score=-12.9 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, RCVD_IN_DNSWL_BLOCKED, RCVD_IN_VALIDITY_RPBL_BLOCKED, RCVD_IN_VALIDITY_SAFE_BLOCKED, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: binutils-bounces~patchwork=sourceware.org@sourceware.org From: Lulu Cai Fixed several test failures caused by the LoongArch32 assembler adding labels during assembly. Additionally, skipped tests specific to LoongArch64. --- gas/testsuite/gas/loongarch/macro_op_32.d | 72 ++++++++++--------- ld/testsuite/ld-loongarch-elf/disas-jirl-32.d | 14 ++-- ld/testsuite/ld-loongarch-elf/macro_op_32.d | 72 ++++++++++--------- ld/testsuite/ld-loongarch-elf/pic.exp | 4 +- 4 files changed, 88 insertions(+), 74 deletions(-) diff --git a/gas/testsuite/gas/loongarch/macro_op_32.d b/gas/testsuite/gas/loongarch/macro_op_32.d index 8fd69922c14..2d6384dfeef 100644 --- a/gas/testsuite/gas/loongarch/macro_op_32.d +++ b/gas/testsuite/gas/loongarch/macro_op_32.d @@ -12,40 +12,46 @@ Disassembly of section .text: 4: 02bffc04 li.w \$a0, -1 8: 00150004 move \$a0, \$zero c: 02bffc04 li.w \$a0, -1 - 10: 1a000004 pcalau12i \$a0, 0 - 10: R_LARCH_GOT_PC_HI20 .L1 + +0+10 <.Lpcadd_hi0>: + 10: 1c000004 pcaddu12i \$a0, 0 + 10: R_LARCH_GOT_PCADD_HI20 .L1 10: R_LARCH_RELAX \*ABS\* 14: 28800084 ld.w \$a0, \$a0, 0 - 14: R_LARCH_GOT_PC_LO12 .L1 + 14: R_LARCH_GOT_PCADD_LO12 .Lpcadd_hi0 14: R_LARCH_RELAX \*ABS\* - 18: 1a000004 pcalau12i \$a0, 0 - 18: R_LARCH_GOT_PC_HI20 .L1 + +0+18 <.Lpcadd_hi1>: + 18: 1c000004 pcaddu12i \$a0, 0 + 18: R_LARCH_GOT_PCADD_HI20 .L1 18: R_LARCH_RELAX \*ABS\* 1c: 28800084 ld.w \$a0, \$a0, 0 - 1c: R_LARCH_GOT_PC_LO12 .L1 + 1c: R_LARCH_GOT_PCADD_LO12 .Lpcadd_hi1 1c: R_LARCH_RELAX \*ABS\* - 20: 1a000004 pcalau12i \$a0, 0 - 20: R_LARCH_PCALA_HI20 .L1 - 20: R_LARCH_RELAX \*ABS\* + +0+20 <.Lpcadd_hi2>: + 20: 1c000004 pcaddu12i \$a0, 0 + 20: R_LARCH_PCADD_HI20 .L1 24: 02800084 addi.w \$a0, \$a0, 0 - 24: R_LARCH_PCALA_LO12 .L1 - 24: R_LARCH_RELAX \*ABS\* + 24: R_LARCH_PCADD_LO12 .Lpcadd_hi2 28: 14000004 lu12i.w \$a0, 0 28: R_LARCH_MARK_LA \*ABS\* 28: R_LARCH_ABS_HI20 .L1 2c: 03800084 ori \$a0, \$a0, 0x0 2c: R_LARCH_ABS_LO12 .L1 - 30: 1a000004 pcalau12i \$a0, 0 - 30: R_LARCH_PCALA_HI20 .L1 - 30: R_LARCH_RELAX \*ABS\* + +0+30 <.Lpcadd_hi3>: + 30: 1c000004 pcaddu12i \$a0, 0 + 30: R_LARCH_PCADD_HI20 .L1 34: 02800084 addi.w \$a0, \$a0, 0 - 34: R_LARCH_PCALA_LO12 .L1 - 34: R_LARCH_RELAX \*ABS\* - 38: 1a000004 pcalau12i \$a0, 0 - 38: R_LARCH_GOT_PC_HI20 .L1 + 34: R_LARCH_PCADD_LO12 .Lpcadd_hi3 + +0+38 <.Lpcadd_hi4>: + 38: 1c000004 pcaddu12i \$a0, 0 + 38: R_LARCH_GOT_PCADD_HI20 .L1 38: R_LARCH_RELAX \*ABS\* 3c: 28800084 ld.w \$a0, \$a0, 0 - 3c: R_LARCH_GOT_PC_LO12 .L1 + 3c: R_LARCH_GOT_PCADD_LO12 .Lpcadd_hi4 3c: R_LARCH_RELAX \*ABS\* 40: 14000004 lu12i.w \$a0, 0 40: R_LARCH_TLS_LE_HI20 TLS1 @@ -53,21 +59,23 @@ Disassembly of section .text: 44: 03800084 ori \$a0, \$a0, 0x0 44: R_LARCH_TLS_LE_LO12 TLS1 44: R_LARCH_RELAX \*ABS\* - 48: 1a000004 pcalau12i \$a0, 0 - 48: R_LARCH_TLS_IE_PC_HI20 TLS1 + +0+48 <.Lpcadd_hi5>: + 48: 1c000004 pcaddu12i \$a0, 0 + 48: R_LARCH_TLS_IE_PCADD_HI20 TLS1 48: R_LARCH_RELAX \*ABS\* 4c: 28800084 ld.w \$a0, \$a0, 0 - 4c: R_LARCH_TLS_IE_PC_LO12 TLS1 + 4c: R_LARCH_TLS_IE_PCADD_LO12 .Lpcadd_hi5 4c: R_LARCH_RELAX \*ABS\* - 50: 1a000004 pcalau12i \$a0, 0 - 50: R_LARCH_TLS_LD_PC_HI20 TLS1 - 50: R_LARCH_RELAX \*ABS\* + +0+50 <.Lpcadd_hi6>: + 50: 1c000004 pcaddu12i \$a0, 0 + 50: R_LARCH_TLS_LD_PCADD_HI20 TLS1 54: 02800084 addi.w \$a0, \$a0, 0 - 54: R_LARCH_GOT_PC_LO12 TLS1 - 54: R_LARCH_RELAX \*ABS\* - 58: 1a000004 pcalau12i \$a0, 0 - 58: R_LARCH_TLS_GD_PC_HI20 TLS1 - 58: R_LARCH_RELAX \*ABS\* + 54: R_LARCH_TLS_LD_PCADD_LO12 .Lpcadd_hi6 + +0+58 <.Lpcadd_hi7>: + 58: 1c000004 pcaddu12i \$a0, 0 + 58: R_LARCH_TLS_GD_PCADD_HI20 TLS1 5c: 02800084 addi.w \$a0, \$a0, 0 - 5c: R_LARCH_GOT_PC_LO12 TLS1 - 5c: R_LARCH_RELAX \*ABS\* + 5c: R_LARCH_TLS_GD_PCADD_LO12 .Lpcadd_hi7 diff --git a/ld/testsuite/ld-loongarch-elf/disas-jirl-32.d b/ld/testsuite/ld-loongarch-elf/disas-jirl-32.d index cab7a5d4c99..a78bf24e7d3 100644 --- a/ld/testsuite/ld-loongarch-elf/disas-jirl-32.d +++ b/ld/testsuite/ld-loongarch-elf/disas-jirl-32.d @@ -7,11 +7,9 @@ Disassembly of section .text: -00000000.* <_start>: -[ ]+0:[ ]+1a000014[ ]+pcalau12i[ ]+\$t8,[ ]+0 -[ ]+0:[ ]+R_LARCH_PCALA_HI20[ ]+_start -[ ]+0:[ ]+R_LARCH_RELAX[ ]+\*ABS\* -[ ]+4:[ ]+02800294[ ]+addi.w[ ]+\$t8,[ ]+\$t8,[ ]+0 -[ ]+4:[ ]+R_LARCH_PCALA_LO12[ ]+_start -[ ]+4:[ ]+R_LARCH_RELAX[ ]+\*ABS\* -[ ]+8:[ ]+4c000281[ ]+jirl[ ]+\$ra,[ ]+\$t8,[ ]+0 +0+ <_start>: + 0: 1c000014 pcaddu12i \$t8, 0 + 0: R_LARCH_PCADD_HI20 _start + 4: 02800294 addi.w \$t8, \$t8, 0 + 4: R_LARCH_PCADD_LO12 .Lpcadd_hi0 + 8: 4c000281 jirl \$ra, \$t8, 0 diff --git a/ld/testsuite/ld-loongarch-elf/macro_op_32.d b/ld/testsuite/ld-loongarch-elf/macro_op_32.d index 8fd69922c14..2d6384dfeef 100644 --- a/ld/testsuite/ld-loongarch-elf/macro_op_32.d +++ b/ld/testsuite/ld-loongarch-elf/macro_op_32.d @@ -12,40 +12,46 @@ Disassembly of section .text: 4: 02bffc04 li.w \$a0, -1 8: 00150004 move \$a0, \$zero c: 02bffc04 li.w \$a0, -1 - 10: 1a000004 pcalau12i \$a0, 0 - 10: R_LARCH_GOT_PC_HI20 .L1 + +0+10 <.Lpcadd_hi0>: + 10: 1c000004 pcaddu12i \$a0, 0 + 10: R_LARCH_GOT_PCADD_HI20 .L1 10: R_LARCH_RELAX \*ABS\* 14: 28800084 ld.w \$a0, \$a0, 0 - 14: R_LARCH_GOT_PC_LO12 .L1 + 14: R_LARCH_GOT_PCADD_LO12 .Lpcadd_hi0 14: R_LARCH_RELAX \*ABS\* - 18: 1a000004 pcalau12i \$a0, 0 - 18: R_LARCH_GOT_PC_HI20 .L1 + +0+18 <.Lpcadd_hi1>: + 18: 1c000004 pcaddu12i \$a0, 0 + 18: R_LARCH_GOT_PCADD_HI20 .L1 18: R_LARCH_RELAX \*ABS\* 1c: 28800084 ld.w \$a0, \$a0, 0 - 1c: R_LARCH_GOT_PC_LO12 .L1 + 1c: R_LARCH_GOT_PCADD_LO12 .Lpcadd_hi1 1c: R_LARCH_RELAX \*ABS\* - 20: 1a000004 pcalau12i \$a0, 0 - 20: R_LARCH_PCALA_HI20 .L1 - 20: R_LARCH_RELAX \*ABS\* + +0+20 <.Lpcadd_hi2>: + 20: 1c000004 pcaddu12i \$a0, 0 + 20: R_LARCH_PCADD_HI20 .L1 24: 02800084 addi.w \$a0, \$a0, 0 - 24: R_LARCH_PCALA_LO12 .L1 - 24: R_LARCH_RELAX \*ABS\* + 24: R_LARCH_PCADD_LO12 .Lpcadd_hi2 28: 14000004 lu12i.w \$a0, 0 28: R_LARCH_MARK_LA \*ABS\* 28: R_LARCH_ABS_HI20 .L1 2c: 03800084 ori \$a0, \$a0, 0x0 2c: R_LARCH_ABS_LO12 .L1 - 30: 1a000004 pcalau12i \$a0, 0 - 30: R_LARCH_PCALA_HI20 .L1 - 30: R_LARCH_RELAX \*ABS\* + +0+30 <.Lpcadd_hi3>: + 30: 1c000004 pcaddu12i \$a0, 0 + 30: R_LARCH_PCADD_HI20 .L1 34: 02800084 addi.w \$a0, \$a0, 0 - 34: R_LARCH_PCALA_LO12 .L1 - 34: R_LARCH_RELAX \*ABS\* - 38: 1a000004 pcalau12i \$a0, 0 - 38: R_LARCH_GOT_PC_HI20 .L1 + 34: R_LARCH_PCADD_LO12 .Lpcadd_hi3 + +0+38 <.Lpcadd_hi4>: + 38: 1c000004 pcaddu12i \$a0, 0 + 38: R_LARCH_GOT_PCADD_HI20 .L1 38: R_LARCH_RELAX \*ABS\* 3c: 28800084 ld.w \$a0, \$a0, 0 - 3c: R_LARCH_GOT_PC_LO12 .L1 + 3c: R_LARCH_GOT_PCADD_LO12 .Lpcadd_hi4 3c: R_LARCH_RELAX \*ABS\* 40: 14000004 lu12i.w \$a0, 0 40: R_LARCH_TLS_LE_HI20 TLS1 @@ -53,21 +59,23 @@ Disassembly of section .text: 44: 03800084 ori \$a0, \$a0, 0x0 44: R_LARCH_TLS_LE_LO12 TLS1 44: R_LARCH_RELAX \*ABS\* - 48: 1a000004 pcalau12i \$a0, 0 - 48: R_LARCH_TLS_IE_PC_HI20 TLS1 + +0+48 <.Lpcadd_hi5>: + 48: 1c000004 pcaddu12i \$a0, 0 + 48: R_LARCH_TLS_IE_PCADD_HI20 TLS1 48: R_LARCH_RELAX \*ABS\* 4c: 28800084 ld.w \$a0, \$a0, 0 - 4c: R_LARCH_TLS_IE_PC_LO12 TLS1 + 4c: R_LARCH_TLS_IE_PCADD_LO12 .Lpcadd_hi5 4c: R_LARCH_RELAX \*ABS\* - 50: 1a000004 pcalau12i \$a0, 0 - 50: R_LARCH_TLS_LD_PC_HI20 TLS1 - 50: R_LARCH_RELAX \*ABS\* + +0+50 <.Lpcadd_hi6>: + 50: 1c000004 pcaddu12i \$a0, 0 + 50: R_LARCH_TLS_LD_PCADD_HI20 TLS1 54: 02800084 addi.w \$a0, \$a0, 0 - 54: R_LARCH_GOT_PC_LO12 TLS1 - 54: R_LARCH_RELAX \*ABS\* - 58: 1a000004 pcalau12i \$a0, 0 - 58: R_LARCH_TLS_GD_PC_HI20 TLS1 - 58: R_LARCH_RELAX \*ABS\* + 54: R_LARCH_TLS_LD_PCADD_LO12 .Lpcadd_hi6 + +0+58 <.Lpcadd_hi7>: + 58: 1c000004 pcaddu12i \$a0, 0 + 58: R_LARCH_TLS_GD_PCADD_HI20 TLS1 5c: 02800084 addi.w \$a0, \$a0, 0 - 5c: R_LARCH_GOT_PC_LO12 TLS1 - 5c: R_LARCH_RELAX \*ABS\* + 5c: R_LARCH_TLS_GD_PCADD_LO12 .Lpcadd_hi7 diff --git a/ld/testsuite/ld-loongarch-elf/pic.exp b/ld/testsuite/ld-loongarch-elf/pic.exp index 510c3fd8c0d..177ce89313f 100644 --- a/ld/testsuite/ld-loongarch-elf/pic.exp +++ b/ld/testsuite/ld-loongarch-elf/pic.exp @@ -111,7 +111,7 @@ set link_tests [list \ run_ld_link_tests $link_tests - +if [istarget "loongarch64-*-*"] { set link_tests_libc [list \ [list \ "$testname readelf -s/-r nopic-global-so" \ @@ -208,6 +208,6 @@ set link_exec_tests [list \ # 8:linker warning (optional) # 9:ld trailing options, placed after object files (optional) run_ld_link_exec_tests $link_exec_tests - +} #set verbose old_verbose