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CTRY:GB; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:outbound-uk1.az.dlp.m.darktrace.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230040)(82310400026)(36860700013)(35042699022)(14060799003)(376014)(1800799024); DIR:OUT; SFP:1101; X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 18 Sep 2025 15:07:02.7929 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 77eface3-6930-4caf-5b3f-08ddf6c5062d X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d; Ip=[4.158.2.129]; Helo=[outbound-uk1.az.dlp.m.darktrace.com] X-MS-Exchange-CrossTenant-AuthSource: DU6PEPF00009523.eurprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: AS2PR08MB9546 X-Spam-Status: No, score=-11.2 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FORGED_SPF_HELO, GIT_PATCH_0, RCVD_IN_MSPIKE_H2, RCVD_IN_VALIDITY_RPBL_BLOCKED, RCVD_IN_VALIDITY_SAFE_BLOCKED, SPF_HELO_PASS, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: binutils-bounces~patchwork=sourceware.org@sourceware.org In the case of non-contiguous memory regions, a far-call stub section must be assigned to the memory of the section it was originally emitted for. If the stub section does not fit, the section is marked as dropped, and removed later. To emit a useful message to the user, however, a stub section needs to be discernible from sections originating from input objects. Previously [1], this distinction was made using the SEC_LINKER_CREATED flag only the AArch32 backend handler _add_stub_section. Other backends that didn't set this flag on their stub sections skipped required checks in ld/ldlang.c:size_input_section(). On AArch64, this caused the linker to proceed into code paths that assumed output sections were set, instead of reporting fatal errors, and ultimately led to a segmentation fault. However, the SEC_LINKER_CREATED flag does not solely indicate that a section was created by the linker. Its original meaning also meant that the section should not be handled by the generic relocation code. Reusing this flag to identify stub sections, while it appeared to fix the issue, introduced unintended side effects. On PowerPC, for instance, it skipped relocations present in the stubs and interpreted them as absolute addresses. This patch proposes a new approach: a new boolean attribute 'veneer' added to 'asection'. The attribute is set on AArch64 and PowerPC immediately after the creation of the stub section. Others architectures are left unchanged, as they do not appear to support non-contiguous memory regions (no tests were found to verify the fix). Additionally, the diagnostic message was improved when a stub cannot be placed in the same memory region as its referencing code. [1]: abf874a, Add support for non-contiguous memory regions. --- bfd/bfd-in2.h | 6 ++++++ bfd/libbfd.h | 4 ++-- bfd/section.c | 10 ++++++++-- ld/emultempl/aarch64elf.em | 2 ++ ld/emultempl/armelf.em | 5 +++-- ld/emultempl/ppc64elf.em | 2 ++ ld/ldlang.c | 13 +++++++------ ld/testsuite/ld-arm/non-contiguous-arm4.d | 2 +- ld/testsuite/ld-powerpc/non-contiguous-powerpc64.d | 2 +- 9 files changed, 32 insertions(+), 14 deletions(-) diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h index 5e7c6ddf1ee..a4049fa0e98 100644 --- a/bfd/bfd-in2.h +++ b/bfd/bfd-in2.h @@ -834,6 +834,12 @@ typedef struct bfd_section const char *linked_to_symbol_name; } map_head, map_tail; + /* Indicate that the section contains branch veneers. This is used when + support for non-contiguous memory regions is enabled. The veneers have + to be allocated to the same memory region as the code they are refered + by, i.e. they cannot be moved to a subsequent memory region. */ + bool veneer; + /* Points to the output section this section is already assigned to, if any. This is used when support for non-contiguous memory regions is enabled. */ diff --git a/bfd/libbfd.h b/bfd/libbfd.h index f2485d99078..df9d5c8cc19 100644 --- a/bfd/libbfd.h +++ b/bfd/libbfd.h @@ -3694,8 +3694,8 @@ bool _bfd_unrecognized_reloc /* symbol, */ \ (struct bfd_symbol *) SYM, \ \ - /* map_head, map_tail, already_assigned, type */ \ - { NULL }, { NULL }, NULL, 0 \ + /* map_head, map_tail, veneer, already_assigned, type */ \ + { NULL }, { NULL }, false, NULL, 0 \ \ } diff --git a/bfd/section.c b/bfd/section.c index 5f0cf6e71cb..33524762e7a 100644 --- a/bfd/section.c +++ b/bfd/section.c @@ -560,6 +560,12 @@ CODE_FRAGMENT . const char *linked_to_symbol_name; . } map_head, map_tail; . +. {* Indicate that the section contains branch veneers. This is used when +. support for non-contiguous memory regions is enabled. The veneers have +. to be allocated to the same memory region as the code they are refered +. by, i.e. they cannot be moved to a subsequent memory region. *} +. bool veneer; +. . {* Points to the output section this section is already assigned to, . if any. This is used when support for non-contiguous memory . regions is enabled. *} @@ -747,8 +753,8 @@ INTERNAL . {* symbol, *} \ . (struct bfd_symbol *) SYM, \ . \ -. {* map_head, map_tail, already_assigned, type *} \ -. { NULL }, { NULL }, NULL, 0 \ +. {* map_head, map_tail, veneer, already_assigned, type *} \ +. { NULL }, { NULL }, false, NULL, 0 \ . \ . } . diff --git a/ld/emultempl/aarch64elf.em b/ld/emultempl/aarch64elf.em index 91d58d8fe5a..08f5c4c7d58 100644 --- a/ld/emultempl/aarch64elf.em +++ b/ld/emultempl/aarch64elf.em @@ -200,6 +200,8 @@ elf${ELFSIZE}_aarch64_add_stub_section (const char *stub_sec_name, if (stub_sec == NULL) goto err_ret; + stub_sec->veneer = true; + /* Long branch stubs contain a 64-bit address, so the section requires 8 byte alignment. */ bfd_set_section_alignment (stub_sec, 3); diff --git a/ld/emultempl/armelf.em b/ld/emultempl/armelf.em index 6f652c59a3c..d946f096faa 100644 --- a/ld/emultempl/armelf.em +++ b/ld/emultempl/armelf.em @@ -237,13 +237,14 @@ elf32_arm_add_stub_section (const char * stub_sec_name, struct hook_stub_info info; flags = (SEC_ALLOC | SEC_LOAD | SEC_READONLY | SEC_CODE - | SEC_HAS_CONTENTS | SEC_RELOC | SEC_IN_MEMORY | SEC_KEEP - | SEC_LINKER_CREATED); + | SEC_HAS_CONTENTS | SEC_RELOC | SEC_IN_MEMORY | SEC_KEEP); stub_sec = bfd_make_section_anyway_with_flags (stub_file->the_bfd, stub_sec_name, flags); if (stub_sec == NULL) goto err_ret; + stub_sec->veneer = true; + bfd_set_section_alignment (stub_sec, alignment_power); os = lang_output_section_get (output_section); diff --git a/ld/emultempl/ppc64elf.em b/ld/emultempl/ppc64elf.em index 857cf54ad06..8e3f60cb12a 100644 --- a/ld/emultempl/ppc64elf.em +++ b/ld/emultempl/ppc64elf.em @@ -440,6 +440,8 @@ ppc_add_stub_section (const char *stub_sec_name, asection *input_section) : 5))) goto err_ret; + stub_sec->veneer = true; + output_section = input_section->output_section; os = lang_output_section_get (output_section); diff --git a/ld/ldlang.c b/ld/ldlang.c index 3c57bf7541c..bdda599a7a4 100644 --- a/ld/ldlang.c +++ b/ld/ldlang.c @@ -5637,10 +5637,12 @@ size_input_section if (dot + TO_ADDR (i->size) > end) { - if (i->flags & SEC_LINKER_CREATED) - fatal (_("%P: Output section `%pA' not large enough for " - "the linker-created stubs section `%pA'.\n"), - i->output_section, i); + if (i->veneer) + fatal (_("%P: Memory region `%s' not large enough for the " + "linker-created stubs section `%pA' associated to " + "output section `%pA'\n"), + output_section_statement->region->name_list.name, i, + i->output_section); if (i->rawsize && i->rawsize != i->size) fatal (_("%P: Relaxation not supported with " @@ -8239,8 +8241,7 @@ warn_non_contiguous_discards (void) continue; for (asection *s = file->the_bfd->sections; s != NULL; s = s->next) - if (s->output_section == NULL - && (s->flags & SEC_LINKER_CREATED) == 0) + if (s->output_section == NULL && !s->veneer) einfo (_("%P: warning: --enable-non-contiguous-regions " "discards section `%pA' from `%pB'\n"), s, file->the_bfd); diff --git a/ld/testsuite/ld-arm/non-contiguous-arm4.d b/ld/testsuite/ld-arm/non-contiguous-arm4.d index a8e9d66caca..d4c4b284dce 100644 --- a/ld/testsuite/ld-arm/non-contiguous-arm4.d +++ b/ld/testsuite/ld-arm/non-contiguous-arm4.d @@ -1,4 +1,4 @@ #name: non-contiguous-arm4 #source: non-contiguous-arm.s #ld: --enable-non-contiguous-regions -T non-contiguous-arm4.ld -# error: .*Output section .?\.ramu.? not large enough for the linker-created stubs section .?\.code\.3\.__stub.\.? +# error: Memory region `RAMU' not large enough for the linker-created stubs section `\.code\.3\.__stub' associated to output section `\.ramu' diff --git a/ld/testsuite/ld-powerpc/non-contiguous-powerpc64.d b/ld/testsuite/ld-powerpc/non-contiguous-powerpc64.d index 9f903bbea35..1a7e4c5a23b 100644 --- a/ld/testsuite/ld-powerpc/non-contiguous-powerpc64.d +++ b/ld/testsuite/ld-powerpc/non-contiguous-powerpc64.d @@ -2,4 +2,4 @@ #source: non-contiguous-powerpc.s #as: -a64 #ld: -melf64ppc --enable-non-contiguous-regions -T non-contiguous-powerpc.ld -#error: .*Could not assign .?\.text\.one\.stub.? to an output section\. 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This patch adds BFD_ASSERTs in the previously segfaulting code, to explicitly state code assumptions. --- bfd/elfnn-aarch64.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/bfd/elfnn-aarch64.c b/bfd/elfnn-aarch64.c index 4517567a554..5b22d099646 100644 --- a/bfd/elfnn-aarch64.c +++ b/bfd/elfnn-aarch64.c @@ -3275,6 +3275,7 @@ aarch64_build_one_stub (struct bfd_hash_entry *gen_entry, stub_entry->target_section); stub_sec = stub_entry->stub_sec; + BFD_ASSERT (stub_sec->output_section != NULL); /* The layout must not change when a stub may be the target of another. */ if (htab->has_double_stub) @@ -7013,6 +7014,7 @@ elfNN_aarch64_relocate_section (bfd *output_bfd, sym = local_syms + r_symndx; sym_type = ELFNN_ST_TYPE (sym->st_info); sec = local_sections[r_symndx]; + BFD_ASSERT (sec->output_section != NULL); /* An object file might have a reference to a local undefined symbol. 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CTRY:GB; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:outbound-uk1.az.dlp.m.darktrace.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230040)(1800799024)(36860700013)(14060799003)(35042699022)(82310400026)(376014); DIR:OUT; SFP:1101; X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 18 Sep 2025 15:07:18.5744 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: c58c6dcc-6498-4846-b870-08ddf6c50f91 X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d; Ip=[4.158.2.129]; Helo=[outbound-uk1.az.dlp.m.darktrace.com] X-MS-Exchange-CrossTenant-AuthSource: AM3PEPF0000A793.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PAXPR08MB6415 X-Spam-Status: No, score=-11.1 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FORGED_SPF_HELO, GIT_PATCH_0, POISEN_SPAM_PILL, POISEN_SPAM_PILL_1, POISEN_SPAM_PILL_3, SPF_HELO_PASS, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: binutils-bounces~patchwork=sourceware.org@sourceware.org In the case of non-contiguous memory regions, if an input section did not fit in any of the designated memory regions, the linker marked it as discarded, and warn_non_contiguous_discards() would only issue warning on it, relying on later unresolved symbol errors to terminate the process before a crash occur. This approach was insufficient, and crashes did occur on AArch64. This patch renames warn_non_contiguous_discards () to a name that does not contain "discard" as it created some confusion with the /DISCARD/ output section. It also promotes the warnings to errors, and ensures that the link process terminates cleanly if any input section is not allocated to an output section. It also updates an AArch32 test expectations to match the corrected behavior. Tests for the crash cases are added in a subsequent patch. --- ld/ldlang.c | 29 ++++++++++++++------- ld/testsuite/ld-arm/non-contiguous-arm7.err | 9 +++---- 2 files changed, 23 insertions(+), 15 deletions(-) diff --git a/ld/ldlang.c b/ld/ldlang.c index bdda599a7a4..454887d71f4 100644 --- a/ld/ldlang.c +++ b/ld/ldlang.c @@ -5576,7 +5576,7 @@ size_input_section lang_input_section_type *is = &((*this_ptr)->input_section); asection *i = is->section; asection *o = output_section_statement->bfd_section; - *removed = 0; + *removed = false; if (link_info.non_contiguous_regions) { @@ -5587,7 +5587,7 @@ size_input_section have reinitialized its size. */ if (i->already_assigned && i->already_assigned != o) { - *removed = 1; + *removed = true; return dot; } } @@ -5650,7 +5650,7 @@ size_input_section "would overflow `%pA' after it changed size).\n"), i, i->output_section); - *removed = 1; + *removed = true; dot = end; i->output_section = NULL; return dot; @@ -8231,9 +8231,14 @@ lang_propagate_lma_regions (void) } } +/* Checks whether any input section was not allocated to an output section. + If such a case is found, emits an error for the corresponding input section + and stops the link process. */ + static void -warn_non_contiguous_discards (void) +error_non_contiguous_unallocated_sections (void) { + bool removed_section = false; LANG_FOR_EACH_INPUT_STATEMENT (file) { if ((file->the_bfd->flags & (BFD_LINKER_CREATED | DYNAMIC)) != 0 @@ -8242,10 +8247,15 @@ warn_non_contiguous_discards (void) for (asection *s = file->the_bfd->sections; s != NULL; s = s->next) if (s->output_section == NULL && !s->veneer) - einfo (_("%P: warning: --enable-non-contiguous-regions " - "discards section `%pA' from `%pB'\n"), - s, file->the_bfd); + { + einfo (_("%P: error: --enable-non-contiguous-regions was not able " + "to allocate the input section `%pA' (%pB) to an output " + "section\n"), s, file->the_bfd); + removed_section = true; + } } + if (removed_section) + fatal (_("%P: final link failed\n")); } static void @@ -8663,9 +8673,8 @@ lang_process (void) if (command_line.check_section_addresses) lang_check_section_addresses (); - if (link_info.non_contiguous_regions - && link_info.non_contiguous_regions_warnings) - warn_non_contiguous_discards (); + if (link_info.non_contiguous_regions) + error_non_contiguous_unallocated_sections (); /* Check any required symbols are known. */ ldlang_check_require_defined_symbols (); diff --git a/ld/testsuite/ld-arm/non-contiguous-arm7.err b/ld/testsuite/ld-arm/non-contiguous-arm7.err index 7b3a3d8c3c9..21f71898eb1 100644 --- a/ld/testsuite/ld-arm/non-contiguous-arm7.err +++ b/ld/testsuite/ld-arm/non-contiguous-arm7.err @@ -1,5 +1,4 @@ -.* may change behaviour for section .?\.bss.? from .* -.* may change behaviour for section .?\.bss\.MY_BUF.? from .* -.* discards section .?\.bss\.MY_BUF.? from .* -.* unresolvable R_ARM_ABS32 relocation against symbol .?MY_BUF.? -.* final link failed +.*: warning: --enable-non-contiguous-regions may change behaviour for section `\.bss' from `.*non-contiguous-arm7\.o' \(assigned to \.bss, but additional match: \.bss_ram2\) +.*: warning: --enable-non-contiguous-regions may change behaviour for section `\.bss\.MY_BUF' from `.*non-contiguous-arm7\.o' \(assigned to \.bss, but additional match: \.bss_ram2\) +.*: error: --enable-non-contiguous-regions was not able to allocate the input section `\.bss\.MY_BUF' \(.*non-contiguous-arm7\.o\) to an output section +.*: final link failed From patchwork Thu Sep 18 15:06:05 2025 Content-Type: text/plain; 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CTRY:GB; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:outbound-uk1.az.dlp.m.darktrace.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230040)(82310400026)(36860700013)(376014)(35042699022)(1800799024)(14060799003); DIR:OUT; SFP:1101; X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 18 Sep 2025 15:07:34.9610 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 909cdad9-8375-4725-cebb-08ddf6c51959 X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d; Ip=[4.158.2.129]; Helo=[outbound-uk1.az.dlp.m.darktrace.com] X-MS-Exchange-CrossTenant-AuthSource: DB5PEPF00014B97.eurprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PAVPR08MB8967 X-Spam-Status: No, score=-11.1 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FORGED_SPF_HELO, GIT_PATCH_0, POISEN_SPAM_PILL, POISEN_SPAM_PILL_1, POISEN_SPAM_PILL_3, SPF_HELO_PASS, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: binutils-bounces~patchwork=sourceware.org@sourceware.org This patch adds AArch64 test cases for all non-contiguous memory scenarios. Those tests were copy-pasted from AArch32, and adapted for AArch64. It also adds a new test case inspired from a real case where several sections containing interrupt vector tables, declared in different compilation units, and all aligned on 2KB, are supposed to be merged into one output section fitting on 2KB memory. --- .../aarch64-non-contiguous-mem.exp | 34 +++++++ .../non-contiguous-mem/non-contiguous-mem-1.s | 37 ++++++++ .../non-contiguous-mem/non-contiguous-mem-2.s | 17 ++++ .../non-contiguous-mem-3-ivt.s | 15 ++++ .../non-contiguous-mem/non-contiguous-mem-3.s | 74 ++++++++++++++++ .../non-contiguous-mem/non-contiguous-nok-1.d | 9 ++ .../non-contiguous-nok-1.ld | 28 ++++++ .../non-contiguous-mem/non-contiguous-nok-2.d | 8 ++ .../non-contiguous-nok-2.ld | 28 ++++++ .../non-contiguous-mem/non-contiguous-nok-3.d | 6 ++ .../non-contiguous-nok-3.err | 4 + .../non-contiguous-nok-3.ld | 26 ++++++ .../non-contiguous-mem/non-contiguous-nok-4.d | 15 ++++ .../non-contiguous-nok-4.ld | 24 +++++ .../non-contiguous-mem/non-contiguous-nok-5.d | 10 +++ .../non-contiguous-nok-5.err | 7 ++ .../non-contiguous-nok-5.ld | 30 +++++++ .../non-contiguous-mem/non-contiguous-ok-1.d | 80 +++++++++++++++++ .../non-contiguous-mem/non-contiguous-ok-1.ld | 28 ++++++ .../non-contiguous-mem/non-contiguous-ok-2.d | 88 +++++++++++++++++++ .../non-contiguous-mem/non-contiguous-ok-2.ld | 28 ++++++ .../non-contiguous-mem/non-contiguous-ok-3.d | 80 +++++++++++++++++ .../non-contiguous-mem/non-contiguous-ok-3.ld | 28 ++++++ .../non-contiguous-mem/non-contiguous-ok-4.d | 83 +++++++++++++++++ .../non-contiguous-mem/non-contiguous-ok-4.ld | 28 ++++++ .../non-contiguous-mem/non-contiguous-ok-5.d | 87 ++++++++++++++++++ .../non-contiguous-mem/non-contiguous-ok-5.ld | 31 +++++++ .../non-contiguous-ok-5.warn | 10 +++ 28 files changed, 943 insertions(+) create mode 100644 ld/testsuite/ld-aarch64/non-contiguous-mem/aarch64-non-contiguous-mem.exp create mode 100644 ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-mem-1.s create mode 100644 ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-mem-2.s create mode 100644 ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-mem-3-ivt.s create mode 100644 ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-mem-3.s create mode 100644 ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-nok-1.d create mode 100644 ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-nok-1.ld create mode 100644 ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-nok-2.d create mode 100644 ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-nok-2.ld create mode 100644 ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-nok-3.d create mode 100644 ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-nok-3.err create mode 100644 ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-nok-3.ld create mode 100644 ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-nok-4.d create mode 100644 ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-nok-4.ld create mode 100644 ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-nok-5.d create mode 100644 ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-nok-5.err create mode 100644 ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-nok-5.ld create mode 100644 ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-ok-1.d create mode 100644 ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-ok-1.ld create mode 100644 ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-ok-2.d create mode 100644 ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-ok-2.ld create mode 100644 ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-ok-3.d create mode 100644 ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-ok-3.ld create mode 100644 ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-ok-4.d create mode 100644 ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-ok-4.ld create mode 100644 ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-ok-5.d create mode 100644 ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-ok-5.ld create mode 100644 ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-ok-5.warn diff --git a/ld/testsuite/ld-aarch64/non-contiguous-mem/aarch64-non-contiguous-mem.exp b/ld/testsuite/ld-aarch64/non-contiguous-mem/aarch64-non-contiguous-mem.exp new file mode 100644 index 00000000000..2eaa6b58249 --- /dev/null +++ b/ld/testsuite/ld-aarch64/non-contiguous-mem/aarch64-non-contiguous-mem.exp @@ -0,0 +1,34 @@ +# Expect script for AARCH64 ELF tests related to GNU properties. +# Copyright (C) 2025 Free Software Foundation, Inc. +# +# This file is part of the GNU Binutils. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, +# MA 02110-1301, USA. + +# Exclude non-aarch64-ELF targets. +if { ![is_elf_format] || ![istarget "aarch64*-*-*"] } { + return +} + +load_file $srcdir/$subdir/../lib/aarch64-elf-lib.exp + +set test_list [lsort [glob -nocomplain $srcdir/$subdir/*.d]] + +foreach t $test_list { + # We need to strip the ".d", but can leave the dirname. + run_dump_test [file rootname $t] \ + [list [list as "-I\$srcdir/\$subdir"]] +} diff --git a/ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-mem-1.s b/ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-mem-1.s new file mode 100644 index 00000000000..5696cba88ba --- /dev/null +++ b/ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-mem-1.s @@ -0,0 +1,37 @@ + .section .code.1, "ax", %progbits + # Fit in RAML + .global code1 + .type code1, %function +code1: + nop + nop + bl code2 + .size code1, . - code1 + + .section .code.2, "ax", %progbits + # Fit in RAML + .global code2 + .type code2, %function +code2: + nop + nop + bl code3 + .size code2, . - code2 + + .section .code.3, "ax", %progbits + # Fit in RAMU + .global code3 + .type code3, %function +code3: + nop + bl code4 + .size code3, . - code3 + + .section .code.4, "ax", %progbits + # Fit in RAMZ + .global code4 + .type code4, %function +code4: +$a: + .fill 20, 4, 0xe1a00000 + .size code4, . - code4 diff --git a/ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-mem-2.s b/ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-mem-2.s new file mode 100644 index 00000000000..a52ac366770 --- /dev/null +++ b/ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-mem-2.s @@ -0,0 +1,17 @@ + .section .bss.MY_BUF, "aw", %nobits + .global MY_BUF + .type MY_BUF, %object +MY_BUF: + .space 102400 /* 100KB */ + .size MY_BUF, . - MY_BUF + + + .section .text.foo,"ax",%progbits + .global foo + .type foo, %function +foo: + ldr x0, .L3 + br lr +.L3: + .word MY_BUF + .size foo, .-foo diff --git a/ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-mem-3-ivt.s b/ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-mem-3-ivt.s new file mode 100644 index 00000000000..dd0efdae55b --- /dev/null +++ b/ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-mem-3-ivt.s @@ -0,0 +1,15 @@ + /* Interrupt vector table. */ + .section .vectors,"ax" + .p2align 11 /* 2KB alignment (2^11) */ + .global vector_table2 +vector_table2: + b irqhandler2 + b irqhandler1 + .size vector_table2, . - vector_table2 + + .global irqhandler2 + .type irqhandler2, %function +irqhandler2: + b foo + eret + .size irqhandler2, . - irqhandler2 diff --git a/ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-mem-3.s b/ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-mem-3.s new file mode 100644 index 00000000000..31cd9ee0ce3 --- /dev/null +++ b/ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-mem-3.s @@ -0,0 +1,74 @@ + .section .boot, "ax", %progbits + .p2align 11 /* 2KB alignment (2^11) */ + # Fit in RAML + .global bootloader + .type bootloader, %function +bootloader: + nop + nop + bl code2 + .size bootloader, . - bootloader + + + /* Interrupt vector table. */ + .section .vectors,"ax" + .p2align 11 /* 2KB alignment (2^11) */ + .global vector_table1 +vector_table1: + b irqhandler1 + .size vector_table1, . - vector_table1 + + .global irqhandler1 + .type irqhandler1, %function +irqhandler1: + eret + .size irqhandler1, . - irqhandler1 + + + .section .code.2, "ax", %progbits + # Fit in RAMU + .global code2 + .type code2, %function +code2: + nop + nop + bl code3 + .size code2, . - code2 + + + /* Interrupt vector table. */ + .section .vectors + .global vector_table3 +vector_table3: + b irqhandler3 + .size vector_table3, . - vector_table3 + + .global irqhandler3 + .type irqhandler3, %function +irqhandler3: + eret + .size irqhandler3, . - irqhandler3 + + .section .code.3, "ax", %progbits + # Fit in RAMU + .global code3 + .type code3, %function +code3: + nop + bl code4 + .size code3, . - code3 + + .section .code.4, "ax", %progbits + # Fit in RAMU + .global code4 + .type code4, %function +code4: +$a: + .fill 20, 4, 0xe1a00000 + .size code4, . - code4 + + .global foo + .type foo, %function +foo: + ret + .size foo, . - foo diff --git a/ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-nok-1.d b/ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-nok-1.d new file mode 100644 index 00000000000..1b540743cb6 --- /dev/null +++ b/ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-nok-1.d @@ -0,0 +1,9 @@ +#name: last section .code.4 is too big to fit in any of the available memories. +## Use case description: +## - sections .code.1 and .code.2 fit in .raml +## - section .code.3 fits in .ramu +## - section .code.4 is too large to fit in .ramz, we should expect an error +## message about unability to assign the input section to an output one. +#source: non-contiguous-mem-1.s +#ld: --enable-non-contiguous-regions -T non-contiguous-nok-1.ld +# error: .*Could not assign .?\.code\.4.? to an output section. Retry without --enable-non-contiguous-regions\. diff --git a/ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-nok-1.ld b/ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-nok-1.ld new file mode 100644 index 00000000000..ff1b6619448 --- /dev/null +++ b/ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-nok-1.ld @@ -0,0 +1,28 @@ +MEMORY +{ + RAML (rwx) : ORIGIN = 0x1FFF0000, LENGTH = 0x0001c + RAMU (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00040 + RAMZ (rwx) : ORIGIN = 0x20040000, LENGTH = 0x00040 +} + +SECTIONS +{ + .raml : + { _raml_start = . ; + *(.boot) ; + *(.code) *(.code.*) ; + _raml_end = . ; + } > RAML + + .ramu : AT ( ADDR (.raml) + SIZEOF (.raml) ) + { _ramu_start = . ; + *(.code) *(.code.*) ; + _ramu_end = . ; + } > RAMU + + .ramz : AT ( ADDR (.ramu) + SIZEOF (.ramu) ) + { _ramz_start = . ; + *(.code) *(.code.*) ; + _ramz_end = . ; + } > RAMZ +} diff --git a/ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-nok-2.d b/ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-nok-2.d new file mode 100644 index 00000000000..9cbab256ccb --- /dev/null +++ b/ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-nok-2.d @@ -0,0 +1,8 @@ +#name: all code sections fit in the available memories BUT farcall stub to jump to code4 DOES NOT not fits in .ramu +## Use case description: +## - sections .code.1 and .code.2 fit in .raml +## - section .code.3 fits in .ramu, but not its farcall stub to jump to code4. +## - section .code.4 fits in .ramz +#source: non-contiguous-mem-1.s +#ld: --enable-non-contiguous-regions -T non-contiguous-nok-2.ld +# error: Memory region `RAMU' not large enough for the linker-created stubs section `\.code\.3\.stub' associated to output section `\.ramu' diff --git a/ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-nok-2.ld b/ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-nok-2.ld new file mode 100644 index 00000000000..6c23900de16 --- /dev/null +++ b/ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-nok-2.ld @@ -0,0 +1,28 @@ +MEMORY +{ + RAML (rwx) : ORIGIN = 0x1FFF0000, LENGTH = 0x0001c + RAMU (rwx) : ORIGIN = 0x20000000, LENGTH = 0x0000c + RAMZ (rwx) : ORIGIN = 0x30040000, LENGTH = 0x00400 +} + +SECTIONS +{ + .raml : + { _raml_start = . ; + *(.boot) ; + *(.code) *(.code.*) ; + _raml_end = . ; + } > RAML + + .ramu : AT ( ADDR (.raml) + SIZEOF (.raml) ) + { _ramu_start = . ; + *(.code) *(.code.*) ; + _ramu_end = . ; + } > RAMU + + .ramz : AT ( ADDR (.ramu) + SIZEOF (.ramu) ) + { _ramz_start = . ; + *(.code) *(.code.*) ; + _ramz_end = . ; + } > RAMZ +} diff --git a/ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-nok-3.d b/ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-nok-3.d new file mode 100644 index 00000000000..34198eef8d0 --- /dev/null +++ b/ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-nok-3.d @@ -0,0 +1,6 @@ +#name: .bss section bigger than all the available RAMs. +## Use case description: +## The section .bss.MY_BUF (100KB) won't fit in RAM1 (64KB) or RAM2 (96KB) +#source: non-contiguous-mem-2.s +#ld: -T non-contiguous-nok-3.ld --enable-non-contiguous-regions --enable-non-contiguous-regions-warnings +#error_output: non-contiguous-nok-3.err diff --git a/ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-nok-3.err b/ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-nok-3.err new file mode 100644 index 00000000000..ca23fc6b0b5 --- /dev/null +++ b/ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-nok-3.err @@ -0,0 +1,4 @@ +.*: warning: --enable-non-contiguous-regions may change behaviour for section .?\.bss.? from .* +.*: warning: --enable-non-contiguous-regions may change behaviour for section .?\.bss\.MY_BUF.? from .* +.*: error: --enable-non-contiguous-regions was not able to allocate the input section `.bss.MY_BUF' \(.*non-contiguous-mem-2\.o\) to an output section +.*: final link failed diff --git a/ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-nok-3.ld b/ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-nok-3.ld new file mode 100644 index 00000000000..5d8100676cf --- /dev/null +++ b/ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-nok-3.ld @@ -0,0 +1,26 @@ +MEMORY +{ + ROM (rx) : ORIGIN = 0x8000000, LENGTH = 10K + RAM1 (xrw) : ORIGIN = 0x10000000, LENGTH = 64K + RAM2 (xrw) : ORIGIN = 0x20000000, LENGTH = 96K +} + +SECTIONS +{ + .text : + { + KEEP(*(.text.foo)) ; + } >ROM + + .bss_ram1 : + { _sbss_ram1 = .; + *(.bss) *(.bss*) ; + _ebss_ram1 = .; + } >RAM1 + + .bss_ram2 : + { _sbss_ram2 = .; + *(.bss) *(.bss*) ; + _ebss_ram2 = .; + } >RAM2 +} diff --git a/ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-nok-4.d b/ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-nok-4.d new file mode 100644 index 00000000000..260eb76dece --- /dev/null +++ b/ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-nok-4.d @@ -0,0 +1,15 @@ +#name: Discard 2nd interrupt vector table because of alignment requirements +## Use case description: +## 3 IVTs are defined in section .vectors (2KB): +## - vector_table1 and vector_table3 in the first file, and vector_table3 does +## not redefine the section, so is directly appended after vector_table1. +## - vector_table2 is defined in a second file, and redefines the section +## .vectors with an alignment of 2KB. +## Since all .vectors sections should be moved to the VECTORS memory (2KB), +## vector_table2 will be discarded as the space was taken by the padding of +## the section defined in the first file. +#source: non-contiguous-mem-3.s +#source: non-contiguous-mem-3-ivt.s +#ld: -T non-contiguous-nok-4.ld --enable-non-contiguous-regions +#error: --enable-non-contiguous-regions was not able to allocate the input section `\.vectors' \(.*non-contiguous-mem-3-ivt\.o\) to an output section +#error: .*: final link failed$ diff --git a/ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-nok-4.ld b/ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-nok-4.ld new file mode 100644 index 00000000000..43fa2c19b71 --- /dev/null +++ b/ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-nok-4.ld @@ -0,0 +1,24 @@ +MEMORY +{ + RAML (rwx) : ORIGIN = 0x8000000, LENGTH = 2K + VECTORS (xrw) : ORIGIN = (0x8000000 + 2048), LENGTH = 2K + RAMU (xrw) : ORIGIN = 0x40000000, LENGTH = 64K +} + +SECTIONS +{ + RAM_REGION_START = ORIGIN(RAML); + .boot : { + *(.bootloader) *(.bootloader.*); + } >RAML + + .vectors : AT ( ADDR (.boot) + SIZEOF (.boot) ) { + *(.vectors) + } >VECTORS + + .text : AT ( ADDR (.vectors) + SIZEOF (.vectors) ) + { _text_start = . ; + *(.code) *(.code.*) ; + _text_end = . ; + } > RAMU +} diff --git a/ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-nok-5.d b/ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-nok-5.d new file mode 100644 index 00000000000..2e42375c59c --- /dev/null +++ b/ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-nok-5.d @@ -0,0 +1,10 @@ +#name: input section is discarded because the output section match clauses succeed the matching DISCARD clause. +## Use case description: +## - sections .code.1, .code.2 and .code.3 (+ farcall stub) fit in .raml +## - section .code.4 fits in .ramz +## - nothing fits in .ramu +## The linker script contains a DISCARD clause for ".code.4" that precedes all +## the output clauses. +#source: non-contiguous-mem-1.s +#ld: --enable-non-contiguous-regions --enable-non-contiguous-regions-warnings -T non-contiguous-nok-5.ld +#error_output: non-contiguous-nok-5.err diff --git a/ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-nok-5.err b/ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-nok-5.err new file mode 100644 index 00000000000..4b14de9f429 --- /dev/null +++ b/ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-nok-5.err @@ -0,0 +1,7 @@ +.*: warning: .* may change behaviour for section `\.code\.1' from .* \(assigned to \.raml, but additional match: \.ramu\) +.*: warning: .* may change behaviour for section `\.code\.2' from .* \(assigned to \.raml, but additional match: \.ramu\) +.*: warning: .* may change behaviour for section `\.code\.3' from .* \(assigned to \.raml, but additional match: \.ramu\) +.*: warning: .* may change behaviour for section `\.code\.1' from .* \(assigned to \.ramu, but additional match: \.ramz\) +.*: warning: .* may change behaviour for section `\.code\.2' from .* \(assigned to \.ramu, but additional match: \.ramz\) +.*: warning: .* may change behaviour for section `\.code\.3' from .* \(assigned to \.ramu, but additional match: \.ramz\) +`code4' referenced in section `\.code\.3' of .*: defined in discarded section `\.code\.4' of .*\Z diff --git a/ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-nok-5.ld b/ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-nok-5.ld new file mode 100644 index 00000000000..9aea032face --- /dev/null +++ b/ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-nok-5.ld @@ -0,0 +1,30 @@ +MEMORY +{ + RAML (rwx) : ORIGIN = 0x1FFF0000, LENGTH = 0x00040 + RAMU (rwx) : ORIGIN = 0x30000000, LENGTH = 0x00010 + RAMZ (rwx) : ORIGIN = 0x40040000, LENGTH = 0x00400 +} + +SECTIONS +{ + /DISCARD/ : { *(.code.4) } + + .raml : + { _raml_start = . ; + *(.boot) ; + *(.code) *(.code.*) ; + _raml_end = . ; + } > RAML + + .ramu : AT ( ADDR (.raml) + SIZEOF (.raml) ) + { _ramu_start = . ; + *(.code) *(.code.*) ; + _ramu_end = . ; + } > RAMU + + .ramz : AT ( ADDR (.ramu) + SIZEOF (.ramu) ) + { _ramz_start = . ; + *(.code) *(.code.*) ; + _ramz_end = . ; + } > RAMZ +} diff --git a/ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-ok-1.d b/ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-ok-1.d new file mode 100644 index 00000000000..25e437dddd6 --- /dev/null +++ b/ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-ok-1.d @@ -0,0 +1,80 @@ +# name: all sections fit in the available memories + no farcall stub. +## Use case description: +## - sections .code.1 and .code.2 fit in .raml +## - section .code.3 fits in .ramu and does not need a farcall stub to jump +## to code4 +## - section .code.4 fits in .ramz +# source: non-contiguous-mem-1.s +# ld: --enable-non-contiguous-regions -T non-contiguous-ok-1.ld +# objdump: -rdth + +.*: file format elf64-(little|big)aarch64 + +Sections: +Idx Name Size VMA LMA File off Algn + 0 \.raml 00000018 000000001fff0000 000000001fff0000 00010000 2\*\*2 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 1 \.ramu 00000008 0000000020000000 000000001fff0018 00020000 2\*\*2 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 2 \.ramz 00000050 0000000020040000 0000000020000008 00030000 2\*\*2 + CONTENTS, ALLOC, LOAD, READONLY, CODE +SYMBOL TABLE: +000000001fff0000 l d \.raml 0000000000000000 \.raml +0000000020000000 l d \.ramu 0000000000000000 \.ramu +0000000020040000 l d \.ramz 0000000000000000 \.ramz +0000000000000000 l df \*ABS\* 0000000000000000 non-contiguous-mem-.*\.o +0000000020040000 l \.ramz 0000000000000000 \$a +000000001fff0018 g \.raml 0000000000000000 _raml_end +0000000020000000 g \.ramu 0000000000000000 _ramu_start +000000001fff000c g F \.raml 000000000000000c code2 +0000000020040000 g \.ramz 0000000000000000 _ramz_start +000000001fff0000 g \.raml 0000000000000000 _raml_start +0000000020000000 g F \.ramu 0000000000000008 code3 +000000001fff0000 g F \.raml 000000000000000c code1 +0000000020040050 g \.ramz 0000000000000000 _ramz_end +0000000020040000 g F \.ramz 0000000000000050 code4 +0000000020000008 g \.ramu 0000000000000000 _ramu_end + + + +Disassembly of section \.raml: + +000000001fff0000 \: + 1fff0000: d503201f nop + 1fff0004: d503201f nop + 1fff0008: 94000001 bl 1fff000c \ + +000000001fff000c \: + 1fff000c: d503201f nop + 1fff0010: d503201f nop + 1fff0014: 94003ffb bl 20000000 \ + +Disassembly of section \.ramu: + +0000000020000000 \: + 20000000: d503201f nop + 20000004: 9400ffff bl 20040000 \ + +Disassembly of section \.ramz: + +0000000020040000 \: + 20040000: e1a00000 \.word 0xe1a00000 + 20040004: e1a00000 \.word 0xe1a00000 + 20040008: e1a00000 \.word 0xe1a00000 + 2004000c: e1a00000 \.word 0xe1a00000 + 20040010: e1a00000 \.word 0xe1a00000 + 20040014: e1a00000 \.word 0xe1a00000 + 20040018: e1a00000 \.word 0xe1a00000 + 2004001c: e1a00000 \.word 0xe1a00000 + 20040020: e1a00000 \.word 0xe1a00000 + 20040024: e1a00000 \.word 0xe1a00000 + 20040028: e1a00000 \.word 0xe1a00000 + 2004002c: e1a00000 \.word 0xe1a00000 + 20040030: e1a00000 \.word 0xe1a00000 + 20040034: e1a00000 \.word 0xe1a00000 + 20040038: e1a00000 \.word 0xe1a00000 + 2004003c: e1a00000 \.word 0xe1a00000 + 20040040: e1a00000 \.word 0xe1a00000 + 20040044: e1a00000 \.word 0xe1a00000 + 20040048: e1a00000 \.word 0xe1a00000 + 2004004c: e1a00000 \.word 0xe1a00000 diff --git a/ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-ok-1.ld b/ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-ok-1.ld new file mode 100644 index 00000000000..257a4ca905c --- /dev/null +++ b/ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-ok-1.ld @@ -0,0 +1,28 @@ +MEMORY +{ + RAML (rwx) : ORIGIN = 0x1FFF0000, LENGTH = 0x0001c + RAMU (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00008 + RAMZ (rwx) : ORIGIN = 0x20040000, LENGTH = 0x00400 +} + +SECTIONS +{ + .raml : + { _raml_start = . ; + *(.boot) ; + *(.code) *(.code.*) ; + _raml_end = . ; + } > RAML + + .ramu : AT ( ADDR (.raml) + SIZEOF (.raml) ) + { _ramu_start = . ; + *(.code) *(.code.*) ; + _ramu_end = . ; + } > RAMU + + .ramz : AT ( ADDR (.ramu) + SIZEOF (.ramu) ) + { _ramz_start = . ; + *(.code) *(.code.*) ; + _ramz_end = . ; + } > RAMZ +} diff --git a/ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-ok-2.d b/ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-ok-2.d new file mode 100644 index 00000000000..4ab720b133e --- /dev/null +++ b/ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-ok-2.d @@ -0,0 +1,88 @@ +#name: all code sections fit in the available memories AND farcall stub to jump to code4 ALSO fits in .ramu +## Use case description: +## - sections .code.1 and .code.2 fit in .raml +## - both section .code.3 and farcall stub to jump to code4 fits in .ramu +## - section .code.4 fits in .ramz +#source: non-contiguous-mem-1.s +#ld: --enable-non-contiguous-regions -T non-contiguous-ok-2.ld +#objdump: -rdth + +.*: file format elf64-(little|big)aarch64 + +Sections: +Idx Name Size VMA LMA File off Algn + 0 \.raml 00000018 000000001fff0000 000000001fff0000 00010000 2\*\*2 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 1 \.ramu 00000028 0000000020000000 000000001fff0018 00020000 2\*\*3 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 2 \.ramz 00000050 0000000030040000 0000000020000028 00030000 2\*\*2 + CONTENTS, ALLOC, LOAD, READONLY, CODE +SYMBOL TABLE: +000000001fff0000 l d \.raml 0000000000000000 \.raml +0000000020000000 l d \.ramu 0000000000000000 \.ramu +0000000030040000 l d \.ramz 0000000000000000 \.ramz +0000000000000000 l df \*ABS\* 0000000000000000 non-contiguous-mem-.*\.o +0000000030040000 l \.ramz 0000000000000000 \$a +0000000020000010 l F \.ramu 000000000000000c __code4_veneer +000000001fff0018 g \.raml 0000000000000000 _raml_end +0000000020000000 g \.ramu 0000000000000000 _ramu_start +000000001fff000c g F \.raml 000000000000000c code2 +0000000030040000 g \.ramz 0000000000000000 _ramz_start +000000001fff0000 g \.raml 0000000000000000 _raml_start +0000000020000000 g F \.ramu 0000000000000008 code3 +000000001fff0000 g F \.raml 000000000000000c code1 +0000000030040050 g \.ramz 0000000000000000 _ramz_end +0000000030040000 g F \.ramz 0000000000000050 code4 +0000000020000028 g \.ramu 0000000000000000 _ramu_end + + + +Disassembly of section \.raml: + +000000001fff0000 \: + 1fff0000: d503201f nop + 1fff0004: d503201f nop + 1fff0008: 94000001 bl 1fff000c \ + +000000001fff000c \: + 1fff000c: d503201f nop + 1fff0010: d503201f nop + 1fff0014: 94003ffb bl 20000000 \ + +Disassembly of section \.ramu: + +0000000020000000 \: + 20000000: d503201f nop + 20000004: 94000003 bl 20000010 \<__code4_veneer\> + 20000008: 14000008 b 20000028 \<_ramu_end\> + 2000000c: d503201f nop + +0000000020000010 \<__code4_veneer\>: + 20000010: 90080210 adrp x16, 30040000 \ + 20000014: 91000210 add x16, x16, #0x0 + 20000018: d61f0200 br x16 + \.\.\. + +Disassembly of section \.ramz: + +0000000030040000 \: + 30040000: e1a00000 \.word 0xe1a00000 + 30040004: e1a00000 \.word 0xe1a00000 + 30040008: e1a00000 \.word 0xe1a00000 + 3004000c: e1a00000 \.word 0xe1a00000 + 30040010: e1a00000 \.word 0xe1a00000 + 30040014: e1a00000 \.word 0xe1a00000 + 30040018: e1a00000 \.word 0xe1a00000 + 3004001c: e1a00000 \.word 0xe1a00000 + 30040020: e1a00000 \.word 0xe1a00000 + 30040024: e1a00000 \.word 0xe1a00000 + 30040028: e1a00000 \.word 0xe1a00000 + 3004002c: e1a00000 \.word 0xe1a00000 + 30040030: e1a00000 \.word 0xe1a00000 + 30040034: e1a00000 \.word 0xe1a00000 + 30040038: e1a00000 \.word 0xe1a00000 + 3004003c: e1a00000 \.word 0xe1a00000 + 30040040: e1a00000 \.word 0xe1a00000 + 30040044: e1a00000 \.word 0xe1a00000 + 30040048: e1a00000 \.word 0xe1a00000 + 3004004c: e1a00000 \.word 0xe1a00000 diff --git a/ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-ok-2.ld b/ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-ok-2.ld new file mode 100644 index 00000000000..56b75c5856f --- /dev/null +++ b/ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-ok-2.ld @@ -0,0 +1,28 @@ +MEMORY +{ + RAML (rwx) : ORIGIN = 0x1FFF0000, LENGTH = 0x0001c + RAMU (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00028 + RAMZ (rwx) : ORIGIN = 0x30040000, LENGTH = 0x00400 +} + +SECTIONS +{ + .raml : + { _raml_start = . ; + *(.boot) ; + *(.code) *(.code.*) ; + _raml_end = . ; + } > RAML + + .ramu : AT ( ADDR (.raml) + SIZEOF (.raml) ) + { _ramu_start = . ; + *(.code) *(.code.*) ; + _ramu_end = . ; + } > RAMU + + .ramz : AT ( ADDR (.ramu) + SIZEOF (.ramu) ) + { _ramz_start = . ; + *(.code) *(.code.*) ; + _ramz_end = . ; + } > RAMZ +} diff --git a/ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-ok-3.d b/ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-ok-3.d new file mode 100644 index 00000000000..fa257e72521 --- /dev/null +++ b/ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-ok-3.d @@ -0,0 +1,80 @@ +#name: subsequent sections should not be swapped, even if they fit in a previous hole. +## Use case description: +## - section .code.1 fits in .raml +## - section .code.2 does not fit in .raml and goes to .ramu +## - section .code.3 would fit in .raml, but goes to .ramu: Check that .code.2 and .code.3 are not swapped +## - section .code.4 fits in .ramz +#source: non-contiguous-mem-1.s +#ld: --enable-non-contiguous-regions -T non-contiguous-ok-3.ld +#objdump: -rdth + +.*: file format elf64-(little|big)aarch64 + +Sections: +Idx Name Size VMA LMA File off Algn + 0 \.raml 0000000c 000000001fff0000 000000001fff0000 00010000 2\*\*2 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 1 \.ramu 00000014 0000000020000000 000000001fff000c 00020000 2\*\*2 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 2 \.ramz 00000050 0000000020040000 0000000020000014 00030000 2\*\*2 + CONTENTS, ALLOC, LOAD, READONLY, CODE +SYMBOL TABLE: +000000001fff0000 l d \.raml 0000000000000000 \.raml +0000000020000000 l d \.ramu 0000000000000000 \.ramu +0000000020040000 l d \.ramz 0000000000000000 \.ramz +0000000000000000 l df \*ABS\* 0000000000000000 non-contiguous-mem-.*\.o +0000000020040000 l \.ramz 0000000000000000 \$a +000000001fff000c g \.raml 0000000000000000 _raml_end +0000000020000000 g \.ramu 0000000000000000 _ramu_start +0000000020000000 g F \.ramu 000000000000000c code2 +0000000020040000 g \.ramz 0000000000000000 _ramz_start +000000001fff0000 g \.raml 0000000000000000 _raml_start +000000002000000c g F \.ramu 0000000000000008 code3 +000000001fff0000 g F \.raml 000000000000000c code1 +0000000020040050 g \.ramz 0000000000000000 _ramz_end +0000000020040000 g F \.ramz 0000000000000050 code4 +0000000020000014 g \.ramu 0000000000000000 _ramu_end + + + +Disassembly of section \.raml: + +000000001fff0000 \: + 1fff0000: d503201f nop + 1fff0004: d503201f nop + 1fff0008: 94003ffe bl 20000000 \ + +Disassembly of section \.ramu: + +0000000020000000 \: + 20000000: d503201f nop + 20000004: d503201f nop + 20000008: 94000001 bl 2000000c \ + +000000002000000c \: + 2000000c: d503201f nop + 20000010: 9400fffc bl 20040000 \ + +Disassembly of section \.ramz: + +0000000020040000 \: + 20040000: e1a00000 \.word 0xe1a00000 + 20040004: e1a00000 \.word 0xe1a00000 + 20040008: e1a00000 \.word 0xe1a00000 + 2004000c: e1a00000 \.word 0xe1a00000 + 20040010: e1a00000 \.word 0xe1a00000 + 20040014: e1a00000 \.word 0xe1a00000 + 20040018: e1a00000 \.word 0xe1a00000 + 2004001c: e1a00000 \.word 0xe1a00000 + 20040020: e1a00000 \.word 0xe1a00000 + 20040024: e1a00000 \.word 0xe1a00000 + 20040028: e1a00000 \.word 0xe1a00000 + 2004002c: e1a00000 \.word 0xe1a00000 + 20040030: e1a00000 \.word 0xe1a00000 + 20040034: e1a00000 \.word 0xe1a00000 + 20040038: e1a00000 \.word 0xe1a00000 + 2004003c: e1a00000 \.word 0xe1a00000 + 20040040: e1a00000 \.word 0xe1a00000 + 20040044: e1a00000 \.word 0xe1a00000 + 20040048: e1a00000 \.word 0xe1a00000 + 2004004c: e1a00000 \.word 0xe1a00000 diff --git a/ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-ok-3.ld b/ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-ok-3.ld new file mode 100644 index 00000000000..e6b3cd3b0f7 --- /dev/null +++ b/ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-ok-3.ld @@ -0,0 +1,28 @@ +MEMORY +{ + RAML (rwx) : ORIGIN = 0x1FFF0000, LENGTH = 0x00014 + RAMU (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00020 + RAMZ (rwx) : ORIGIN = 0x20040000, LENGTH = 0x00400 +} + +SECTIONS +{ + .raml : + { _raml_start = . ; + *(.boot) ; + *(.code) *(.code.*) ; + _raml_end = . ; + } > RAML + + .ramu : AT ( ADDR (.raml) + SIZEOF (.raml) ) + { _ramu_start = . ; + *(.code) *(.code.*) ; + _ramu_end = . ; + } > RAMU + + .ramz : AT ( ADDR (.ramu) + SIZEOF (.ramu) ) + { _ramz_start = . ; + *(.code) *(.code.*) ; + _ramz_end = . ; + } > RAMZ +} diff --git a/ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-ok-4.d b/ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-ok-4.d new file mode 100644 index 00000000000..6fbe17ea385 --- /dev/null +++ b/ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-ok-4.d @@ -0,0 +1,83 @@ +#name: a "middle" memory is too small to fit anything, the sections are moved to the next available memory. +## Use case description: +## - sections .code.1, .code.2 and .code.3 (+ farcall stub) fit in .raml +## - section .code.4 fits in .ramz +## - nothing fits in .ramu +#source: non-contiguous-mem-1.s +#ld: --enable-non-contiguous-regions -T non-contiguous-ok-4.ld +#objdump: -rdth + +.*: file format elf64-(little|big)aarch64 + +Sections: +Idx Name Size VMA LMA File off Algn + 0 \.raml 00000040 000000001fff0000 000000001fff0000 00010000 2\*\*3 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 1 \.ramz 00000050 0000000040040000 0000000030000000 00020000 2\*\*2 + CONTENTS, ALLOC, LOAD, READONLY, CODE +SYMBOL TABLE: +000000001fff0000 l d \.raml 0000000000000000 \.raml +0000000040040000 l d \.ramz 0000000000000000 \.ramz +0000000000000000 l df \*ABS\* 0000000000000000 non-contiguous-mem-.*\.o +0000000040040000 l \.ramz 0000000000000000 \$a +000000001fff0028 l F \.raml 000000000000000c __code4_veneer +000000001fff0040 g \.raml 0000000000000000 _raml_end +0000000030000000 g \.raml 0000000000000000 _ramu_start +000000001fff000c g F \.raml 000000000000000c code2 +0000000040040000 g \.ramz 0000000000000000 _ramz_start +000000001fff0000 g \.raml 0000000000000000 _raml_start +000000001fff0018 g F \.raml 0000000000000008 code3 +000000001fff0000 g F \.raml 000000000000000c code1 +0000000040040050 g \.ramz 0000000000000000 _ramz_end +0000000040040000 g F \.ramz 0000000000000050 code4 +0000000030000000 g \.raml 0000000000000000 _ramu_end + + + +Disassembly of section \.raml: + +000000001fff0000 \: + 1fff0000: d503201f nop + 1fff0004: d503201f nop + 1fff0008: 94000001 bl 1fff000c \ + +000000001fff000c \: + 1fff000c: d503201f nop + 1fff0010: d503201f nop + 1fff0014: 94000001 bl 1fff0018 \ + +000000001fff0018 \: + 1fff0018: d503201f nop + 1fff001c: 94000003 bl 1fff0028 \<__code4_veneer\> + 1fff0020: 14000008 b 1fff0040 \<_raml_end\> + 1fff0024: d503201f nop + +000000001fff0028 \<__code4_veneer\>: + 1fff0028: 90100290 adrp x16, 40040000 \ + 1fff002c: 91000210 add x16, x16, #0x0 + 1fff0030: d61f0200 br x16 + ... + +Disassembly of section \.ramz: + +0000000040040000 \: + 40040000: e1a00000 .word 0xe1a00000 + 40040004: e1a00000 .word 0xe1a00000 + 40040008: e1a00000 .word 0xe1a00000 + 4004000c: e1a00000 .word 0xe1a00000 + 40040010: e1a00000 .word 0xe1a00000 + 40040014: e1a00000 .word 0xe1a00000 + 40040018: e1a00000 .word 0xe1a00000 + 4004001c: e1a00000 .word 0xe1a00000 + 40040020: e1a00000 .word 0xe1a00000 + 40040024: e1a00000 .word 0xe1a00000 + 40040028: e1a00000 .word 0xe1a00000 + 4004002c: e1a00000 .word 0xe1a00000 + 40040030: e1a00000 .word 0xe1a00000 + 40040034: e1a00000 .word 0xe1a00000 + 40040038: e1a00000 .word 0xe1a00000 + 4004003c: e1a00000 .word 0xe1a00000 + 40040040: e1a00000 .word 0xe1a00000 + 40040044: e1a00000 .word 0xe1a00000 + 40040048: e1a00000 .word 0xe1a00000 + 4004004c: e1a00000 .word 0xe1a00000 diff --git a/ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-ok-4.ld b/ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-ok-4.ld new file mode 100644 index 00000000000..bdafce7587d --- /dev/null +++ b/ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-ok-4.ld @@ -0,0 +1,28 @@ +MEMORY +{ + RAML (rwx) : ORIGIN = 0x1FFF0000, LENGTH = 0x00040 + RAMU (rwx) : ORIGIN = 0x30000000, LENGTH = 0x00010 + RAMZ (rwx) : ORIGIN = 0x40040000, LENGTH = 0x00400 +} + +SECTIONS +{ + .raml : + { _raml_start = . ; + *(.boot) ; + *(.code) *(.code.*) ; + _raml_end = . ; + } > RAML + + .ramu : AT ( ADDR (.raml) + SIZEOF (.raml) ) + { _ramu_start = . ; + *(.code) *(.code.*) ; + _ramu_end = . ; + } > RAMU + + .ramz : AT ( ADDR (.ramu) + SIZEOF (.ramu) ) + { _ramz_start = . ; + *(.code) *(.code.*) ; + _ramz_end = . ; + } > RAMZ +} diff --git a/ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-ok-5.d b/ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-ok-5.d new file mode 100644 index 00000000000..e160d8b9540 --- /dev/null +++ b/ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-ok-5.d @@ -0,0 +1,87 @@ +#name: input section is kept because a match clause precedes the matching DISCARD clause. +## Use case description: +## - sections .code.1, .code.2 and .code.3 (+ farcall stub) fit in .raml +## - section .code.4 fits in .ramz +## - nothing fits in .ramu +## The linker script contains a ".code.4" match clause for .raml, before +## the DISCARD clause. +#source: non-contiguous-mem-1.s +#ld: --enable-non-contiguous-regions --enable-non-contiguous-regions-warnings -T non-contiguous-ok-5.ld +#warning_output: non-contiguous-ok-5.warn + +#objdump: -rdth + +.*: file format elf64-(little|big)aarch64 + +Sections: +Idx Name Size VMA LMA File off Algn + 0 \.raml 00000040 000000001fff0000 000000001fff0000 00010000 2\*\*3 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 1 \.ramz 00000050 0000000040040000 0000000030000000 00020000 2\*\*2 + CONTENTS, ALLOC, LOAD, READONLY, CODE +SYMBOL TABLE: +000000001fff0000 l d \.raml 0000000000000000 \.raml +0000000040040000 l d \.ramz 0000000000000000 \.ramz +0000000000000000 l df \*ABS\* 0000000000000000 non-contiguous-mem-.*\.o +0000000040040000 l \.ramz 0000000000000000 \$a +000000001fff0028 l F \.raml 000000000000000c __code4_veneer +000000001fff0040 g \.raml 0000000000000000 _raml_end +0000000030000000 g \.raml 0000000000000000 _ramu_start +000000001fff000c g F \.raml 000000000000000c code2 +0000000040040000 g \.ramz 0000000000000000 _ramz_start +000000001fff0000 g \.raml 0000000000000000 _raml_start +000000001fff0018 g F \.raml 0000000000000008 code3 +000000001fff0000 g F \.raml 000000000000000c code1 +0000000040040050 g \.ramz 0000000000000000 _ramz_end +0000000040040000 g F \.ramz 0000000000000050 code4 +0000000030000000 g \.raml 0000000000000000 _ramu_end + + + +Disassembly of section \.raml: + +000000001fff0000 \: + 1fff0000: d503201f nop + 1fff0004: d503201f nop + 1fff0008: 94000001 bl 1fff000c \ + +000000001fff000c \: + 1fff000c: d503201f nop + 1fff0010: d503201f nop + 1fff0014: 94000001 bl 1fff0018 \ + +000000001fff0018 \: + 1fff0018: d503201f nop + 1fff001c: 94000003 bl 1fff0028 \<__code4_veneer\> + 1fff0020: 14000008 b 1fff0040 \<_raml_end\> + 1fff0024: d503201f nop + +000000001fff0028 \<__code4_veneer\>: + 1fff0028: 90100290 adrp x16, 40040000 \ + 1fff002c: 91000210 add x16, x16, #0x0 + 1fff0030: d61f0200 br x16 + ... + +Disassembly of section \.ramz: + +0000000040040000 \: + 40040000: e1a00000 .word 0xe1a00000 + 40040004: e1a00000 .word 0xe1a00000 + 40040008: e1a00000 .word 0xe1a00000 + 4004000c: e1a00000 .word 0xe1a00000 + 40040010: e1a00000 .word 0xe1a00000 + 40040014: e1a00000 .word 0xe1a00000 + 40040018: e1a00000 .word 0xe1a00000 + 4004001c: e1a00000 .word 0xe1a00000 + 40040020: e1a00000 .word 0xe1a00000 + 40040024: e1a00000 .word 0xe1a00000 + 40040028: e1a00000 .word 0xe1a00000 + 4004002c: e1a00000 .word 0xe1a00000 + 40040030: e1a00000 .word 0xe1a00000 + 40040034: e1a00000 .word 0xe1a00000 + 40040038: e1a00000 .word 0xe1a00000 + 4004003c: e1a00000 .word 0xe1a00000 + 40040040: e1a00000 .word 0xe1a00000 + 40040044: e1a00000 .word 0xe1a00000 + 40040048: e1a00000 .word 0xe1a00000 + 4004004c: e1a00000 .word 0xe1a00000 diff --git a/ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-ok-5.ld b/ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-ok-5.ld new file mode 100644 index 00000000000..127e179b93e --- /dev/null +++ b/ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-ok-5.ld @@ -0,0 +1,31 @@ +MEMORY +{ + RAML (rwx) : ORIGIN = 0x1FFF0000, LENGTH = 0x00040 + RAMU (rwx) : ORIGIN = 0x30000000, LENGTH = 0x00010 + RAMZ (rwx) : ORIGIN = 0x40040000, LENGTH = 0x00400 +} + +SECTIONS +{ + .raml : + { _raml_start = . ; + *(.boot) ; + *(.code) *(.code.*) ; + _raml_end = . ; + } > RAML + + .ramu : AT ( ADDR (.raml) + SIZEOF (.raml) ) + { _ramu_start = . ; + *(.code) *(.code.*) ; + _ramu_end = . ; + } > RAMU + + /DISCARD/ : + { *(.code.2) *(.code.4) } + + .ramz : AT ( ADDR (.ramu) + SIZEOF (.ramu) ) + { _ramz_start = . ; + *(.code) *(.code.*) ; + _ramz_end = . ; + } > RAMZ +} diff --git a/ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-ok-5.warn b/ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-ok-5.warn new file mode 100644 index 00000000000..730599ef289 --- /dev/null +++ b/ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-ok-5.warn @@ -0,0 +1,10 @@ +.*: warning: .* may change behaviour for section .\.code\.1. from .* \(assigned to \.raml, but additional match: \.ramu\) +.*: warning: .* may change behaviour for section .\.code\.2. from .* \(assigned to \.raml, but additional match: \.ramu\) +.*: warning: .* may change behaviour for section .\.code\.3. from .* \(assigned to \.raml, but additional match: \.ramu\) +.*: warning: .* may change behaviour for section .\.code\.4. from .* \(assigned to \.raml, but additional match: \.ramu\) +.*: warning: .* makes section .\.code\.2. from .* match /DISCARD/ clause\. +.*: warning: .* makes section .\.code\.4. from .* match /DISCARD/ clause\. +.*: warning: .* may change behaviour for section .\.code\.1. from .* \(assigned to \.ramu, but additional match: \.ramz\) +.*: warning: .* may change behaviour for section .\.code\.2. from .* \(assigned to \.ramu, but additional match: \.ramz\) +.*: warning: .* may change behaviour for section .\.code\.3. from .* \(assigned to \.ramu, but additional match: \.ramz\) +.*: warning: .* may change behaviour for section .\.code\.4. from .* \(assigned to \.ramu, but additional match: \.ramz\) From patchwork Thu Sep 18 15:06:06 2025 Content-Type: text/plain; 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CTRY:GB; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:outbound-uk1.az.dlp.m.darktrace.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230040)(82310400026)(14060799003)(36860700013)(35042699022)(376014)(1800799024); DIR:OUT; SFP:1101; X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 18 Sep 2025 15:07:47.4558 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 3bf9c046-649e-4d28-5eb6-08ddf6c520c9 X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d; Ip=[4.158.2.129]; Helo=[outbound-uk1.az.dlp.m.darktrace.com] X-MS-Exchange-CrossTenant-AuthSource: AMS0EPF0000019F.eurprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: AS8PR08MB6070 X-Spam-Status: No, score=-11.6 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, POISEN_SPAM_PILL, POISEN_SPAM_PILL_1, POISEN_SPAM_PILL_3, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2, RCVD_IN_VALIDITY_RPBL_BLOCKED, RCVD_IN_VALIDITY_SAFE_BLOCKED, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: binutils-bounces~patchwork=sourceware.org@sourceware.org The previous comments made it difficult to understand how the /DISCARD/ output section interacts with non-contiguous regions. In summary, the general rule is that the first (top-most) clause takes precedence over subsequent ones: - If /DISCARD/ appears first, the section is dropped. There is no need to warn about potential behavior changes with non-contiguous regions when the section is already discarded. - If /DISCARD/ follows clauses that assign the input section to an output section, /DISCARD/ is ignored, and the section is kept. In this case, the linker must warn that the section may not be discarded. --- ld/ldlang.c | 17 ++++++++++++----- .../non-contiguous-mem/non-contiguous-ok-5.warn | 4 ++-- 2 files changed, 14 insertions(+), 7 deletions(-) diff --git a/ld/ldlang.c b/ld/ldlang.c index 454887d71f4..75cee7d605e 100644 --- a/ld/ldlang.c +++ b/ld/ldlang.c @@ -2709,18 +2709,25 @@ wont_add_section_p (asection *section, if (discard) { + /* /DISCARD/ is seen first and the top-most clause has precedence on the + next ones, thus the section will be dropped. No need to warn about + potential change in behavior with non-contiguous regions when the + section is already dropped. */ if (section->output_section == NULL) { /* This prevents future calls from assigning this section or warning about it again. */ section->output_section = bfd_abs_section_ptr; } - else if (bfd_is_abs_section (section->output_section)) - ; - else if (link_info.non_contiguous_regions_warnings) + /* The /DISCARD/ clause appears after previous ones which assigned the + input section to an output section. /DISCARD/ does not have the + precedence, so the section will be kept. */ + else if (! bfd_is_abs_section (section->output_section) + && link_info.non_contiguous_regions_warnings) einfo (_("%P:%pS: warning: --enable-non-contiguous-regions makes " - "section `%pA' from `%pB' match /DISCARD/ clause.\n"), - NULL, section, section->owner); + "section `%pA' from `%pB' match /DISCARD/ clause. If the " + "section can be assigned to an output section, it won't be " + "discarded.\n"), NULL, section, section->owner); return true; } diff --git a/ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-ok-5.warn b/ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-ok-5.warn index 730599ef289..7cf8af73a56 100644 --- a/ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-ok-5.warn +++ b/ld/testsuite/ld-aarch64/non-contiguous-mem/non-contiguous-ok-5.warn @@ -2,8 +2,8 @@ .*: warning: .* may change behaviour for section .\.code\.2. from .* \(assigned to \.raml, but additional match: \.ramu\) .*: warning: .* may change behaviour for section .\.code\.3. from .* \(assigned to \.raml, but additional match: \.ramu\) .*: warning: .* may change behaviour for section .\.code\.4. from .* \(assigned to \.raml, but additional match: \.ramu\) -.*: warning: .* makes section .\.code\.2. from .* match /DISCARD/ clause\. -.*: warning: .* makes section .\.code\.4. from .* match /DISCARD/ clause\. +.*: warning: .* makes section .\.code\.2. from .* match /DISCARD/ clause\. If the section can be assigned to an output section, it won't be discarded\. +.*: warning: .* makes section .\.code\.4. from .* match /DISCARD/ clause\. If the section can be assigned to an output section, it won't be discarded\. .*: warning: .* may change behaviour for section .\.code\.1. from .* \(assigned to \.ramu, but additional match: \.ramz\) .*: warning: .* may change behaviour for section .\.code\.2. from .* \(assigned to \.ramu, but additional match: \.ramz\) .*: warning: .* may change behaviour for section .\.code\.3. from .* \(assigned to \.ramu, but additional match: \.ramz\)