From patchwork Wed Nov 17 13:47:41 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "H.J. Lu" X-Patchwork-Id: 47809 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id DC03C3858410 for ; Wed, 17 Nov 2021 13:48:15 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org DC03C3858410 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1637156895; bh=EwcFDTxs4Gc2RUKqbXA3r/Vx8o4AsNHhBUaK/AFb/Uc=; h=To:Subject:Date:List-Id:List-Unsubscribe:List-Archive:List-Post: List-Help:List-Subscribe:From:Reply-To:From; b=ylyTEH2Tp+WgvPiTVYQIg7wgR6Uwha23c0kCIJC0NJhDshdi3UvElNN8481CKRcCc LSW7bMTN9W17uPX2+PN5WeJuck2t3BQ34hVRlmNFAlKhkkZLCYqB6YoTx4nYe78U0l gHUyvD88zPtq35+aH47xJg2Lttnz78NOjPZ+38ds= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mail-pl1-x62b.google.com (mail-pl1-x62b.google.com [IPv6:2607:f8b0:4864:20::62b]) by sourceware.org (Postfix) with ESMTPS id D50D63858D28 for ; Wed, 17 Nov 2021 13:47:44 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org D50D63858D28 Received: by mail-pl1-x62b.google.com with SMTP id b11so2183410pld.12 for ; Wed, 17 Nov 2021 05:47:44 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=EwcFDTxs4Gc2RUKqbXA3r/Vx8o4AsNHhBUaK/AFb/Uc=; b=4umT9HqzuFJH0dS+EnhAhS0hppR3ZfgQ7E8MzkRVhyF2n5jx06I4fTl5yz1e1WdfBZ +LvREoZfFCgEetCrsgQ9WPJvgCHfsPVqnQ7kOtVNUKmO7kre1ir7GY46mLrmrDQ7yoVK XTbvYxhV0H6A/ZuemcQf0sz2l6v8lfsbzjVD78r1zX1dpiVmjpmVwycCGtz8AMjRxdZp f6r/KD1YLxhLPSq/cK9pAjcN2RTikkorQdjpMlU+oG0wc20cY91ni6wS9cC7kjxMRUAd R/Srp/Lp5okGxbJoVsZkgLautfrmNf3ml28pdhxjTTpyjnuzdtxPYCbkIkgGWR+kIPeS /zyQ== X-Gm-Message-State: AOAM533fVvOcek8kroxt37GGxVYFeBlSRuLXP20Yx/h428u/Iri+kXgZ dJl4cHb7lV0kzNKeMlmNYC65nj/h4W4= X-Google-Smtp-Source: ABdhPJySd+3PoqsUmEcNSW6Y9yNMw+dQqxXt/HbRCanEAufNq7YM8q7gIIK2BaECCqalx2eGz4S0Iw== X-Received: by 2002:a17:902:7b8d:b0:143:95e3:7dc0 with SMTP id w13-20020a1709027b8d00b0014395e37dc0mr56126388pll.21.1637156863361; Wed, 17 Nov 2021 05:47:43 -0800 (PST) Received: from gnu-cfl-2.localdomain ([172.58.35.133]) by smtp.gmail.com with ESMTPSA id o2sm23687890pfu.206.2021.11.17.05.47.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 17 Nov 2021 05:47:43 -0800 (PST) Received: from gnu-cfl-2.lan (localhost [IPv6:::1]) by gnu-cfl-2.localdomain (Postfix) with ESMTP id 028921A0138; Wed, 17 Nov 2021 05:47:42 -0800 (PST) To: gcc-patches@gcc.gnu.org Subject: [PATCH v2] x86: Add -mindirect-branch-cs-prefix Date: Wed, 17 Nov 2021 05:47:41 -0800 Message-Id: <20211117134741.212383-1-hjl.tools@gmail.com> X-Mailer: git-send-email 2.33.1 MIME-Version: 1.0 X-Spam-Status: No, score=-3029.7 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, KAM_SHORT, RCVD_IN_BARRACUDACENTRAL, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: "H.J. Lu via Gcc-patches" From: "H.J. Lu" Reply-To: "H.J. Lu" Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org Sender: "Gcc-patches" Add -mindirect-branch-cs-prefix to add CS prefix to call and jmp to thunk via r8-r15 registers when converting indirect call and jump to increase the instruction length to 6, allowing the non-thunk form to be inlined. gcc/ PR target/102952 * config/i386/i386.c (ix86_output_jmp_thunk_or_indirect): Emit CS prefix for -mindirect-branch-cs-prefix. (ix86_output_indirect_branch_via_reg): Likewise. * config/i386/i386.opt: Add -mindirect-branch-cs-prefix. * doc/invoke.texi: Document -mindirect-branch-cs-prefix. gcc/testsuite/ PR target/102952 * gcc.target/i386/indirect-thunk-cs-prefix-1.c: New test. * gcc.target/i386/indirect-thunk-cs-prefix-2.c: Likewise. --- gcc/config/i386/i386.c | 6 ++++++ gcc/config/i386/i386.opt | 4 ++++ gcc/doc/invoke.texi | 8 +++++++- .../gcc.target/i386/indirect-thunk-cs-prefix-1.c | 14 ++++++++++++++ .../gcc.target/i386/indirect-thunk-cs-prefix-2.c | 15 +++++++++++++++ 5 files changed, 46 insertions(+), 1 deletion(-) create mode 100644 gcc/testsuite/gcc.target/i386/indirect-thunk-cs-prefix-1.c create mode 100644 gcc/testsuite/gcc.target/i386/indirect-thunk-cs-prefix-2.c diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index 7e9b7bc347f..ae92df0be2f 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -15983,6 +15983,9 @@ ix86_output_jmp_thunk_or_indirect (const char *thunk_name, const int regno) { if (thunk_name != NULL) { + if (REX_INT_REGNO_P (regno) + && ix86_indirect_branch_cs_prefix) + fprintf (asm_out_file, "\tcs\n"); fprintf (asm_out_file, "\tjmp\t"); assemble_name (asm_out_file, thunk_name); putc ('\n', asm_out_file); @@ -16036,6 +16039,9 @@ ix86_output_indirect_branch_via_reg (rtx call_op, bool sibcall_p) { if (thunk_name != NULL) { + if (REX_INT_REGNO_P (regno) + && ix86_indirect_branch_cs_prefix) + fprintf (asm_out_file, "\tcs\n"); fprintf (asm_out_file, "\tcall\t"); assemble_name (asm_out_file, thunk_name); putc ('\n', asm_out_file); diff --git a/gcc/config/i386/i386.opt b/gcc/config/i386/i386.opt index 8d499a5a4df..806ffd7b0ac 100644 --- a/gcc/config/i386/i386.opt +++ b/gcc/config/i386/i386.opt @@ -1076,6 +1076,10 @@ Enum(indirect_branch) String(thunk-inline) Value(indirect_branch_thunk_inline) EnumValue Enum(indirect_branch) String(thunk-extern) Value(indirect_branch_thunk_extern) +mindirect-branch-cs-prefix +Target Var(ix86_indirect_branch_cs_prefix) Init(0) +Add CS prefix to call and jmp to thunk via r8-r15 registers when converting indirect call and jump. + mindirect-branch-register Target Var(ix86_indirect_branch_register) Init(0) Force indirect call and jump via register. diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index 0265c160e02..233f3b579d9 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -1427,7 +1427,8 @@ See RS/6000 and PowerPC Options. -mstack-protector-guard-symbol=@var{symbol} @gol -mgeneral-regs-only -mcall-ms2sysv-xlogues -mrelax-cmpxchg-loop @gol -mindirect-branch=@var{choice} -mfunction-return=@var{choice} @gol --mindirect-branch-register -mharden-sls=@var{choice} -mneeded} +-mindirect-branch-register -mharden-sls=@var{choice} @gol +-mindirect-branch-cs-prefix -mneeded} @emph{x86 Windows Options} @gccoptlist{-mconsole -mcygwin -mno-cygwin -mdll @gol @@ -32409,6 +32410,11 @@ hardening. @samp{return} enables SLS hardening for function return. @samp{indirect-branch} enables SLS hardening for indirect branch. @samp{all} enables all SLS hardening. +@item -mindirect-branch-cs-prefix +@opindex mindirect-branch-cs-prefix +Add CS prefix to call and jmp to thunk via r8-r15 registers when +converting indirect call and jump. + @end table These @samp{-m} switches are supported in addition to the above diff --git a/gcc/testsuite/gcc.target/i386/indirect-thunk-cs-prefix-1.c b/gcc/testsuite/gcc.target/i386/indirect-thunk-cs-prefix-1.c new file mode 100644 index 00000000000..db2f3416823 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/indirect-thunk-cs-prefix-1.c @@ -0,0 +1,14 @@ +/* { dg-do compile { target { ! ia32 } } } */ +/* { dg-options "-O2 -ffixed-rax -ffixed-rbx -ffixed-rcx -ffixed-rdx -ffixed-rdi -ffixed-rsi -mindirect-branch-cs-prefix -mindirect-branch=thunk-extern" } */ +/* { dg-additional-options "-fno-pic" { target { ! *-*-darwin* } } } */ + +extern void (*fptr) (void); + +void +foo (void) +{ + fptr (); +} + +/* { dg-final { scan-assembler-times "jmp\[ \t\]+_?__x86_indirect_thunk_r\[0-9\]+" 1 } } */ +/* { dg-final { scan-assembler-times "\tcs" 1 } } */ diff --git a/gcc/testsuite/gcc.target/i386/indirect-thunk-cs-prefix-2.c b/gcc/testsuite/gcc.target/i386/indirect-thunk-cs-prefix-2.c new file mode 100644 index 00000000000..adfc39a49d4 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/indirect-thunk-cs-prefix-2.c @@ -0,0 +1,15 @@ +/* { dg-do compile { target { ! ia32 } } } */ +/* { dg-options "-O2 -ffixed-rax -ffixed-rbx -ffixed-rcx -ffixed-rdx -ffixed-rdi -ffixed-rsi -mindirect-branch-cs-prefix -mindirect-branch=thunk-extern" } */ +/* { dg-additional-options "-fno-pic" { target { ! *-*-darwin* } } } */ + +extern void (*bar) (void); + +int +foo (void) +{ + bar (); + return 0; +} + +/* { dg-final { scan-assembler-times "call\[ \t\]+_?__x86_indirect_thunk_r\[0-9\]+" 1 } } */ +/* { dg-final { scan-assembler-times "\tcs" 1 } } */