From patchwork Mon Oct 25 20:25:44 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Paul A. Clarke" X-Patchwork-Id: 46642 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 7768C3857C66 for ; Mon, 25 Oct 2021 20:26:20 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 7768C3857C66 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1635193580; bh=QZfRs64S/tBdSiQlL0HfM0KebX/gEmM4yY/nP02d/tw=; h=To:Subject:Date:List-Id:List-Unsubscribe:List-Archive:List-Post: List-Help:List-Subscribe:From:Reply-To:From; b=XCg9dwlrazevdoE0S8UKDOUjfBbf0m70djgxulNhr3mXkMPxBs73+SKR5GPhao4OQ 9SHONGtgNvCdZ9t0YG30JiKveAK0cTcEjigpgf03R6XclAtySxNhlF1zUcT4iWERrP ud28/WEvNZXVEs8BCK/2uDJUznAdc+TTWp6cfLts= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mx0a-001b2d01.pphosted.com (mx0a-001b2d01.pphosted.com [148.163.156.1]) by sourceware.org (Postfix) with ESMTPS id B3CF43858C3A for ; Mon, 25 Oct 2021 20:25:50 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org B3CF43858C3A Received: from pps.filterd (m0098410.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.1.2/8.16.1.2) with SMTP id 19PINsHX011436; Mon, 25 Oct 2021 20:25:49 GMT Received: from ppma03dal.us.ibm.com (b.bd.3ea9.ip4.static.sl-reverse.com [169.62.189.11]) by mx0a-001b2d01.pphosted.com with ESMTP id 3bx1ggbt8q-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 25 Oct 2021 20:25:49 +0000 Received: from pps.filterd (ppma03dal.us.ibm.com [127.0.0.1]) by ppma03dal.us.ibm.com (8.16.1.2/8.16.1.2) with SMTP id 19PKJ5fQ012802; Mon, 25 Oct 2021 20:25:48 GMT Received: from b01cxnp23034.gho.pok.ibm.com (b01cxnp23034.gho.pok.ibm.com [9.57.198.29]) by ppma03dal.us.ibm.com with ESMTP id 3bva1ax80h-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 25 Oct 2021 20:25:48 +0000 Received: from b01ledav004.gho.pok.ibm.com (b01ledav004.gho.pok.ibm.com [9.57.199.109]) by b01cxnp23034.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 19PKPlKY39125420 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Mon, 25 Oct 2021 20:25:47 GMT Received: from b01ledav004.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 72BE6112066; Mon, 25 Oct 2021 20:25:47 +0000 (GMT) Received: from b01ledav004.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 50896112061; Mon, 25 Oct 2021 20:25:47 +0000 (GMT) Received: from localhost (unknown [9.160.64.204]) by b01ledav004.gho.pok.ibm.com (Postfix) with ESMTP; Mon, 25 Oct 2021 20:25:47 +0000 (GMT) To: segher@kernel.crashing.org, gcc-patches@gcc.gnu.org Subject: [COMMITTED] rs6000: Fix missing "externs" in smmintrin.h Date: Mon, 25 Oct 2021 15:25:44 -0500 Message-Id: <20211025202544.644828-1-pc@us.ibm.com> X-Mailer: git-send-email 2.27.0 MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: 8bzajf3ArhqwaNuVW7CoHUoU6CzGbFR2 X-Proofpoint-GUID: 8bzajf3ArhqwaNuVW7CoHUoU6CzGbFR2 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.182.1,Aquarius:18.0.790,Hydra:6.0.425,FMLib:17.0.607.475 definitions=2021-10-25_07,2021-10-25_02,2020-04-07_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 spamscore=0 clxscore=1011 bulkscore=0 lowpriorityscore=0 mlxlogscore=999 malwarescore=0 impostorscore=0 mlxscore=0 suspectscore=0 priorityscore=1501 phishscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2109230001 definitions=main-2110250117 X-Spam-Status: No, score=-11.9 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_EF, GIT_PATCH_0, KAM_LOTSOFHASH, RCVD_IN_MSPIKE_H2, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: "Paul A. Clarke via Gcc-patches" From: "Paul A. Clarke" Reply-To: "Paul A. Clarke" Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org Sender: "Gcc-patches" Inline functions defined in smmintrin.h need "extern" as part of their declaration, otherwise instances of those functions are created in the objects which include them. Fixes commits: - acd4b9103c1a30c833de4eee31fb69c3ff13cd77 - 9d352c68e8c8b642a36a6bcfc7f6b5dba11ac748 - bd9a8737d478f7f1d01a9d5f1cc4309ffbb53103 - 5f500715438761f59de5fb992267748c5d4dc4b6 - eaa93a0f3d9f67c8cbc1dc849ea6feba432ff412 - 29fb1e831bf1c25e4574bf2f98a9f534e5c67665 2021-10-25 Paul A. Clarke gcc * config/rs6000/smmintrin.h (_mm_testz_si128): Add "extern" to function signature. (_mm_testc_si128): Likewise. (_mm_testnzc_si128): Likewise. (_mm_blend_ps): Likewise. (_mm_blendv_ps): Likewise. (_mm_blend_pd): Likewise. (_mm_blendv_pd): Likewise. (_mm_ceil_pd): Likewise. (_mm_ceil_sd): Likewise. (_mm_ceil_ps): Likewise. (_mm_ceil_ss): Likewise. (_mm_floor_pd): Likewise. (_mm_floor_sd): Likewise. (_mm_floor_ps): Likewise. (_mm_floor_ss): Likewise. (_mm_minpos_epu16): Likewise. (_mm_mul_epi32): Likewise. (_mm_cvtepi8_epi16): Likewise. (_mm_packus_epi32): Likewise. (_mm_cmpgt_epi64): Likewise. --- Tested on powerpc64le-linux (Power9), powerpc64-linux (Power8), powerpc-linux (Power8). Committed as trivial, obvious. gcc/config/rs6000/smmintrin.h | 40 +++++++++++++++++------------------ 1 file changed, 20 insertions(+), 20 deletions(-) diff --git a/gcc/config/rs6000/smmintrin.h b/gcc/config/rs6000/smmintrin.h index b732fbca7b09..0fab308b1951 100644 --- a/gcc/config/rs6000/smmintrin.h +++ b/gcc/config/rs6000/smmintrin.h @@ -118,7 +118,7 @@ _mm_blendv_epi8 (__m128i __A, __m128i __B, __m128i __mask) return (__m128i) vec_sel ((__v16qu) __A, (__v16qu) __B, __lmask); } -__inline __m128 +extern __inline __m128 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm_blend_ps (__m128 __A, __m128 __B, const int __imm8) { @@ -145,7 +145,7 @@ _mm_blend_ps (__m128 __A, __m128 __B, const int __imm8) return (__m128) __r; } -__inline __m128 +extern __inline __m128 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm_blendv_ps (__m128 __A, __m128 __B, __m128 __mask) { @@ -154,7 +154,7 @@ _mm_blendv_ps (__m128 __A, __m128 __B, __m128 __mask) return (__m128) vec_sel ((__v4su) __A, (__v4su) __B, (__v4su) __boolmask); } -__inline __m128d +extern __inline __m128d __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm_blend_pd (__m128d __A, __m128d __B, const int __imm8) { @@ -170,7 +170,7 @@ _mm_blend_pd (__m128d __A, __m128d __B, const int __imm8) } #ifdef _ARCH_PWR8 -__inline __m128d +extern __inline __m128d __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm_blendv_pd (__m128d __A, __m128d __B, __m128d __mask) { @@ -180,7 +180,7 @@ _mm_blendv_pd (__m128d __A, __m128d __B, __m128d __mask) } #endif -__inline int +extern __inline int __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm_testz_si128 (__m128i __A, __m128i __B) { @@ -189,7 +189,7 @@ _mm_testz_si128 (__m128i __A, __m128i __B) return vec_all_eq (vec_and ((__v16qu) __A, (__v16qu) __B), __zero); } -__inline int +extern __inline int __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm_testc_si128 (__m128i __A, __m128i __B) { @@ -199,7 +199,7 @@ _mm_testc_si128 (__m128i __A, __m128i __B) return vec_all_eq (vec_and ((__v16qu) __notA, (__v16qu) __B), __zero); } -__inline int +extern __inline int __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm_testnzc_si128 (__m128i __A, __m128i __B) { @@ -214,14 +214,14 @@ _mm_testnzc_si128 (__m128i __A, __m128i __B) #define _mm_test_mix_ones_zeros(M, V) _mm_testnzc_si128 ((M), (V)) -__inline __m128d +extern __inline __m128d __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm_ceil_pd (__m128d __A) { return (__m128d) vec_ceil ((__v2df) __A); } -__inline __m128d +extern __inline __m128d __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm_ceil_sd (__m128d __A, __m128d __B) { @@ -230,14 +230,14 @@ _mm_ceil_sd (__m128d __A, __m128d __B) return (__m128d) __r; } -__inline __m128d +extern __inline __m128d __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm_floor_pd (__m128d __A) { return (__m128d) vec_floor ((__v2df) __A); } -__inline __m128d +extern __inline __m128d __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm_floor_sd (__m128d __A, __m128d __B) { @@ -246,14 +246,14 @@ _mm_floor_sd (__m128d __A, __m128d __B) return (__m128d) __r; } -__inline __m128 +extern __inline __m128 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm_ceil_ps (__m128 __A) { return (__m128) vec_ceil ((__v4sf) __A); } -__inline __m128 +extern __inline __m128 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm_ceil_ss (__m128 __A, __m128 __B) { @@ -262,14 +262,14 @@ _mm_ceil_ss (__m128 __A, __m128 __B) return __r; } -__inline __m128 +extern __inline __m128 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm_floor_ps (__m128 __A) { return (__m128) vec_floor ((__v4sf) __A); } -__inline __m128 +extern __inline __m128 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm_floor_ss (__m128 __A, __m128 __B) { @@ -351,7 +351,7 @@ _mm_mullo_epi32 (__m128i __X, __m128i __Y) } #ifdef _ARCH_PWR8 -__inline __m128i +extern __inline __m128i __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm_mul_epi32 (__m128i __X, __m128i __Y) { @@ -359,7 +359,7 @@ _mm_mul_epi32 (__m128i __X, __m128i __Y) } #endif -__inline __m128i +extern __inline __m128i __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm_cvtepi8_epi16 (__m128i __A) { @@ -499,7 +499,7 @@ _mm_cvtepu32_epi64 (__m128i __A) /* Return horizontal packed word minimum and its index in bits [15:0] and bits [18:16] respectively. */ -__inline __m128i +extern __inline __m128i __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm_minpos_epu16 (__m128i __A) { @@ -524,7 +524,7 @@ _mm_minpos_epu16 (__m128i __A) return __r.__m; } -__inline __m128i +extern __inline __m128i __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm_packus_epi32 (__m128i __X, __m128i __Y) { @@ -532,7 +532,7 @@ _mm_packus_epi32 (__m128i __X, __m128i __Y) } #ifdef _ARCH_PWR8 -__inline __m128i +extern __inline __m128i __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm_cmpgt_epi64 (__m128i __X, __m128i __Y) {