From patchwork Fri Nov 29 10:30:10 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Andre Vieira (lists)" X-Patchwork-Id: 102084 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 82E873858D28 for ; Fri, 29 Nov 2024 10:31:16 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 82E873858D28 X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by sourceware.org (Postfix) with ESMTP id 62B6C3858D28 for ; Fri, 29 Nov 2024 10:30:24 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 62B6C3858D28 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=arm.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 62B6C3858D28 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1732876224; cv=none; b=PVffCPIGvsSJOCGp07ZgOgrH9yJCgz39NThA0NJ6+/uq4mHaKLX88XNhiR/3fr0jnHRxW0kAI1Ndwxm8vu42idKQ202AGsxL1TUUyv1y+JDHumRtLBfN2GkMTjVDfLPsDUy3iF4EykHZCDXE8FyclvYmComeFUSOytBrgKkJ8eU= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1732876224; c=relaxed/simple; bh=R8SEOdaBiNUBnSm+Cl9bm2iH8kvcmTMcjNoQxDZFdkU=; h=From:To:Subject:Date:Message-Id:MIME-Version; b=G9B0KpTtl2S8LoJBtzV/xgcdZOzzrzkjrQdl5APJ8KoE8HIgG7g+Qgdl2qBR2dzhvfMUvO+vYwJhHuWihgDHxIznWveEVghD+L9Kcj59a6wBI99gUMDvVsL2EggcLwX4uN24/P4rCzAhGXTG3jsPBNgoIp+ZkXg0Gaa2B6xAqWA= ARC-Authentication-Results: i=1; server2.sourceware.org DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 62B6C3858D28 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id AAAB51424; Fri, 29 Nov 2024 02:30:53 -0800 (PST) Received: from e107157-lin.cambridge.arm.com (e107157-lin.cambridge.arm.com [10.2.78.70]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 4ACB23F5A1; Fri, 29 Nov 2024 02:30:23 -0800 (PST) From: Andre Vieira To: gcc-patches@gcc.gnu.org Cc: christophe.lyon@arm.com, richard.earnshaw@arm.com, Andre Vieira Subject: [PATCH 1/3] arm, mve: Fix scan-assembler for test7 in dlstp-compile-asm-2.c Date: Fri, 29 Nov 2024 10:30:10 +0000 Message-Id: <20241129103012.3477414-2-andre.simoesdiasvieira@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20241129103012.3477414-1-andre.simoesdiasvieira@arm.com> References: <20241129103012.3477414-1-andre.simoesdiasvieira@arm.com> MIME-Version: 1.0 X-Spam-Status: No, score=-12.2 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_NONE, KAM_DMARC_STATUS, KAM_LAZY_DOMAIN_SECURITY, KAM_SHORT, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces~patchwork=sourceware.org@gcc.gnu.org After the changes to the vctp intrinsic codegen changed slightly, where we now unfortunately seem to be generating unneeded moves and extends of the mask. These are however not incorrect and we don't have a fix for the unneeded codegen right now, so changing the testcase to accept them so we can catch other changes if they occur. gcc/testsuite/ChangeLog: * gcc.target/arm/mve/dlstp-compile-asm-2.c (test7): Add an optional vmsr to the check-function-bodies. --- gcc/testsuite/gcc.target/arm/mve/dlstp-compile-asm-2.c | 1 + 1 file changed, 1 insertion(+) diff --git a/gcc/testsuite/gcc.target/arm/mve/dlstp-compile-asm-2.c b/gcc/testsuite/gcc.target/arm/mve/dlstp-compile-asm-2.c index c62f592a60d..fd3f68ce5b2 100644 --- a/gcc/testsuite/gcc.target/arm/mve/dlstp-compile-asm-2.c +++ b/gcc/testsuite/gcc.target/arm/mve/dlstp-compile-asm-2.c @@ -216,6 +216,7 @@ void test7 (int32_t *a, int32_t *b, int32_t *c, int n, int g) **... ** dlstp.32 lr, r3 ** vldrw.32 q[0-9]+, \[r0\], #16 +** (?:vmsr p0, .*) ** vpst ** vldrwt.32 q[0-9]+, \[r1\], #16 ** vadd.i32 (q[0-9]+), q[0-9]+, q[0-9]+ From patchwork Fri Nov 29 10:30:11 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Andre Vieira (lists)" X-Patchwork-Id: 102085 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 1DBCB3858D29 for ; Fri, 29 Nov 2024 10:34:22 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 1DBCB3858D29 X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by sourceware.org (Postfix) with ESMTP id 384AA3858D29 for ; Fri, 29 Nov 2024 10:30:26 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 384AA3858D29 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=arm.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 384AA3858D29 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1732876226; cv=none; b=WOBzcK6idB8kx0QvrMvLpsOj+b/2CshUk8r64UEltBbDhqwQSzR/viwkiJRTzGJmcyKD94887Si1dNFbppvDAewhvhXqf3GlUb7fSr7n2ePzANd4oijSJHREVFfabdzBAKHPyaMg7ZwyEOdPNuGtj5+Dc3hXTSTKSYs7IOqMOtE= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1732876226; c=relaxed/simple; bh=3yP4JDqQbHfQY4k1pvMFiZqW7TM4wf+uULxT5SzQ8jk=; h=From:To:Subject:Date:Message-Id:MIME-Version; b=uBglTAQYJTdRAsezrdqDQpxFbH/7dMFdM74JhwYsNX7qfOpvpiYGgLwfEGFkrWMWycULBUFLAnA+LZH8qKDsiFK9Iy6ACNREBnp24qJqRKStt/z86GXPm0sE7JeEomDVhRpqTTEENuESi25cwdraJQkUCe0FjZCRxY5YcX6P1Q4= ARC-Authentication-Results: i=1; server2.sourceware.org DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 384AA3858D29 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 7F5B61655; Fri, 29 Nov 2024 02:30:55 -0800 (PST) Received: from e107157-lin.cambridge.arm.com (e107157-lin.cambridge.arm.com [10.2.78.70]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 1DAA93F5A1; Fri, 29 Nov 2024 02:30:24 -0800 (PST) From: Andre Vieira To: gcc-patches@gcc.gnu.org Cc: christophe.lyon@arm.com, richard.earnshaw@arm.com, Andre Vieira Subject: [PATCH 2/3] arm, mve: Pass -std=c99 to dlstp-loop-form.c to avoid new warning Date: Fri, 29 Nov 2024 10:30:11 +0000 Message-Id: <20241129103012.3477414-3-andre.simoesdiasvieira@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20241129103012.3477414-1-andre.simoesdiasvieira@arm.com> References: <20241129103012.3477414-1-andre.simoesdiasvieira@arm.com> MIME-Version: 1.0 X-Spam-Status: No, score=-12.2 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_NONE, KAM_DMARC_STATUS, KAM_LAZY_DOMAIN_SECURITY, KAM_SHORT, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces~patchwork=sourceware.org@gcc.gnu.org This fixes a testism introduced by the warning produced with the -std=c23 default. The testcase is a reduced piece of code meant to trigger an ICE, so there's little value in trying to change the code itself. gcc/testsuite/ChangeLog: * gcc.target/arm/mve/dlstp-loop-form.c: Add -std=c99 to avoid warning message. --- gcc/testsuite/gcc.target/arm/mve/dlstp-loop-form.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/gcc/testsuite/gcc.target/arm/mve/dlstp-loop-form.c b/gcc/testsuite/gcc.target/arm/mve/dlstp-loop-form.c index 08811cef568..0f9589d7756 100644 --- a/gcc/testsuite/gcc.target/arm/mve/dlstp-loop-form.c +++ b/gcc/testsuite/gcc.target/arm/mve/dlstp-loop-form.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ -/* { dg-options "-Ofast" } */ +/* { dg-options "-Ofast -std=c99" } */ /* { dg-add-options arm_v8_1m_mve_fp } */ #pragma GCC arm "arm_mve_types.h" #pragma GCC arm "arm_mve.h" false From patchwork Fri Nov 29 10:30:12 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Andre Vieira (lists)" X-Patchwork-Id: 102086 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 406623858C42 for ; Fri, 29 Nov 2024 10:35:50 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 406623858C42 X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by sourceware.org (Postfix) with ESMTP id EA67A3858D33 for ; Fri, 29 Nov 2024 10:30:27 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org EA67A3858D33 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=arm.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org EA67A3858D33 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1732876228; cv=none; b=anUAt2pPZpaEg09zlA6xnarOI1H2vmva9VZSiGiqKgMd6f7UAw2UuYVUZ86+tI/Cr4drf3sYnOoRcE+H/Wi04uBXpmtneujMsqMKOGsz0HDjUXw2kchVTX01CN5fd7F3C8Lhnse87muAEyY4RPmcyn20DBd6kskCIJtdHBUvPrg= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1732876228; c=relaxed/simple; bh=RmKXFlbD1IuVxAD1RnXzkvjtLtlDMxupcGFC3nl/wGQ=; h=From:To:Subject:Date:Message-Id:MIME-Version; b=Z3Reh3ZwMYM2DaEsm72J+WWhXb+fLymDwa+c+KllXas02FgjwndBYGjY0ywk2vlK7L2e5RIl9uwM7Xyz0izEIkQZ4fyDaHrbCe7ce7uCS5CBtaarw2W6CaG7pbRnW7TqotCN7/fGe66vNVkyuMmAVFyGJVwFIjrA0m6pp58zMWo= ARC-Authentication-Results: i=1; server2.sourceware.org DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org EA67A3858D33 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 4581D1C00; Fri, 29 Nov 2024 02:30:57 -0800 (PST) Received: from e107157-lin.cambridge.arm.com (e107157-lin.cambridge.arm.com [10.2.78.70]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id D99E23F5A1; Fri, 29 Nov 2024 02:30:26 -0800 (PST) From: Andre Vieira To: gcc-patches@gcc.gnu.org Cc: christophe.lyon@arm.com, richard.earnshaw@arm.com, Andre Vieira Subject: [PATCH 3/3] arm, mve: Detect uses of vctp_vpr_generated inside subregs Date: Fri, 29 Nov 2024 10:30:12 +0000 Message-Id: <20241129103012.3477414-4-andre.simoesdiasvieira@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20241129103012.3477414-1-andre.simoesdiasvieira@arm.com> References: <20241129103012.3477414-1-andre.simoesdiasvieira@arm.com> MIME-Version: 1.0 X-Spam-Status: No, score=-12.2 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_NONE, KAM_DMARC_STATUS, KAM_LAZY_DOMAIN_SECURITY, KAM_SHORT, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces~patchwork=sourceware.org@gcc.gnu.org Address a problem we were having where we were missing on detecting uses of vctp_vpr_generated in the analysis for 'arm_attempt_dlstp_transform' because the use was inside a SUBREG and rtx_equal_p does not catch that. Using reg_overlap_mentioned_p is much more robust. gcc/ChangeLog: * gcc/config/arm/arm.cc (arm_attempt_dlstp_transform): Use reg_overlap_mentioned_p instead of rtx_equal_p to detect uses of vctp_vpr_generated inside subregs. gcc/testsuite/ChangeLog: * gcc.target/arm/mve/dlstp-invalid-asm.c (test10): Renamed to... (test10a): ... this. (test10b): Variation of test10a with a small change to trigger wrong codegen. --- gcc/config/arm/arm.cc | 3 ++- .../gcc.target/arm/mve/dlstp-invalid-asm.c | 20 ++++++++++++++++++- 2 files changed, 21 insertions(+), 2 deletions(-) diff --git a/gcc/config/arm/arm.cc b/gcc/config/arm/arm.cc index 7292fddef80..7f82fb94a56 100644 --- a/gcc/config/arm/arm.cc +++ b/gcc/config/arm/arm.cc @@ -35847,7 +35847,8 @@ arm_attempt_dlstp_transform (rtx label) df_ref insn_uses = NULL; FOR_EACH_INSN_USE (insn_uses, insn) { - if (rtx_equal_p (vctp_vpr_generated, DF_REF_REG (insn_uses))) + if (reg_overlap_mentioned_p (vctp_vpr_generated, + DF_REF_REG (insn_uses))) { end_sequence (); return 1; diff --git a/gcc/testsuite/gcc.target/arm/mve/dlstp-invalid-asm.c b/gcc/testsuite/gcc.target/arm/mve/dlstp-invalid-asm.c index 26df2d30523..f26754cc482 100644 --- a/gcc/testsuite/gcc.target/arm/mve/dlstp-invalid-asm.c +++ b/gcc/testsuite/gcc.target/arm/mve/dlstp-invalid-asm.c @@ -128,7 +128,7 @@ void test9 (int32_t *a, int32_t *b, int32_t *c, int n) } /* Using a VPR that gets re-generated within the loop. */ -void test10 (int32_t *a, int32_t *b, int32_t *c, int n) +void test10a (int32_t *a, int32_t *b, int32_t *c, int n) { mve_pred16_t p = vctp32q (n); while (n > 0) @@ -145,6 +145,24 @@ void test10 (int32_t *a, int32_t *b, int32_t *c, int n) } } +/* Using a VPR that gets re-generated within the loop. */ +void test10b (int32_t *a, int32_t *b, int32_t *c, int n) +{ + mve_pred16_t p = vctp32q (n-4); + while (n > 0) + { + int32x4_t va = vldrwq_z_s32 (a, p); + p = vctp32q (n); + int32x4_t vb = vldrwq_z_s32 (b, p); + int32x4_t vc = vaddq_x_s32 (va, vb, p); + vstrwq_p_s32 (c, vc, p); + c += 4; + a += 4; + b += 4; + n -= 4; + } +} + /* Using vctp32q_m instead of vctp32q. */ void test11 (int32_t *a, int32_t *b, int32_t *c, int n, mve_pred16_t p0) {