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(unknown [8.129.0.173]) by APP-05 (Coremail) with SMTP id zQCowAB3XrmaY0hnpjwwBg--.5766S2; Thu, 28 Nov 2024 20:35:40 +0800 (CST) From: Dongyan Chen To: binutils@sourceware.org Cc: kito.cheng@gmail.com, nelson@rivosinc.com, jbeulich@suse.com, wuwei2016@iscas.ac.cn, jiawei@iscas.ac.cn, shihua@iscas.ac.cn, chenyixuan@iscas.ac.cn, Dongyan Chen Subject: [PATCH v2] RISC-V: Add support for ssdbltrp and smdbltrp extension. Date: Thu, 28 Nov 2024 20:35:36 +0800 Message-ID: <20241128123536.357369-1-chendongyan@isrc.iscas.ac.cn> X-Mailer: git-send-email 2.43.0 MIME-Version: 1.0 X-CM-TRANSID: zQCowAB3XrmaY0hnpjwwBg--.5766S2 X-Coremail-Antispam: 1UD129KBjvJXoWxWFyrCrWfGw4fXr4kXF48Xrb_yoWrJw4UpF Z3Ca10k3sxWF13X3s3Jr18Wr4xG34rCr15Ww4Fvw1UC39agrW5Xr1vyF1rAF48XFs8Gw43 ua13XrW3ua1UCaDanT9S1TB71UUUUU7qnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDU0xBIdaVrnRJUUUkG14x267AKxVW8JVW5JwAFc2x0x2IEx4CE42xK8VAvwI8IcIk0 rVWUuVWrJwAFIxvE14AKwVWUJVWUGwA2ocxC64kIII0Yj41l84x0c7CEw4AK67xGY2AK02 1l84ACjcxK6xIIjxv20xvE14v26r1j6r1xM28EF7xvwVC0I7IYx2IY6xkF7I0E14v26r1j 6r4UM28EF7xvwVC2z280aVAFwI0_Jr0_Gr1l84ACjcxK6I8E87Iv6xkF7I0E14v26r4j6r 4UJwAS0I0E0xvYzxvE52x082IY62kv0487Mc02F40EFcxC0VAKzVAqx4xG6I80ewAv7VC0 I7IYx2IY67AKxVWUJVWUGwAv7VC2z280aVAFwI0_Jr0_Gr1lOx8S6xCaFVCjc4AY6r1j6r 4UM4x0Y48IcxkI7VAKI48JM4x0x7Aq67IIx4CEVc8vx2IErcIFxwCY1x0262kKe7AKxVWU tVW8ZwCF04k20xvY0x0EwIxGrwCFx2IqxVCFs4IE7xkEbVWUJVW8JwC20s026c02F40E14 v26r1j6r18MI8I3I0E7480Y4vE14v26r106r1rMI8E67AF67kF1VAFwI0_Jw0_GFylIxkG c2Ij64vIr41lIxAIcVC0I7IYx2IY67AKxVWUJVWUCwCI42IY6xIIjxv20xvEc7CjxVAFwI 0_Jr0_Gr1lIxAIcVCF04k26cxKx2IYs7xG6r1j6r1xMIIF0xvEx4A2jsIE14v26r1j6r4U MIIF0xvEx4A2jsIEc7CjxVAFwI0_Gr0_Gr1UYxBIdaVFxhVjvjDU0xZFpf9x0JUd-B_UUU UU= X-Originating-IP: [8.129.0.173] X-CM-SenderInfo: hfkh0v5rqj5tnq6l223fol2u1dvotugofq/ X-Spam-Status: No, score=-14.4 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, RCVD_IN_MSPIKE_H2, SPF_HELO_PASS, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: binutils-bounces~patchwork=sourceware.org@sourceware.org This implements the ssdbltrp extensons, version 1.0[1] and the smdbltrp extensions, version1.0[2]. [1] https://github.com/riscv/riscv-isa-manual/blob/main/src/ssdbltrp.adoc [2] https://github.com/riscv/riscv-isa-manual/blob/main/src/smdbltrp.adoc Changes for v2: - Move the additions in the "gas/News" section to the top of the file. - Modify the indentation format of the case in the "gas/config/tc-riscv.c" file. bfd/ChangeLog: * elfxx-riscv.c: Add 'ssdbltrp' and 'smdbltrp' to the list of konwn standard extensions. gas/ChangeLog: * NEWS: Updated. * config/tc-riscv.c (enum riscv_csr_class): (riscv_csr_address): Add CSR classes for Ssdbltrp/Smdbltrp. * testsuite/gas/riscv/march-help.l: Updated. --- bfd/elfxx-riscv.c | 4 ++++ gas/NEWS | 4 ++++ gas/config/tc-riscv.c | 8 ++++++++ gas/testsuite/gas/riscv/march-help.l | 2 ++ 4 files changed, 18 insertions(+) -- 2.43.0 diff --git a/bfd/elfxx-riscv.c b/bfd/elfxx-riscv.c index 45da83e6926..49b4d5ca4eb 100644 --- a/bfd/elfxx-riscv.c +++ b/bfd/elfxx-riscv.c @@ -1272,6 +1272,8 @@ static struct riscv_implicit_subset riscv_implicit_subsets[] = {"sstvala", "+zicsr", check_implicit_always}, {"sstvecd", "+zicsr", check_implicit_always}, {"ssu64xl", "+zicsr", check_implicit_always}, + {"ssdbltrp", "+zicsr", check_implicit_always}, + {"smdbltrp", "+zicsr", check_implicit_always}, {"svade", "+zicsr", check_implicit_always}, {"svadu", "+zicsr", check_implicit_always}, @@ -1458,6 +1460,8 @@ static struct riscv_supported_ext riscv_supported_std_s_ext[] = {"sstvala", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 }, {"sstvecd", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 }, {"ssu64xl", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 }, + {"ssdbltrp", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 }, + {"smdbltrp", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 }, {"svade", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 }, {"svadu", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 }, {"svbare", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 }, diff --git a/gas/NEWS b/gas/NEWS index 23eda334ec6..a208a1fcc51 100644 --- a/gas/NEWS +++ b/gas/NEWS @@ -13,6 +13,10 @@ (xcvbitmanip, xcvsimd) extensions with version 1.0 and more SiFive extensions (xsfvqmaccdod, xsfvqmaccqoq and xsfvfnrclipxfqf). + Add support for the RISC-V ssdbltrp extension, version 1.0. + + Add support for the RISC-V smdbltrp extension, version 1.0. + Changes in 2.43: * Add support for LoongArch .option for fine-grained control of assembly diff --git a/gas/config/tc-riscv.c b/gas/config/tc-riscv.c index 3fb7727c250..ea865939b70 100644 --- a/gas/config/tc-riscv.c +++ b/gas/config/tc-riscv.c @@ -102,6 +102,8 @@ enum riscv_csr_class CSR_CLASS_SSTC_AND_H, /* Sstc only (with H) */ CSR_CLASS_SSTC_32, /* Sstc RV32 only */ CSR_CLASS_SSTC_AND_H_32, /* Sstc RV32 only (with H) */ + CSR_CLASS_SSDBLTRP, /* Ssdbltrp only */ + CSR_CLASS_SMDBLTRP, /* Smdbltrp only */ CSR_CLASS_XTHEADVECTOR, /* xtheadvector only */ }; @@ -1150,6 +1152,12 @@ riscv_csr_address (const char *csr_name, || csr_class == CSR_CLASS_SSTC_AND_H_32); extension = "sstc"; break; + case CSR_CLASS_SSDBLTRP: + extension = "ssdbltrp"; + break; + case CSR_CLASS_SMDBLTRP: + extension = "smdbltrp"; + break; case CSR_CLASS_DEBUG: break; case CSR_CLASS_XTHEADVECTOR: diff --git a/gas/testsuite/gas/riscv/march-help.l b/gas/testsuite/gas/riscv/march-help.l index 71cccb77102..c3e51c0ca2b 100644 --- a/gas/testsuite/gas/riscv/march-help.l +++ b/gas/testsuite/gas/riscv/march-help.l @@ -127,6 +127,8 @@ All available -march extensions for RISC-V: sstvala 1.0 sstvecd 1.0 ssu64xl 1.0 + ssdbltrp 1.0 + smdbltrp 1.0 svade 1.0 svadu 1.0 svbare 1.0