From patchwork Fri Nov 22 09:06:21 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hui Li X-Patchwork-Id: 101728 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 9F8BF3857001 for ; Fri, 22 Nov 2024 09:08:26 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 9F8BF3857001 X-Original-To: gdb-patches@sourceware.org Delivered-To: gdb-patches@sourceware.org Received: from mail.loongson.cn (mail.loongson.cn [114.242.206.163]) by sourceware.org (Postfix) with ESMTP id 561E43858283 for ; Fri, 22 Nov 2024 09:06:31 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 561E43858283 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=loongson.cn Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=loongson.cn ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 561E43858283 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=114.242.206.163 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1732266392; cv=none; b=s+s01I6rSlzUBnOlH+4C114kRuWGrJwQPhLHaC6ODEBzuLXUu779ZGrorf25KrI7RTtpjavkRgKn/srZ1iWVdBup364QOH4tn01SX/bZuxA8BjKWYXOGbOoqfeXFG/otNw+/XUrh7RIkEKFbwCywg7QEf9TyLgVQe5DQ1KSkGjg= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1732266392; c=relaxed/simple; bh=uIXyl02CZJSNtc0bXfzEqREphfTOsWvQVhBazHR6UpQ=; h=From:To:Subject:Date:Message-Id:MIME-Version; b=ZjTnYcLIL55LWARhuBu//LeswaHlubZeheI+wOmZcnj6eqpevrilCuWPvXgrsnezL2TbQlBoA1EM+4rA5y3cCTq+lY2RRyJI+91Wmaf8Sd3iL8XrtZGEtSwcUIgWTwZfueXcOEpzG8Tsid/CnhIb6cliEOBWsWmT7In0oJo4f6U= ARC-Authentication-Results: i=1; server2.sourceware.org DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 561E43858283 Received: from loongson.cn (unknown [113.200.148.30]) by gateway (Coremail) with SMTP id _____8CxCeGVSUBntu9FAA--.5820S3; Fri, 22 Nov 2024 17:06:29 +0800 (CST) Received: from localhost.localdomain (unknown [113.200.148.30]) by front1 (Coremail) with SMTP id qMiowMAxFMCRSUBn8ORiAA--.35644S3; Fri, 22 Nov 2024 17:06:26 +0800 (CST) From: Hui Li To: gdb-patches@sourceware.org Cc: Tiezhu Yang Subject: [PATCH v2 1/4] gdb: LoongArch: Add instruction definition for process record Date: Fri, 22 Nov 2024 17:06:21 +0800 Message-Id: <20241122090624.2355-2-lihui@loongson.cn> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20241122090624.2355-1-lihui@loongson.cn> References: <20241122090624.2355-1-lihui@loongson.cn> MIME-Version: 1.0 X-CM-TRANSID: qMiowMAxFMCRSUBn8ORiAA--.35644S3 X-CM-SenderInfo: 5olk3xo6or00hjvr0hdfq/ X-Coremail-Antispam: 1Uk129KBj9fXoWkWFyrWF48tr4xAw1xJr4DZFc_yoWfJr45to WxtFZxJaykJwn29r47Gw43Xr4xXF1kZFnrt3Z3J348Kr4xZrn5urn5Gw4rZ3y7CF12qFyk Cwn0qF1DGFW5uFnxl-sFpf9Il3svdjkaLaAFLSUrUUUUUb8apTn2vfkv8UJUUUU8wcxFpf 9Il3svdxBIdaVrneAqx4xG64xvF2IEw4CE5I8CrVC2j2WlIxkvb40E47kJYxn0WfASr-VF AUDa7-sFnT9fnUUIcSsGvfJTRUUUb4kYFVCjjxCrM7AC8VAFwI0_Jr0_Gr1l1xkIjI8I6I 8E6xAIw20EY4v20xvaj40_Wr0E3s1l1IIY67AEw4v_Jr0_Jr4l8cAvFVAK0II2c7xJM28C jxkF64kEwVA0rcxSw2x7M28EF7xvwVC0I7IYx2IY67AKxVWUJVWUCwA2z4x0Y4vE2Ix0cI 8IcVCY1x0267AKxVWUJVW8JwA2z4x0Y4vEx4A2jsIE14v26r4UJVWxJr1l84ACjcxK6I8E 87Iv6xkF7I0E14v26r4UJVWxJr1le2I262IYc4CY6c8Ij28IcVAaY2xG8wAqjxCEc2xF0c Ia020Ex4CE44I27wAqx4xG64xvF2IEw4CE5I8CrVC2j2WlYx0E2Ix0cI8IcVAFwI0_JrI_ JrylYx0Ex4A2jsIE14v26F4j6r4UJwAm72CE4IkC6x0Yz7v_Jr0_Gr1lF7xvr2IYc2Ij64 vIr41l42xK82IYc2Ij64vIr41l4I8I3I0E4IkC6x0Yz7v_Jr0_Gr1lx2IqxVAqx4xG67AK xVWUJVWUGwC20s026x8GjcxK67AKxVWUGVWUWwC2zVAF1VAY17CE14v26r1Y6r17MIIYY7 kG6xAYrwCIc40Y0x0EwIxGrwCI42IY6xIIjxv20xvE14v26r1j6r1xMIIF0xvE2Ix0cI8I cVCY1x0267AKxVWUJVW8JwCI42IY6xAIw20EY4v20xvaj40_Jr0_JF4lIxAIcVC2z280aV AFwI0_Jr0_Gr1lIxAIcVC2z280aVCY1x0267AKxVWUJVW8JbIYCTnIWIevJa73UjIFyTuY vjxUgOzVUUUUU X-Spam-Status: No, score=-12.1 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, KAM_SHORT, SPF_HELO_NONE, SPF_PASS, TXREP, URIBL_SBL_A autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gdb-patches-bounces~patchwork=sourceware.org@sourceware.org GDB provides a special process record function that can record a log of the process execution. The core of this feature is need to record the execution of all instructions. This patch adds opcode definitions and judgments in gdb/arch/loongarch-insn.h. This is preparation for later patch on LoongArch, there is no effect for the other archs with this patch. The LoongArch opcode and mask definitions are obtained from https://sourceware.org/git/?p=binutils-gdb.git;a=blob;f=opcodes/loongarch-opc.c LoongArch instruction description refer to the LoongArch Reference Manual: https://loongson.github.io/LoongArch-Documentation/LoongArch-Vol1-EN.html Signed-off-by: Hui Li Reviewed-By: Guinevere Larsen --- gdb/arch/loongarch-insn.h | 2556 +++++++++++++++++++++++++++++++++++++ 1 file changed, 2556 insertions(+) create mode 100644 gdb/arch/loongarch-insn.h diff --git a/gdb/arch/loongarch-insn.h b/gdb/arch/loongarch-insn.h new file mode 100644 index 00000000000..16d39562eb6 --- /dev/null +++ b/gdb/arch/loongarch-insn.h @@ -0,0 +1,2556 @@ +/* Target-dependent code for LoongArch + + Copyright (C) 2024 Free Software Foundation, Inc. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . */ + +/* The LoongArch opcode and mask definitions in this file are obtained from + https://sourceware.org/git/?p=binutils-gdb.git;a=blob;f=opcodes/loongarch-opc.c */ + +#ifndef ARCH_LOONGARCH_INSN_H +#define ARCH_LOONGARCH_INSN_H + +/* loongarch fix insn opcode */ +#define OP_CLO_W 0x00001000 +#define OP_CLZ_W 0x00001400 +#define OP_CTO_W 0x00001800 +#define OP_CTZ_W 0x00001c00 +#define OP_CLO_D 0x00002000 +#define OP_CLZ_D 0x00002400 +#define OP_CTO_D 0x00002800 +#define OP_CTZ_D 0x00002c00 +#define OP_REVB_2H 0x00003000 +#define OP_REVB_4H 0x00003400 +#define OP_REVB_2W 0x00003800 +#define OP_REVB_D 0x00003c00 +#define OP_REVH_2W 0x00004000 +#define OP_REVH_D 0x00004400 +#define OP_BITREV_4B 0x00004800 +#define OP_BITREV_8B 0x00004c00 +#define OP_BITREV_W 0x00005000 +#define OP_BITREV_D 0x00005400 +#define OP_EXT_W_H 0x00005800 +#define OP_EXT_W_B 0x00005c00 +#define OP_RDTIMEL_W 0x00006000 +#define OP_RDTIMEH_W 0x00006400 +#define OP_RDTIME_D 0x00006800 +#define OP_CPUCFG 0x00006c00 +#define OP_ASRTLE_D 0x00010000 +#define OP_ASRTGT_D 0x00018000 +#define OP_ALSL_W 0x00040000 +#define OP_ALSL_WU 0x00060000 +#define OP_BYTEPICK_W 0x00080000 +#define OP_BYTEPICK_D 0x000c0000 +#define OP_ADD_W 0x00100000 +#define OP_ADD_D 0x00108000 +#define OP_SUB_W 0x00110000 +#define OP_SUB_D 0x00118000 +#define OP_SLT 0x00120000 +#define OP_SLTU 0x00128000 +#define OP_MASKEQZ 0x00130000 +#define OP_MASKNEZ 0x00138000 +#define OP_NOR 0x00140000 +#define OP_AND 0x00148000 +#define OP_OR 0x00150000 +#define OP_XOR 0x00158000 +#define OP_ORN 0x00160000 +#define OP_ANDN 0x00168000 +#define OP_SLL_W 0x00170000 +#define OP_SRL_W 0x00178000 +#define OP_SRA_W 0x00180000 +#define OP_SLL_D 0x00188000 +#define OP_SRL_D 0x00190000 +#define OP_SRA_D 0x00198000 +#define OP_ROTR_W 0x001b0000 +#define OP_ROTR_D 0x001b8000 +#define OP_MUL_W 0x001c0000 +#define OP_MULH_W 0x001c8000 +#define OP_MULH_WU 0x001d0000 +#define OP_MUL_D 0x001d8000 +#define OP_MULH_D 0x001e0000 +#define OP_MULH_DU 0x001e8000 +#define OP_MULW_D_W 0x001f0000 +#define OP_MULW_D_WU 0x001f8000 +#define OP_DIV_W 0x00200000 +#define OP_MOD_W 0x00208000 +#define OP_DIV_WU 0x00210000 +#define OP_MOD_WU 0x00218000 +#define OP_DIV_D 0x00220000 +#define OP_MOD_D 0x00228000 +#define OP_DIV_DU 0x00230000 +#define OP_MOD_DU 0x00238000 +#define OP_CRC_W_B_W 0x00240000 +#define OP_CRC_W_H_W 0x00248000 +#define OP_CRC_W_W_W 0x00250000 +#define OP_CRC_W_D_W 0x00258000 +#define OP_CRCC_W_B_W 0x00260000 +#define OP_CRCC_W_H_W 0x00268000 +#define OP_CRCC_W_W_W 0x00270000 +#define OP_CRCC_W_D_W 0x00278000 +#define OP_BREAK 0x002a0000 +#define OP_DBCL 0x002a8000 +#define OP_SYSCALL 0x002b0000 +#define OP_ALSL_D 0x002c0000 +#define OP_SLLI_W 0x00408000 +#define OP_SLLI_D 0x00410000 +#define OP_SRLI_W 0x00448000 +#define OP_SRLI_D 0x00450000 +#define OP_SRAI_W 0x00488000 +#define OP_SRAI_D 0x00490000 +#define OP_ROTRI_W 0x004c8000 +#define OP_ROTRI_D 0x004d0000 +#define OP_BSTRINS_W 0x00600000 +#define OP_BSTRPICK_W 0x00608000 +#define OP_BSTRINS_D 0x00800000 +#define OP_BSTRPICK_D 0x00c00000 + +/* loongarch single float insn opcode */ +#define OP_FADD_S 0x01008000 +#define OP_SUB_S 0x01028000 +#define OP_MUL_S 0x01048000 +#define OP_FDIV_S 0x01068000 +#define OP_FMAX_S 0x01088000 +#define OP_FMIN_S 0x010a8000 +#define OP_FMAXA_S 0x010c8000 +#define OP_FMINA_S 0x010e8000 +#define OP_FSCALEB_S 0x01108000 +#define OP_FCOPYSIGN_S 0x01128000 +#define OP_FABS_S 0x01140400 +#define OP_FNEG_S 0x01141400 +#define OP_FLOGB_S 0x01142400 +#define OP_FCLASS_S 0x01143400 +#define OP_FSQRT_S 0x01144400 +#define OP_FRECIP_S 0x01145400 +#define OP_FRSQRT_S 0x01146400 +#define OP_FRECIPE_S 0x01147400 +#define OP_FRSQRTE_S 0x01148400 +#define OP_FMOV_S 0x01149400 +#define OP_MOVGR2FR_W 0x0114a400 +#define OP_MOVGR2FRH_W 0x0114ac00 +#define OP_MOVFR2GR_S 0x0114b400 +#define OP_MOVFRH2GR_S 0x0114bc00 +#define OP_MOVGR2FCSR 0x0114c000 +#define OP_MOVFCSR2GR 0x0114c800 +#define OP_MOVFR2CF 0x0114d000 +#define OP_MOVCF2FR 0x0114d400 +#define OP_MOVGR2CF 0x0114d800 +#define OP_MOVCF2GR 0x0114dc00 +#define OP_FTINTRM_W_S 0x011a0400 +#define OP_FTINTRM_L_S 0x011a2400 +#define OP_FTINTRP_W_S 0x011a4400 +#define OP_FTINTRP_L_S 0x011a6400 +#define OP_FTINTRZ_W_S 0x011a8400 +#define OP_FTINTRZ_L_S 0x011aa400 +#define OP_FTINTRNE_W_S 0x011ac400 +#define OP_FTINTRNE_L_S 0x011ae400 +#define OP_FTINT_W_S 0x011b0400 +#define OP_FTINT_L_S 0x011b2400 +#define OP_FFINT_S_W 0x011d1000 +#define OP_FFINT_S_L 0x011d1800 +#define OP_FRINT_S 0x011e4400 + +/* loongarch double float insn opcode */ +#define OP_FADD_D 0x01010000 +#define OP_FSUB_D 0x01030000 +#define OP_FMUL_D 0x01050000 +#define OP_FDIV_D 0x01070000 +#define OP_FMAX_D 0x01090000 +#define OP_FMIN_D 0x010b0000 +#define OP_FMAXA_D 0x010d0000 +#define OP_FMINA_D 0x010f0000 +#define OP_FSCALEB_D 0x01110000 +#define OP_FCOPYSIGN_D 0x01130000 +#define OP_FABS_D 0x01140800 +#define OP_FNEG_D 0x01141800 +#define OP_FLOGB_D 0x01142800 +#define OP_FCLASS_D 0x01143800 +#define OP_FSQRT_D 0x01144800 +#define OP_FRECIP_D 0x01145800 +#define OP_FRSQRT_D 0x01146800 +#define OP_FRECIPE_D 0x01147800 +#define OP_FRSQRTE_D 0x01148800 +#define OP_FMOV_D 0x01149800 +#define OP_MOVGR2FR_D 0x0114a800 +#define OP_MOVFR2GR_D 0x0114b800 +#define OP_FCVT_S_D 0x01191800 +#define OP_FCVT_D_S 0x01192400 +#define OP_FTINTRM_W_D 0x011a0800 +#define OP_FTINTRM_L_D 0x011a2800 +#define OP_FTINTRP_W_D 0x011a4800 +#define OP_FTINTRP_L_D 0x011a6800 +#define OP_FTINTRZ_W_D 0x011a8800 +#define OP_FTINTRZ_L_D 0x011aa800 +#define OP_FTINTRNE_W_D 0x011ac800 +#define OP_FTINTRNE_L_D 0x011ae800 +#define OP_FTINT_W_D 0x011b0800 +#define OP_FTINT_L_D 0x011b2800 +#define OP_FFINT_D_W 0x011d2000 +#define OP_FFINT_D_L 0x011d2800 +#define OP_FRINT_D 0x011e4800 + +/* loongarch imm insn opcode */ +#define OP_SLTI 0x02000000 +#define OP_SLTUI 0x02400000 +#define OP_ADDI_W 0x02800000 +#define OP_ADDI_D 0x02c00000 +#define OP_LU52I_D 0x03000000 +#define OP_ANDI 0x03400000 +#define OP_ORI 0x03800000 +#define OP_XORI 0x03c00000 +#define OP_ADDU16I_D 0x10000000 +#define OP_LU12I_W 0x14000000 +#define OP_LU32I_D 0x16000000 +#define OP_PCADDI 0x18000000 +#define OP_PCALAU12I 0x1a000000 +#define OP_PCADDU12I 0x1c000000 +#define OP_PCADDU18I 0x1e000000 + +/* loongarch privilege insn opcode */ +#define OP_CSRRD 0x04000000 +#define OP_CSRWR 0x04000020 +#define OP_CSRXCHG 0x04000000 +#define OP_CACOP 0x06000000 +#define OP_LDDIR 0x06400000 +#define OP_LDPTE 0x06440000 +#define OP_IOCSRRD_B 0x06480000 +#define OP_IOCSRRD_H 0x06480400 +#define OP_IOCSRRD_W 0x06480800 +#define OP_IOCSRRD_D 0x06480c00 +#define OP_IOCSRWR_B 0x06481000 +#define OP_IOCSRWR_H 0x06481400 +#define OP_IOCSRWR_W 0x06481800 +#define OP_IOCSRWR_D 0x06481c00 +#define OP_TLBCLR 0x06482000 +#define OP_TLBFLUSH 0x06482400 +#define OP_TLBSRCH 0x06482800 +#define OP_TLBRD 0x06482c00 +#define OP_TLBWR 0x06483000 +#define OP_TLBFILL 0x06483400 +#define OP_ERTN 0x06483800 +#define OP_IDLE 0x06488000 +#define OP_INVTLB 0x06498000 + +/* loongarch 4opt single float insn opcode */ +#define OP_FMADD_S 0x08100000 +#define OP_FMSUB_S 0x08500000 +#define OP_FNMADD_S 0x08900000 +#define OP_FNMSUB_S 0x08d00000 +#define OP_FCMP_CAF_S 0x0c100000 +#define OP_FCMP_SAF_S 0x0c108000 +#define OP_FCMP_CLT_S 0x0c110000 +#define OP_FCMP_SLT_S 0x0c118000 +#define OP_FCMP_SGT_S 0x0c118000 +#define OP_FCMP_CEQ_S 0x0c120000 +#define OP_FCMP_SEQ_S 0x0c128000 +#define OP_FCMP_CLE_S 0x0c130000 +#define OP_FCMP_SLE_S 0x0c138000 +#define OP_FCMP_SGE_S 0x0c138000 +#define OP_FCMP_CUN_S 0x0c140000 +#define OP_FCMP_SUN_S 0x0c148000 +#define OP_FCMP_CULT_S 0x0c150000 +#define OP_FCMP_CUGT_S 0x0c150000 +#define OP_FCMP_SULT_S 0x0c158000 +#define OP_FCMP_CUEQ_S 0x0c160000 +#define OP_FCMP_SUEQ_S 0x0c168000 +#define OP_FCMP_CULE_S 0x0c170000 +#define OP_FCMP_CUGE_S 0x0c170000 +#define OP_FCMP_SULE_S 0x0c178000 +#define OP_FCMP_CNE_S 0x0c180000 +#define OP_FCMP_SNE_S 0x0c188000 +#define OP_FCMP_COR_S 0x0c1a0000 +#define OP_FCMP_SOR_S 0x0c1a8000 +#define OP_FCMP_CUNE_S 0x0c1c0000 +#define OP_FCMP_SUNE_S 0x0c1c8000 +#define OP_FSEL 0x0d000000 + +/* loongarch 4opt double float insn opcode */ +#define OP_FMADD_D 0x08200000 +#define OP_FMSUB_D 0x08600000 +#define OP_FNMADD_D 0x08a00000 +#define OP_FNMSUB_D 0x08e00000 +#define OP_FCMP_CAF_D 0x0c200000 +#define OP_FCMP_SAF_D 0x0c208000 +#define OP_FCMP_CLT_D 0x0c210000 +#define OP_FCMP_SLT_D 0x0c218000 +#define OP_FCMP_SGT_D 0x0c218000 +#define OP_FCMP_CEQ_D 0x0c220000 +#define OP_FCMP_SEQ_D 0x0c228000 +#define OP_FCMP_CLE_D 0x0c230000 +#define OP_FCMP_SLE_D 0x0c238000 +#define OP_FCMP_SGE_D 0x0c238000 +#define OP_FCMP_CUN_D 0x0c240000 +#define OP_FCMP_SUN_D 0x0c248000 +#define OP_FCMP_CULT_D 0x0c250000 +#define OP_FCMP_CUGT_D 0x0c250000 +#define OP_FCMP_SULT_D 0x0c258000 +#define OP_FCMP_CUEQ_D 0x0c260000 +#define OP_FCMP_SUEQ_D 0x0c268000 +#define OP_FCMP_CULE_D 0x0c270000 +#define OP_FCMP_CUGE_D 0x0c270000 +#define OP_FCMP_SULE_D 0x0c278000 +#define OP_FCMP_CNE_D 0x0c280000 +#define OP_FCMP_SNE_D 0x0c288000 +#define OP_FCMP_COR_D 0x0c2a0000 +#define OP_FCMP_SOR_D 0x0c2a8000 +#define OP_FCMP_CUNE_D 0x0c2c0000 +#define OP_FCMP_SUNE_D 0x0c2c8000 + +/* loongarch load store insn opcode */ +#define OP_LL_W 0x20000000 +#define OP_SC_W 0x21000000 +#define OP_LL_D 0x22000000 +#define OP_SC_D 0x23000000 +#define OP_LDPTR_W 0x24000000 +#define OP_STPTR_W 0x25000000 +#define OP_LDPTR_D 0x26000000 +#define OP_STPTR_D 0x27000000 +#define OP_LD_B 0x28000000 +#define OP_LD_H 0x28400000 +#define OP_LD_W 0x28800000 +#define OP_LD_D 0x28c00000 +#define OP_ST_B 0x29000000 +#define OP_ST_H 0x29400000 +#define OP_ST_W 0x29800000 +#define OP_ST_D 0x29c00000 +#define OP_LD_BU 0x2a000000 +#define OP_LD_HU 0x2a400000 +#define OP_LD_WU 0x2a800000 +#define OP_PRELD 0x2ac00000 +#define OP_LDX_B 0x38000000 +#define OP_LDX_H 0x38040000 +#define OP_LDX_W 0x38080000 +#define OP_LDX_D 0x380c0000 +#define OP_STX_B 0x38100000 +#define OP_STX_H 0x38140000 +#define OP_STX_W 0x38180000 +#define OP_STX_D 0x381c0000 +#define OP_LDX_BU 0x38200000 +#define OP_LDX_HU 0x38240000 +#define OP_LDX_WU 0x38280000 +#define OP_PRELDX 0x382c0000 +#define OP_SC_Q 0x38570000 +#define OP_LLACQ_W 0x38578000 +#define OP_SCREL_W 0x38578400 +#define OP_LLACQ_D 0x38578800 +#define OP_SCREL_D 0x38578c00 +#define OP_AMCAS_B 0x38580000 +#define OP_AMCAS_H 0x38588000 +#define OP_AMCAS_W 0x38590000 +#define OP_AMCAS_D 0x38598000 +#define OP_AMCAS_DB_B 0x385a0000 +#define OP_AMCAS_DB_H 0x385a8000 +#define OP_AMCAS_DB_W 0x385b0000 +#define OP_AMCAS_DB_D 0x385b8000 +#define OP_AMSWAP_B 0x385c0000 +#define OP_AMSWAP_H 0x385c8000 +#define OP_AMADD_B 0x385d0000 +#define OP_AMADD_H 0x385d8000 +#define OP_AMSWAP_DB_B 0x385e0000 +#define OP_AMSWAP_DB_H 0x385e8000 +#define OP_AMADD_DB_B 0x385f0000 +#define OP_AMADD_DB_H 0x385f8000 +#define OP_AMSWAP_W 0x38600000 +#define OP_AMSWAP_D 0x38608000 +#define OP_AMADD_W 0x38610000 +#define OP_AMADD_D 0x38618000 +#define OP_AMAND_W 0x38620000 +#define OP_AMAND_D 0x38628000 +#define OP_AMOR_W 0x38630000 +#define OP_AMOR_D 0x38638000 +#define OP_AMXOR_W 0x38640000 +#define OP_AMXOR_D 0x38648000 +#define OP_AMMAX_W 0x38650000 +#define OP_AMMAX_D 0x38658000 +#define OP_AMMIN_W 0x38660000 +#define OP_AMMIN_D 0x38668000 +#define OP_AMMAX_WU 0x38670000 +#define OP_AMMAX_DU 0x38678000 +#define OP_AMMIN_WU 0x38680000 +#define OP_AMMIN_DU 0x38688000 +#define OP_AMSWAP_DB_W 0x38690000 +#define OP_AMSWAP_DB_D 0x38698000 +#define OP_AMADD_DB_W 0x386a0000 +#define OP_AMADD_DB_D 0x386a8000 +#define OP_AMAND_DB_W 0x386b0000 +#define OP_AMAND_DB_D 0x386b8000 +#define OP_AMOR_DB_W 0x386c0000 +#define OP_AMOR_DB_D 0x386c8000 +#define OP_AMXOR_DB_W 0x386d0000 +#define OP_AMXOR_DB_D 0x386d8000 +#define OP_AMMAX_DB_W 0x386e0000 +#define OP_AMMAX_DB_D 0x386e8000 +#define OP_AMMIN_DB_W 0x386f0000 +#define OP_AMMIN_DB_D 0x386f8000 +#define OP_AMMAX_DB_WU 0x38700000 +#define OP_AMMAX_DB_DU 0x38708000 +#define OP_AMMIN_DB_WU 0x38710000 +#define OP_AMMIN_DB_DU 0x38718000 +#define OP_DBAR 0x38720000 +#define OP_IBAR 0x38728000 +#define OP_LDGT_B 0x38780000 +#define OP_LDGT_H 0x38788000 +#define OP_LDGT_W 0x38790000 +#define OP_LDGT_D 0x38798000 +#define OP_LDLE_B 0x387a0000 +#define OP_LDLE_H 0x387a8000 +#define OP_LDLE_W 0x387b0000 +#define OP_LDLE_D 0x387b8000 +#define OP_STGT_B 0x387c0000 +#define OP_STGT_H 0x387c8000 +#define OP_STGT_W 0x387d0000 +#define OP_STGT_D 0x387d8000 +#define OP_STLE_B 0x387e0000 +#define OP_STLE_H 0x387e8000 +#define OP_STLE_W 0x387f0000 +#define OP_STLE_D 0x387f8000 +#define OP_VLD 0x2c000000 +#define OP_VST 0x2c400000 +#define OP_XVLD 0x2c800000 +#define OP_XVST 0x2cc00000 + +/* loongarch single float load store insn opcode */ +#define OP_FLD_S 0x2b000000 +#define OP_FST_S 0x2b400000 +#define OP_FLDX_S 0x38300000 +#define OP_FSTX_S 0x38380000 +#define OP_FLDGT_S 0x38740000 +#define OP_FLDLE_S 0x38750000 +#define OP_FSTGT_S 0x38760000 +#define OP_FSTLE_S 0x38770000 + +/* loongarch double float load store insn opcode */ +#define OP_FLD_D 0x2b800000 +#define OP_FST_D 0x2bc00000 +#define OP_FLDX_D 0x38340000 +#define OP_FSTX_D 0x383c0000 +#define OP_FLDGT_D 0x38748000 +#define OP_FLDLE_D 0x38758000 +#define OP_FSTGT_D 0x38768000 +#define OP_FSTLE_D 0x38778000 + +/* loongarch float jmp insn opcode */ +#define OP_BCEQZ 0x48000000 +#define OP_BCNEZ 0x48000100 + +/* loongarch jmp insn opcode */ +#define OP_BEQZ 0x40000000 +#define OP_BNEZ 0x44000000 +#define OP_JIRL 0x4c000000 +#define OP_B 0x50000000 +#define OP_BL 0x54000000 +#define OP_BEQ 0x58000000 +#define OP_BNE 0x5c000000 +#define OP_BLT 0x60000000 +#define OP_BGE 0x64000000 +#define OP_BLTU 0x68000000 +#define OP_BGEU 0x6c000000 + +/* loongarch fix insn mask */ +#define MASK_CLO_W 0xfffffc00 +#define MASK_CLZ_W 0xfffffc00 +#define MASK_CTO_W 0xfffffc00 +#define MASK_CTZ_W 0xfffffc00 +#define MASK_CLO_D 0xfffffc00 +#define MASK_CLZ_D 0xfffffc00 +#define MASK_CTO_D 0xfffffc00 +#define MASK_CTZ_D 0xfffffc00 +#define MASK_REVB_2H 0xfffffc00 +#define MASK_REVB_4H 0xfffffc00 +#define MASK_REVB_2W 0xfffffc00 +#define MASK_REVB_D 0xfffffc00 +#define MASK_REVH_2W 0xfffffc00 +#define MASK_REVH_D 0xfffffc00 +#define MASK_BITREV_4B 0xfffffc00 +#define MASK_BITREV_8B 0xfffffc00 +#define MASK_BITREV_W 0xfffffc00 +#define MASK_BITREV_D 0xfffffc00 +#define MASK_EXT_W_H 0xfffffc00 +#define MASK_EXT_W_B 0xfffffc00 +#define MASK_RDTIMEL_W 0xfffffc00 +#define MASK_RDTIMEH_W 0xfffffc00 +#define MASK_RDTIME_D 0xfffffc00 +#define MASK_CPUCFG 0xfffffc00 +#define MASK_ASRTLE_D 0xffff801f +#define MASK_ASRTGT_D 0xffff801f +#define MASK_ALSL_W 0xfffe0000 +#define MASK_ALSL_WU 0xfffe0000 +#define MASK_BYTEPICK_W 0xfffe0000 +#define MASK_BYTEPICK_D 0xfffc0000 +#define MASK_ADD_W 0xffff8000 +#define MASK_ADD_D 0xffff8000 +#define MASK_SUB_W 0xffff8000 +#define MASK_SUB_D 0xffff8000 +#define MASK_SLT 0xffff8000 +#define MASK_SLTU 0xffff8000 +#define MASK_MASKEQZ 0xffff8000 +#define MASK_MASKNEZ 0xffff8000 +#define MASK_NOR 0xffff8000 +#define MASK_AND 0xffff8000 +#define MASK_OR 0xffff8000 +#define MASK_XOR 0xffff8000 +#define MASK_ORN 0xffff8000 +#define MASK_ANDN 0xffff8000 +#define MASK_SLL_W 0xffff8000 +#define MASK_SRL_W 0xffff8000 +#define MASK_SRA_W 0xffff8000 +#define MASK_SLL_D 0xffff8000 +#define MASK_SRL_D 0xffff8000 +#define MASK_SRA_D 0xffff8000 +#define MASK_ROTR_W 0xffff8000 +#define MASK_ROTR_D 0xffff8000 +#define MASK_MUL_W 0xffff8000 +#define MASK_MULH_W 0xffff8000 +#define MASK_MULH_WU 0xffff8000 +#define MASK_MUL_D 0xffff8000 +#define MASK_MULH_D 0xffff8000 +#define MASK_MULH_DU 0xffff8000 +#define MASK_MULW_D_W 0xffff8000 +#define MASK_MULW_D_WU 0xffff8000 +#define MASK_DIV_W 0xffff8000 +#define MASK_MOD_W 0xffff8000 +#define MASK_DIV_WU 0xffff8000 +#define MASK_MOD_WU 0xffff8000 +#define MASK_DIV_D 0xffff8000 +#define MASK_MOD_D 0xffff8000 +#define MASK_DIV_DU 0xffff8000 +#define MASK_MOD_DU 0xffff8000 +#define MASK_CRC_W_B_W 0xffff8000 +#define MASK_CRC_W_H_W 0xffff8000 +#define MASK_CRC_W_W_W 0xffff8000 +#define MASK_CRC_W_D_W 0xffff8000 +#define MASK_CRCC_W_B_W 0xffff8000 +#define MASK_CRCC_W_H_W 0xffff8000 +#define MASK_CRCC_W_W_W 0xffff8000 +#define MASK_CRCC_W_D_W 0xffff8000 +#define MASK_BREAK 0xffff8000 +#define MASK_DBCL 0xffff8000 +#define MASK_SYSCALL 0xffff8000 +#define MASK_ALSL_D 0xfffe0000 +#define MASK_SLLI_W 0xffff8000 +#define MASK_SLLI_D 0xffff0000 +#define MASK_SRLI_W 0xffff8000 +#define MASK_SRLI_D 0xffff0000 +#define MASK_SRAI_W 0xffff8000 +#define MASK_SRAI_D 0xffff0000 +#define MASK_ROTRI_W 0xffff8000 +#define MASK_ROTRI_D 0xffff0000 +#define MASK_BSTRINS_W 0xffe08000 +#define MASK_BSTRPICK_W 0xffe08000 +#define MASK_BSTRINS_D 0xffc00000 +#define MASK_BSTRPICK_D 0xffc00000 + +/* loongarch single float insn mask */ +#define MASK_FADD_S 0xffff8000 +#define MASK_SUB_S 0xffff8000 +#define MASK_MUL_S 0xffff8000 +#define MASK_FDIV_S 0xffff8000 +#define MASK_FMAX_S 0xffff8000 +#define MASK_FMIN_S 0xffff8000 +#define MASK_FMAXA_S 0xffff8000 +#define MASK_FMINA_S 0xffff8000 +#define MASK_FSCALEB_S 0xffff8000 +#define MASK_FCOPYSIGN_S 0xffff8000 +#define MASK_FABS_S 0xfffffc00 +#define MASK_FNEG_S 0xfffffc00 +#define MASK_FLOGB_S 0xfffffc00 +#define MASK_FCLASS_S 0xfffffc00 +#define MASK_FSQRT_S 0xfffffc00 +#define MASK_FRECIP_S 0xfffffc00 +#define MASK_FRSQRT_S 0xfffffc00 +#define MASK_FRECIPE_S 0xfffffc00 +#define MASK_FRSQRTE_S 0xfffffc00 +#define MASK_FMOV_S 0xfffffc00 +#define MASK_MOVGR2FR_W 0xfffffc00 +#define MASK_MOVGR2FRH_W 0xfffffc00 +#define MASK_MOVFR2GR_S 0xfffffc00 +#define MASK_MOVFRH2GR_S 0xfffffc00 +#define MASK_MOVGR2FCSR 0xfffffc1c +#define MASK_MOVFCSR2GR 0xffffff80 +#define MASK_MOVFR2CF 0xfffffc18 +#define MASK_MOVCF2FR 0xffffff00 +#define MASK_MOVGR2CF 0xfffffc18 +#define MASK_MOVCF2GR 0xffffff00 +#define MASK_FTINTRM_W_S 0xfffffc00 +#define MASK_FTINTRM_L_S 0xfffffc00 +#define MASK_FTINTRP_W_S 0xfffffc00 +#define MASK_FTINTRP_L_S 0xfffffc00 +#define MASK_FTINTRZ_W_S 0xfffffc00 +#define MASK_FTINTRZ_L_S 0xfffffc00 +#define MASK_FTINTRNE_W_S 0xfffffc00 +#define MASK_FTINTRNE_L_S 0xfffffc00 +#define MASK_FTINT_W_S 0xfffffc00 +#define MASK_FTINT_L_S 0xfffffc00 +#define MASK_FFINT_S_W 0xfffffc00 +#define MASK_FFINT_S_L 0xfffffc00 +#define MASK_FRINT_S 0xfffffc00 + +/* loongarch double float insn mask */ +#define MASK_FADD_D 0xffff8000 +#define MASK_FSUB_D 0xffff8000 +#define MASK_FMUL_D 0xffff8000 +#define MASK_FDIV_D 0xffff8000 +#define MASK_FMAX_D 0xffff8000 +#define MASK_FMIN_D 0xffff8000 +#define MASK_FMAXA_D 0xffff8000 +#define MASK_FMINA_D 0xffff8000 +#define MASK_FSCALEB_D 0xffff8000 +#define MASK_FCOPYSIGN_D 0xffff8000 +#define MASK_FABS_D 0xfffffc00 +#define MASK_FNEG_D 0xfffffc00 +#define MASK_FLOGB_D 0xfffffc00 +#define MASK_FCLASS_D 0xfffffc00 +#define MASK_FSQRT_D 0xfffffc00 +#define MASK_FRECIP_D 0xfffffc00 +#define MASK_FRSQRT_D 0xfffffc00 +#define MASK_FRECIPE_D 0xfffffc00 +#define MASK_FRSQRTE_D 0xfffffc00 +#define MASK_FMOV_D 0xfffffc00 +#define MASK_MOVGR2FR_D 0xfffffc00 +#define MASK_MOVFR2GR_D 0xfffffc00 +#define MASK_FCVT_S_D 0xfffffc00 +#define MASK_FCVT_D_S 0xfffffc00 +#define MASK_FTINTRM_W_D 0xfffffc00 +#define MASK_FTINTRM_L_D 0xfffffc00 +#define MASK_FTINTRP_W_D 0xfffffc00 +#define MASK_FTINTRP_L_D 0xfffffc00 +#define MASK_FTINTRZ_W_D 0xfffffc00 +#define MASK_FTINTRZ_L_D 0xfffffc00 +#define MASK_FTINTRNE_W_D 0xfffffc00 +#define MASK_FTINTRNE_L_D 0xfffffc00 +#define MASK_FTINT_W_D 0xfffffc00 +#define MASK_FTINT_L_D 0xfffffc00 +#define MASK_FFINT_D_W 0xfffffc00 +#define MASK_FFINT_D_L 0xfffffc00 +#define MASK_FRINT_D 0xfffffc00 + +/* loongarch imm insn mask */ +#define MASK_SLTI 0xfffffc00 +#define MASK_SLTUI 0xffc00000 +#define MASK_ADDI_W 0xffc00000 +#define MASK_ADDI_D 0xffc00000 +#define MASK_LU52I_D 0xffc00000 +#define MASK_ANDI 0xffc00000 +#define MASK_ORI 0xffc00000 +#define MASK_XORI 0xffc00000 +#define MASK_ADDU16I_D 0xfc000000 +#define MASK_LU12I_W 0xfe000000 +#define MASK_LU32I_D 0xfe000000 +#define MASK_PCADDI 0xfe000000 +#define MASK_PCALAU12I 0xfe000000 +#define MASK_PCADDU12I 0xfe000000 +#define MASK_PCADDU18I 0xfe000000 + +/* loongarch privilege insn mask */ +#define MASK_CSRRD 0xff0003e0 +#define MASK_CSRWR 0xff0003e0 +#define MASK_CSRXCHG 0xff000000 +#define MASK_CACOP 0xffc00000 +#define MASK_LDDIR 0xfffc0000 +#define MASK_LDPTE 0xfffc001f +#define MASK_IOCSRRD_B 0xfffffc00 +#define MASK_IOCSRRD_H 0xfffffc00 +#define MASK_IOCSRRD_W 0xfffffc00 +#define MASK_IOCSRRD_D 0xfffffc00 +#define MASK_IOCSRWR_B 0xfffffc00 +#define MASK_IOCSRWR_H 0xfffffc00 +#define MASK_IOCSRWR_W 0xfffffc00 +#define MASK_IOCSRWR_D 0xfffffc00 +#define MASK_TLBCLR 0xffffffff +#define MASK_TLBFLUSH 0xffffffff +#define MASK_TLBSRCH 0xffffffff +#define MASK_TLBRD 0xffffffff +#define MASK_TLBWR 0xffffffff +#define MASK_TLBFILL 0xffffffff +#define MASK_ERTN 0xffffffff +#define MASK_IDLE 0xffff8000 +#define MASK_INVTLB 0xffff8000 + +/* loongarch 4opt single float insn mask */ +#define MASK_FMADD_S 0xfff00000 +#define MASK_FMSUB_S 0xfff00000 +#define MASK_FNMADD_S 0xfff00000 +#define MASK_FNMSUB_S 0xfff00000 +#define MASK_FCMP_CAF_S 0xffff8018 +#define MASK_FCMP_SAF_S 0xffff8018 +#define MASK_FCMP_CLT_S 0xffff8018 +#define MASK_FCMP_SLT_S 0xffff8018 +#define MASK_FCMP_SGT_S 0xffff8018 +#define MASK_FCMP_CEQ_S 0xffff8018 +#define MASK_FCMP_SEQ_S 0xffff8018 +#define MASK_FCMP_CLE_S 0xffff8018 +#define MASK_FCMP_SLE_S 0xffff8018 +#define MASK_FCMP_SGE_S 0xffff8018 +#define MASK_FCMP_CUN_S 0xffff8018 +#define MASK_FCMP_SUN_S 0xffff8018 +#define MASK_FCMP_CULT_S 0xffff8018 +#define MASK_FCMP_CUGT_S 0xffff8018 +#define MASK_FCMP_SULT_S 0xffff8018 +#define MASK_FCMP_CUEQ_S 0xffff8018 +#define MASK_FCMP_SUEQ_S 0xffff8018 +#define MASK_FCMP_CULE_S 0xffff8018 +#define MASK_FCMP_CUGE_S 0xffff8018 +#define MASK_FCMP_SULE_S 0xffff8018 +#define MASK_FCMP_CNE_S 0xffff8018 +#define MASK_FCMP_SNE_S 0xffff8018 +#define MASK_FCMP_COR_S 0xffff8018 +#define MASK_FCMP_SOR_S 0xffff8018 +#define MASK_FCMP_CUNE_S 0xffff8018 +#define MASK_FCMP_SUNE_S 0xffff8018 +#define MASK_FSEL 0xfffc0000 + +/* loongarch 4opt double float insn mask */ +#define MASK_FMADD_D 0xfff00000 +#define MASK_FMSUB_D 0xfff00000 +#define MASK_FNMADD_D 0xfff00000 +#define MASK_FNMSUB_D 0xfff00000 +#define MASK_FCMP_CAF_D 0xffff8018 +#define MASK_FCMP_SAF_D 0xffff8018 +#define MASK_FCMP_CLT_D 0xffff8018 +#define MASK_FCMP_SLT_D 0xffff8018 +#define MASK_FCMP_SGT_D 0xffff8018 +#define MASK_FCMP_CEQ_D 0xffff8018 +#define MASK_FCMP_SEQ_D 0xffff8018 +#define MASK_FCMP_CLE_D 0xffff8018 +#define MASK_FCMP_SLE_D 0xffff8018 +#define MASK_FCMP_SGE_D 0xffff8018 +#define MASK_FCMP_CUN_D 0xffff8018 +#define MASK_FCMP_SUN_D 0xffff8018 +#define MASK_FCMP_CULT_D 0xffff8018 +#define MASK_FCMP_CUGT_D 0xffff8018 +#define MASK_FCMP_SULT_D 0xffff8018 +#define MASK_FCMP_CUEQ_D 0xffff8018 +#define MASK_FCMP_SUEQ_D 0xffff8018 +#define MASK_FCMP_CULE_D 0xffff8018 +#define MASK_FCMP_CUGE_D 0xffff8018 +#define MASK_FCMP_SULE_D 0xffff8018 +#define MASK_FCMP_CNE_D 0xffff8018 +#define MASK_FCMP_SNE_D 0xffff8018 +#define MASK_FCMP_COR_D 0xffff8018 +#define MASK_FCMP_SOR_D 0xffff8018 +#define MASK_FCMP_CUNE_D 0xffff8018 +#define MASK_FCMP_SUNE_D 0xffff8018 + +/* loongarch load store insn mask */ +#define MASK_LL_W 0xff000000 +#define MASK_SC_W 0xff000000 +#define MASK_LL_D 0xff000000 +#define MASK_SC_D 0xff000000 +#define MASK_LDPTR_W 0xff000000 +#define MASK_STPTR_W 0xff000000 +#define MASK_LDPTR_D 0xff000000 +#define MASK_STPTR_D 0xff000000 +#define MASK_LD_B 0xffc00000 +#define MASK_LD_H 0xffc00000 +#define MASK_LD_W 0xffc00000 +#define MASK_LD_D 0xffc00000 +#define MASK_ST_B 0xffc00000 +#define MASK_ST_H 0xffc00000 +#define MASK_ST_W 0xffc00000 +#define MASK_ST_D 0xffc00000 +#define MASK_LD_BU 0xffc00000 +#define MASK_LD_HU 0xffc00000 +#define MASK_LD_WU 0xffc00000 +#define MASK_PRELD 0xffc00000 +#define MASK_LDX_B 0xffff8000 +#define MASK_LDX_H 0xffff8000 +#define MASK_LDX_W 0xffff8000 +#define MASK_LDX_D 0xffff8000 +#define MASK_STX_B 0xffff8000 +#define MASK_STX_H 0xffff8000 +#define MASK_STX_W 0xffff8000 +#define MASK_STX_D 0xffff8000 +#define MASK_LDX_BU 0xffff8000 +#define MASK_LDX_HU 0xffff8000 +#define MASK_LDX_WU 0xffff8000 +#define MASK_PRELDX 0xffff8000 +#define MASK_SC_Q 0xffff8000 +#define MASK_LLACQ_W 0xfffffc00 +#define MASK_SCREL_W 0xfffffc00 +#define MASK_LLACQ_D 0xfffffc00 +#define MASK_SCREL_D 0xfffffc00 +#define MASK_AMCAS_B 0xffff8000 +#define MASK_AMCAS_H 0xffff8000 +#define MASK_AMCAS_W 0xffff8000 +#define MASK_AMCAS_D 0xffff8000 +#define MASK_AMCAS_DB_B 0xffff8000 +#define MASK_AMCAS_DB_H 0xffff8000 +#define MASK_AMCAS_DB_W 0xffff8000 +#define MASK_AMCAS_DB_D 0xffff8000 +#define MASK_AMSWAP_B 0xffff8000 +#define MASK_AMSWAP_H 0xffff8000 +#define MASK_AMADD_B 0xffff8000 +#define MASK_AMADD_H 0xffff8000 +#define MASK_AMSWAP_DB_B 0xffff8000 +#define MASK_AMSWAP_DB_H 0xffff8000 +#define MASK_AMADD_DB_B 0xffff8000 +#define MASK_AMADD_DB_H 0xffff8000 +#define MASK_AMSWAP_W 0xffff8000 +#define MASK_AMSWAP_D 0xffff8000 +#define MASK_AMADD_W 0xffff8000 +#define MASK_AMADD_D 0xffff8000 +#define MASK_AMAND_W 0xffff8000 +#define MASK_AMAND_D 0xffff8000 +#define MASK_AMOR_W 0xffff8000 +#define MASK_AMOR_D 0xffff8000 +#define MASK_AMXOR_W 0xffff8000 +#define MASK_AMXOR_D 0xffff8000 +#define MASK_AMMAX_W 0xffff8000 +#define MASK_AMMAX_D 0xffff8000 +#define MASK_AMMIN_W 0xffff8000 +#define MASK_AMMIN_D 0xffff8000 +#define MASK_AMMAX_WU 0xffff8000 +#define MASK_AMMAX_DU 0xffff8000 +#define MASK_AMMIN_WU 0xffff8000 +#define MASK_AMMIN_DU 0xffff8000 +#define MASK_AMSWAP_DB_W 0xffff8000 +#define MASK_AMSWAP_DB_D 0xffff8000 +#define MASK_AMADD_DB_W 0xffff8000 +#define MASK_AMADD_DB_D 0xffff8000 +#define MASK_AMAND_DB_W 0xffff8000 +#define MASK_AMAND_DB_D 0xffff8000 +#define MASK_AMOR_DB_W 0xffff8000 +#define MASK_AMOR_DB_D 0xffff8000 +#define MASK_AMXOR_DB_W 0xffff8000 +#define MASK_AMXOR_DB_D 0xffff8000 +#define MASK_AMMAX_DB_W 0xffff8000 +#define MASK_AMMAX_DB_D 0xffff8000 +#define MASK_AMMIN_DB_W 0xffff8000 +#define MASK_AMMIN_DB_D 0xffff8000 +#define MASK_AMMAX_DB_WU 0xffff8000 +#define MASK_AMMAX_DB_DU 0xffff8000 +#define MASK_AMMIN_DB_WU 0xffff8000 +#define MASK_AMMIN_DB_DU 0xffff8000 +#define MASK_DBAR 0xffff8000 +#define MASK_IBAR 0xffff8000 +#define MASK_LDGT_B 0xffff8000 +#define MASK_LDGT_H 0xffff8000 +#define MASK_LDGT_W 0xffff8000 +#define MASK_LDGT_D 0xffff8000 +#define MASK_LDLE_B 0xffff8000 +#define MASK_LDLE_H 0xffff8000 +#define MASK_LDLE_W 0xffff8000 +#define MASK_LDLE_D 0xffff8000 +#define MASK_STGT_B 0xffff8000 +#define MASK_STGT_H 0xffff8000 +#define MASK_STGT_W 0xffff8000 +#define MASK_STGT_D 0xffff8000 +#define MASK_STLE_B 0xffff8000 +#define MASK_STLE_H 0xffff8000 +#define MASK_STLE_W 0xffff8000 +#define MASK_STLE_D 0xffff8000 +#define MASK_VLD 0xffc00000 +#define MASK_VST 0xffc00000 +#define MASK_XVLD 0xffc00000 +#define MASK_XVST 0xffc00000 + +/* loongarch single float load store insn mask */ +#define MASK_FLD_S 0xffc00000 +#define MASK_FST_S 0xffc00000 +#define MASK_FLDX_S 0xffff8000 +#define MASK_FSTX_S 0xffff8000 +#define MASK_FLDGT_S 0xffff8000 +#define MASK_FLDLE_S 0xffff8000 +#define MASK_FSTGT_S 0xffff8000 +#define MASK_FSTLE_S 0xffff8000 + +/* loongarch double float load store insn mask */ +#define MASK_FLD_D 0xffc00000 +#define MASK_FST_D 0xffc00000 +#define MASK_FLDX_D 0xffff8000 +#define MASK_FSTX_D 0xffff8000 +#define MASK_FLDGT_D 0xffff8000 +#define MASK_FLDLE_D 0xffff8000 +#define MASK_FSTGT_D 0xffff8000 +#define MASK_FSTLE_D 0xffff8000 + +/* loongarch float jmp insn mask */ +#define MASK_BCEQZ 0xfc000300 +#define MASK_BCNEZ 0xfc000300 + +/* loongarch jmp insn mask */ +#define MASK_BEQZ 0xfc000000 +#define MASK_BNEZ 0xfc000000 +#define MASK_JIRL 0xfc000000 +#define MASK_B 0xfc000000 +#define MASK_BL 0xfc000000 +#define MASK_BEQ 0xfc000000 +#define MASK_BNE 0xfc000000 +#define MASK_BLT 0xfc000000 +#define MASK_BGE 0xfc000000 +#define MASK_BLTU 0xfc000000 +#define MASK_BGEU 0xfc000000 + +/* Define a series of is_XXX_insn functions to check if the value INSN + is an instance of instruction XXX. */ +#define DECLARE_INSN(INSN_NAME, INSN_OPCODE, INSN_MASK) \ +static inline bool is_ ## INSN_NAME ## _insn (uint32_t insn) \ +{ \ + return (insn & INSN_MASK) == INSN_OPCODE; \ +} + +/* loongarch fix instruction */ +DECLARE_INSN(clo_w, OP_CLO_W, MASK_CLO_W) +DECLARE_INSN(clz_w, OP_CLZ_W, MASK_CLZ_W) +DECLARE_INSN(cto_w, OP_CTO_W, MASK_CTO_W) +DECLARE_INSN(ctz_w, OP_CTZ_W, MASK_CTZ_W) +DECLARE_INSN(clo_d, OP_CLO_D, MASK_CLO_D) +DECLARE_INSN(clz_d, OP_CLZ_D, MASK_CLZ_D) +DECLARE_INSN(cto_d, OP_CTO_D, MASK_CTO_D) +DECLARE_INSN(ctz_d, OP_CTZ_D, MASK_CTZ_D) +DECLARE_INSN(revb_2h, OP_REVB_2H, MASK_REVB_2H) +DECLARE_INSN(revb_4h, OP_REVB_4H, MASK_REVB_4H) +DECLARE_INSN(revb_2w, OP_REVB_2W, MASK_REVB_2W) +DECLARE_INSN(revb_d, OP_REVB_D, MASK_REVB_D) +DECLARE_INSN(revh_2w, OP_REVH_2W, MASK_REVH_2W) +DECLARE_INSN(revh_d, OP_REVH_D, MASK_REVH_D) +DECLARE_INSN(bitrev_4b, OP_BITREV_4B, MASK_BITREV_4B) +DECLARE_INSN(bitrev_8b, OP_BITREV_8B, MASK_BITREV_8B) +DECLARE_INSN(bitrev_w, OP_BITREV_W, MASK_BITREV_W) +DECLARE_INSN(bitrev_d, OP_BITREV_D, MASK_BITREV_D) +DECLARE_INSN(ext_w_h, OP_EXT_W_H, MASK_EXT_W_H) +DECLARE_INSN(ext_w_b, OP_EXT_W_B, MASK_EXT_W_B) +DECLARE_INSN(rdtimel_w, OP_RDTIMEL_W, MASK_RDTIMEL_W) +DECLARE_INSN(rdtimeh_w, OP_RDTIMEH_W, MASK_RDTIMEH_W) +DECLARE_INSN(rdtime_d, OP_RDTIME_D, MASK_RDTIME_D) +DECLARE_INSN(cpucfg, OP_CPUCFG, MASK_CPUCFG) +DECLARE_INSN(asrtle_d, OP_ASRTLE_D, MASK_ASRTLE_D) +DECLARE_INSN(asrtgt_d, OP_ASRTGT_D, MASK_ASRTGT_D) +DECLARE_INSN(alsl_w, OP_ALSL_W, MASK_ALSL_W) +DECLARE_INSN(alsl_wu, OP_ALSL_WU, MASK_ALSL_WU) +DECLARE_INSN(bytepick_w, OP_BYTEPICK_W, MASK_BYTEPICK_W) +DECLARE_INSN(bytepick_d, OP_BYTEPICK_D, MASK_BYTEPICK_D) +DECLARE_INSN(add_w, OP_ADD_W, MASK_ADD_W) +DECLARE_INSN(add_d, OP_ADD_D, MASK_ADD_D) +DECLARE_INSN(sub_w, OP_SUB_W, MASK_SUB_W) +DECLARE_INSN(sub_d, OP_SUB_D, MASK_SUB_D) +DECLARE_INSN(slt, OP_SLT, MASK_SLT) +DECLARE_INSN(sltu, OP_SLTU, MASK_SLTU) +DECLARE_INSN(maskeqz, OP_MASKEQZ, MASK_MASKEQZ) +DECLARE_INSN(masknez, OP_MASKNEZ, MASK_MASKNEZ) +DECLARE_INSN(nor, OP_NOR, MASK_NOR) +DECLARE_INSN(and, OP_AND, MASK_AND) +DECLARE_INSN(or, OP_OR, MASK_OR) +DECLARE_INSN(xor, OP_XOR, MASK_XOR) +DECLARE_INSN(orn, OP_ORN, MASK_ORN) +DECLARE_INSN(andn, OP_ANDN, MASK_ANDN) +DECLARE_INSN(sll_w, OP_SLL_W, MASK_SLL_W) +DECLARE_INSN(srl_w, OP_SRL_W, MASK_SRL_W) +DECLARE_INSN(sra_w, OP_SRA_W, MASK_SRA_W) +DECLARE_INSN(sll_d, OP_SLL_D, MASK_SLL_D) +DECLARE_INSN(srl_d, OP_SRL_D, MASK_SRL_D) +DECLARE_INSN(sra_d, OP_SRA_D, MASK_SRA_D) +DECLARE_INSN(rotr_w, OP_ROTR_W, MASK_ROTR_W) +DECLARE_INSN(rotr_d, OP_ROTR_D, MASK_ROTR_D) +DECLARE_INSN(mul_w, OP_MUL_W, MASK_MUL_W) +DECLARE_INSN(mulh_w, OP_MULH_W, MASK_MULH_W) +DECLARE_INSN(mulh_wu, OP_MULH_WU, MASK_MULH_WU) +DECLARE_INSN(mul_d, OP_MUL_D, MASK_MUL_D) +DECLARE_INSN(mulh_d, OP_MULH_D, MASK_MULH_D) +DECLARE_INSN(mulh_du, OP_MULH_DU, MASK_MULH_DU) +DECLARE_INSN(mulw_d_w, OP_MULW_D_W, MASK_MULW_D_W) +DECLARE_INSN(mulw_d_wu, OP_MULW_D_WU, MASK_MULW_D_WU) +DECLARE_INSN(div_w, OP_DIV_W, MASK_DIV_W) +DECLARE_INSN(mod_w, OP_MOD_W, MASK_MOD_W) +DECLARE_INSN(div_wu, OP_DIV_WU, MASK_DIV_WU) +DECLARE_INSN(mod_wu, OP_MOD_WU, MASK_MOD_WU) +DECLARE_INSN(div_d, OP_DIV_D, MASK_DIV_D) +DECLARE_INSN(mod_d, OP_MOD_D, MASK_MOD_D) +DECLARE_INSN(div_du, OP_DIV_DU, MASK_DIV_DU) +DECLARE_INSN(mod_du, OP_MOD_DU, MASK_MOD_DU) +DECLARE_INSN(crc_w_b_w, OP_CRC_W_B_W, MASK_CRC_W_B_W) +DECLARE_INSN(crc_w_h_w, OP_CRC_W_H_W, MASK_CRC_W_H_W) +DECLARE_INSN(crc_w_w_w, OP_CRC_W_W_W, MASK_CRC_W_W_W) +DECLARE_INSN(crc_w_d_w, OP_CRC_W_D_W, MASK_CRC_W_D_W) +DECLARE_INSN(crcc_w_b_w, OP_CRCC_W_B_W, MASK_CRCC_W_B_W) +DECLARE_INSN(crcc_w_h_w, OP_CRCC_W_H_W, MASK_CRCC_W_H_W) +DECLARE_INSN(crcc_w_w_w, OP_CRCC_W_W_W, MASK_CRCC_W_W_W) +DECLARE_INSN(crcc_w_d_w, OP_CRCC_W_D_W, MASK_CRCC_W_D_W) +DECLARE_INSN(break, OP_BREAK, MASK_BREAK) +DECLARE_INSN(dbcl, OP_DBCL, MASK_DBCL) +DECLARE_INSN(syscall, OP_SYSCALL, MASK_SYSCALL) +DECLARE_INSN(alsl_d, OP_ALSL_D, MASK_ALSL_D) +DECLARE_INSN(slli_w, OP_SLLI_W, MASK_SLLI_W) +DECLARE_INSN(slli_d, OP_SLLI_D, MASK_SLLI_D) +DECLARE_INSN(srli_w, OP_SRLI_W, MASK_SRLI_W) +DECLARE_INSN(srli_d, OP_SRLI_D, MASK_SRLI_D) +DECLARE_INSN(srai_w, OP_SRAI_W, MASK_SRAI_W) +DECLARE_INSN(srai_d, OP_SRAI_D, MASK_SRAI_D) +DECLARE_INSN(rotri_w, OP_ROTRI_W, MASK_ROTRI_W) +DECLARE_INSN(rotri_d, OP_ROTRI_D, MASK_ROTRI_D) +DECLARE_INSN(bstrins_w, OP_BSTRINS_W, MASK_BSTRINS_W) +DECLARE_INSN(bstrpick_w, OP_BSTRPICK_W, MASK_BSTRPICK_W) +DECLARE_INSN(bstrins_d, OP_BSTRINS_D, MASK_BSTRINS_D) +DECLARE_INSN(bstrpick_d, OP_BSTRPICK_D, MASK_BSTRPICK_D) + +/* loongarch single float instruction */ +DECLARE_INSN(fadd_s, OP_FADD_S, MASK_FADD_S) +DECLARE_INSN(fsub_s, OP_SUB_S, MASK_SUB_S) +DECLARE_INSN(fmul_s, OP_MUL_S, MASK_MUL_S) +DECLARE_INSN(fdiv_s, OP_FDIV_S, MASK_FDIV_S) +DECLARE_INSN(fmax_s, OP_FMAX_S, MASK_FMAX_S) +DECLARE_INSN(fmin_s, OP_FMIN_S, MASK_FMIN_S) +DECLARE_INSN(fmaxa_s, OP_FMAXA_S, MASK_FMAXA_S) +DECLARE_INSN(fmina_s, OP_FMINA_S, MASK_FMINA_S) +DECLARE_INSN(fscaleb_s, OP_FSCALEB_S, MASK_FSCALEB_S) +DECLARE_INSN(fcopysign_s, OP_FCOPYSIGN_S, MASK_FCOPYSIGN_S) +DECLARE_INSN(fabs_s, OP_FABS_S, MASK_FABS_S) +DECLARE_INSN(fneg_s, OP_FNEG_S, MASK_FNEG_S) +DECLARE_INSN(flogb_s, OP_FLOGB_S, MASK_FLOGB_S) +DECLARE_INSN(fclass_s, OP_FCLASS_S, MASK_FCLASS_S) +DECLARE_INSN(fsqrt_s, OP_FSQRT_S, MASK_FSQRT_S) +DECLARE_INSN(frecip_s, OP_FRECIP_S, MASK_FRECIP_S) +DECLARE_INSN(frsqrt_s, OP_FRSQRT_S, MASK_FRSQRT_S) +DECLARE_INSN(frecipe_s, OP_FRECIPE_S, MASK_FRECIPE_S) +DECLARE_INSN(frsqrte_s, OP_FRSQRTE_S, MASK_FRSQRTE_S) +DECLARE_INSN(fmov_s, OP_FMOV_S, MASK_FMOV_S) +DECLARE_INSN(movgr2fr_w, OP_MOVGR2FR_W, MASK_MOVGR2FR_W) +DECLARE_INSN(movgr2frh_w, OP_MOVGR2FRH_W, MASK_MOVGR2FRH_W) +DECLARE_INSN(movfr2gr_s, OP_MOVFR2GR_S, MASK_MOVFR2GR_S) +DECLARE_INSN(movfrh2gr_s, OP_MOVFRH2GR_S, MASK_MOVFRH2GR_S) +DECLARE_INSN(movgr2fcsr, OP_MOVGR2FCSR, MASK_MOVGR2FCSR) +DECLARE_INSN(movfcsr2gr, OP_MOVFCSR2GR, MASK_MOVFCSR2GR) +DECLARE_INSN(movfr2cf, OP_MOVFR2CF, MASK_MOVFR2CF) +DECLARE_INSN(movcf2fr, OP_MOVCF2FR, MASK_MOVCF2FR) +DECLARE_INSN(movgr2cf, OP_MOVGR2CF, MASK_MOVGR2CF) +DECLARE_INSN(movcf2gr, OP_MOVCF2GR, MASK_MOVCF2GR) +DECLARE_INSN(ftintrm_w_s, OP_FTINTRM_W_S, MASK_FTINTRM_W_S) +DECLARE_INSN(ftintrm_l_s, OP_FTINTRM_L_S, MASK_FTINTRM_L_S) +DECLARE_INSN(ftintrp_w_s, OP_FTINTRP_W_S, MASK_FTINTRP_W_S) +DECLARE_INSN(ftintrp_l_s, OP_FTINTRP_L_S, MASK_FTINTRP_L_S) +DECLARE_INSN(ftintrz_w_s, OP_FTINTRZ_W_S, MASK_FTINTRZ_W_S) +DECLARE_INSN(ftintrz_l_s, OP_FTINTRZ_L_S, MASK_FTINTRZ_L_S) +DECLARE_INSN(ftintrne_w_s, OP_FTINTRNE_W_S, MASK_FTINTRNE_W_S) +DECLARE_INSN(ftintrne_l_s, OP_FTINTRNE_L_S, MASK_FTINTRNE_L_S) +DECLARE_INSN(ftint_w_s, OP_FTINT_W_S, MASK_FTINT_W_S) +DECLARE_INSN(ftint_l_s, OP_FTINT_L_S, MASK_FTINT_L_S) +DECLARE_INSN(ffint_s_w, OP_FFINT_S_W, MASK_FFINT_S_W) +DECLARE_INSN(ffint_s_l, OP_FFINT_S_L, MASK_FFINT_S_L) +DECLARE_INSN(frint_s, OP_FRINT_S, MASK_FRINT_S) + +/* loongarch double float instruction */ +DECLARE_INSN(fadd_d, OP_FADD_D, MASK_FADD_D) +DECLARE_INSN(fsub_d, OP_FSUB_D, MASK_FSUB_D) +DECLARE_INSN(fmul_d, OP_FMUL_D, MASK_FMUL_D) +DECLARE_INSN(fdiv_d, OP_FDIV_D, MASK_FDIV_D) +DECLARE_INSN(fmax_d, OP_FMAX_D, MASK_FMAX_D) +DECLARE_INSN(fmin_d, OP_FMIN_D, MASK_FMIN_D) +DECLARE_INSN(fmaxa_d, OP_FMAXA_D, MASK_FMAXA_D) +DECLARE_INSN(fmina_d, OP_FMINA_D, MASK_FMINA_D) +DECLARE_INSN(fscaleb_d, OP_FSCALEB_D, MASK_FSCALEB_D) +DECLARE_INSN(fcopysign_d, OP_FCOPYSIGN_D, MASK_FCOPYSIGN_D) +DECLARE_INSN(fabs_d, OP_FABS_D, MASK_FABS_D) +DECLARE_INSN(fneg_d, OP_FNEG_D, MASK_FNEG_D) +DECLARE_INSN(flogb_d, OP_FLOGB_D, MASK_FLOGB_D) +DECLARE_INSN(fclass_d, OP_FCLASS_D, MASK_FCLASS_D) +DECLARE_INSN(fsqrt_d, OP_FSQRT_D, MASK_FSQRT_D) +DECLARE_INSN(frecip_d, OP_FRECIP_D, MASK_FRECIP_D) +DECLARE_INSN(frsqrt_d, OP_FRSQRT_D, MASK_FRSQRT_D) +DECLARE_INSN(frecipe_d, OP_FRECIPE_D, MASK_FRECIPE_D) +DECLARE_INSN(frsqrte_d, OP_FRSQRTE_D, MASK_FRSQRTE_D) +DECLARE_INSN(fmov_d, OP_FMOV_D, MASK_FMOV_D) +DECLARE_INSN(movgr2fr_d, OP_MOVGR2FR_D, MASK_MOVGR2FR_D) +DECLARE_INSN(movfr2gr_d, OP_MOVFR2GR_D, MASK_MOVFR2GR_D) +DECLARE_INSN(fcvt_s_d, OP_FCVT_S_D, MASK_FCVT_S_D) +DECLARE_INSN(fcvt_d_s, OP_FCVT_D_S, MASK_FCVT_D_S) +DECLARE_INSN(ftintrm_w_d, OP_FTINTRM_W_D, MASK_FTINTRM_W_D) +DECLARE_INSN(ftintrm_l_d, OP_FTINTRM_L_D, MASK_FTINTRM_L_D) +DECLARE_INSN(ftintrp_w_d, OP_FTINTRP_W_D, MASK_FTINTRP_W_D) +DECLARE_INSN(ftintrp_l_d, OP_FTINTRP_L_D, MASK_FTINTRP_L_D) +DECLARE_INSN(ftintrz_w_d, OP_FTINTRZ_W_D, MASK_FTINTRZ_W_D) +DECLARE_INSN(ftintrz_l_d, OP_FTINTRZ_L_D, MASK_FTINTRZ_L_D) +DECLARE_INSN(ftintrne_w_d, OP_FTINTRNE_W_D, MASK_FTINTRNE_W_D) +DECLARE_INSN(ftintrne_l_d, OP_FTINTRNE_L_D, MASK_FTINTRNE_L_D) +DECLARE_INSN(ftint_w_d, OP_FTINT_W_D, MASK_FTINT_W_D) +DECLARE_INSN(ftint_l_d, OP_FTINT_L_D, MASK_FTINT_L_D) +DECLARE_INSN(ffint_d_w, OP_FFINT_D_W, MASK_FFINT_D_W) +DECLARE_INSN(ffint_d_l, OP_FFINT_D_L, MASK_FFINT_D_L) +DECLARE_INSN(frint_d, OP_FRINT_D, MASK_FRINT_D) + +/* loongarch imm instruction */ +DECLARE_INSN(slti, OP_SLTI, MASK_SLTI) +DECLARE_INSN(sltui, OP_SLTUI, MASK_SLTUI) +DECLARE_INSN(addi_w, OP_ADDI_W, MASK_ADDI_W) +DECLARE_INSN(addi_d, OP_ADDI_D, MASK_ADDI_D) +DECLARE_INSN(lu52i_d, OP_LU52I_D, MASK_LU52I_D) +DECLARE_INSN(andi, OP_ANDI, MASK_ANDI) +DECLARE_INSN(ori, OP_ORI, MASK_ORI) +DECLARE_INSN(xori, OP_XORI, MASK_XORI) +DECLARE_INSN(addu16i_d, OP_ADDU16I_D, MASK_ADDU16I_D) +DECLARE_INSN(lu12i_w, OP_LU12I_W, MASK_LU12I_W) +DECLARE_INSN(lu32i_d, OP_LU32I_D, MASK_LU32I_D) +DECLARE_INSN(pcaddi, OP_PCADDI, MASK_PCADDI) +DECLARE_INSN(pcalau12i, OP_PCALAU12I, MASK_PCALAU12I) +DECLARE_INSN(pcaddu12i, OP_PCADDU12I, MASK_PCADDU12I) +DECLARE_INSN(pcaddu18i, OP_PCADDU18I, MASK_PCADDU18I) + +/* loongarch privilege instruction */ +DECLARE_INSN(csrrd, OP_CSRRD, MASK_CSRRD) +DECLARE_INSN(csrwr, OP_CSRWR, MASK_CSRWR) +DECLARE_INSN(csrxchg, OP_CSRXCHG, MASK_CSRXCHG) +DECLARE_INSN(cacop, OP_CACOP, MASK_CACOP) +DECLARE_INSN(lddir, OP_LDDIR, MASK_LDDIR) +DECLARE_INSN(ldpte, OP_LDPTE, MASK_LDPTE) +DECLARE_INSN(iocsrrd_b, OP_IOCSRRD_B, MASK_IOCSRRD_B) +DECLARE_INSN(iocsrrd_h, OP_IOCSRRD_H, MASK_IOCSRRD_H) +DECLARE_INSN(iocsrrd_w, OP_IOCSRRD_W, MASK_IOCSRRD_W) +DECLARE_INSN(iocsrrd_d, OP_IOCSRRD_D, MASK_IOCSRRD_D) +DECLARE_INSN(iocsrwr_b, OP_IOCSRWR_B, MASK_IOCSRWR_B) +DECLARE_INSN(iocsrwr_h, OP_IOCSRWR_H, MASK_IOCSRWR_H) +DECLARE_INSN(iocsrwr_w, OP_IOCSRWR_W, MASK_IOCSRWR_W) +DECLARE_INSN(iocsrwr_d, OP_IOCSRWR_D, MASK_IOCSRWR_D) +DECLARE_INSN(tlbclr, OP_TLBCLR, MASK_TLBCLR) +DECLARE_INSN(tlbflush, OP_TLBFLUSH, MASK_TLBFLUSH) +DECLARE_INSN(tlbsrch, OP_TLBSRCH, MASK_TLBSRCH) +DECLARE_INSN(tlbrd, OP_TLBRD, MASK_TLBRD) +DECLARE_INSN(tlbwr, OP_TLBWR, MASK_TLBWR) +DECLARE_INSN(tlbfill, OP_TLBFILL, MASK_TLBFILL) +DECLARE_INSN(ertn, OP_ERTN, MASK_ERTN) +DECLARE_INSN(idle, OP_IDLE, MASK_IDLE) +DECLARE_INSN(invtlb, OP_INVTLB, MASK_INVTLB) + +/* loongarch 4opt single float instruction */ +DECLARE_INSN(fmadd_s, OP_FMADD_S, MASK_FMADD_S) +DECLARE_INSN(fmsub_s, OP_FMSUB_S, MASK_FMSUB_S) +DECLARE_INSN(fnmadd_s, OP_FNMADD_S, MASK_FNMADD_S) +DECLARE_INSN(fnmsub_s, OP_FNMSUB_S, MASK_FNMSUB_S) +DECLARE_INSN(fcmp_caf_s, OP_FCMP_CAF_S, MASK_FCMP_CAF_S) +DECLARE_INSN(fcmp_saf_s, OP_FCMP_SAF_S, MASK_FCMP_SAF_S) +DECLARE_INSN(fcmp_clt_s, OP_FCMP_CLT_S, MASK_FCMP_CLT_S) +DECLARE_INSN(fcmp_slt_s, OP_FCMP_SLT_S, MASK_FCMP_SLT_S) +DECLARE_INSN(fcmp_sgt_s, OP_FCMP_SGT_S, MASK_FCMP_SGT_S) +DECLARE_INSN(fcmp_ceq_s, OP_FCMP_CEQ_S, MASK_FCMP_CEQ_S) +DECLARE_INSN(fcmp_seq_s, OP_FCMP_SEQ_S, MASK_FCMP_SEQ_S) +DECLARE_INSN(fcmp_cle_s, OP_FCMP_CLE_S, MASK_FCMP_CLE_S) +DECLARE_INSN(fcmp_sle_s, OP_FCMP_SLE_S, MASK_FCMP_SLE_S) +DECLARE_INSN(fcmp_sge_s, OP_FCMP_SGE_S, MASK_FCMP_SGE_S) +DECLARE_INSN(fcmp_cun_s, OP_FCMP_CUN_S, MASK_FCMP_CUN_S) +DECLARE_INSN(fcmp_sun_s, OP_FCMP_SUN_S, MASK_FCMP_SUN_S) +DECLARE_INSN(fcmp_cult_s, OP_FCMP_CULT_S, MASK_FCMP_CULT_S) +DECLARE_INSN(fcmp_cugt_s, OP_FCMP_CUGT_S, MASK_FCMP_CUGT_S) +DECLARE_INSN(fcmp_sult_s, OP_FCMP_SULT_S, MASK_FCMP_SULT_S) +DECLARE_INSN(fcmp_cueq_s, OP_FCMP_CUEQ_S, MASK_FCMP_CUEQ_S) +DECLARE_INSN(fcmp_sueq_s, OP_FCMP_SUEQ_S, MASK_FCMP_SUEQ_S) +DECLARE_INSN(fcmp_cule_s, OP_FCMP_CULE_S, MASK_FCMP_CULE_S) +DECLARE_INSN(fcmp_cuge_s, OP_FCMP_CUGE_S, MASK_FCMP_CUGE_S) +DECLARE_INSN(fcmp_sule_s, OP_FCMP_SULE_S, MASK_FCMP_SULE_S) +DECLARE_INSN(fcmp_cne_s, OP_FCMP_CNE_S, MASK_FCMP_CNE_S) +DECLARE_INSN(fcmp_sne_s, OP_FCMP_SNE_S, MASK_FCMP_SNE_S) +DECLARE_INSN(fcmp_cor_s, OP_FCMP_COR_S, MASK_FCMP_COR_S) +DECLARE_INSN(fcmp_sor_s, OP_FCMP_SOR_S, MASK_FCMP_SOR_S) +DECLARE_INSN(fcmp_cune_s, OP_FCMP_CUNE_S, MASK_FCMP_CUNE_S) +DECLARE_INSN(fcmp_sune_s, OP_FCMP_SUNE_S, MASK_FCMP_SUNE_S) +DECLARE_INSN(fsel, OP_FSEL, MASK_FSEL) + +/* loongarch 4opt double float instruction */ +DECLARE_INSN(fmadd_d, OP_FMADD_D, MASK_FMADD_D) +DECLARE_INSN(fmsub_d, OP_FMSUB_D, MASK_FMSUB_D) +DECLARE_INSN(fnmadd_d, OP_FNMADD_D, MASK_FNMADD_D) +DECLARE_INSN(fnmsub_d, OP_FNMSUB_D, MASK_FNMSUB_D) +DECLARE_INSN(fcmp_caf_d, OP_FCMP_CAF_D, MASK_FCMP_CAF_D) +DECLARE_INSN(fcmp_saf_d, OP_FCMP_SAF_D, MASK_FCMP_SAF_D) +DECLARE_INSN(fcmp_clt_d, OP_FCMP_CLT_D, MASK_FCMP_CLT_D) +DECLARE_INSN(fcmp_slt_d, OP_FCMP_SLT_D, MASK_FCMP_SLT_D) +DECLARE_INSN(fcmp_sgt_d, OP_FCMP_SGT_D, MASK_FCMP_SGT_D) +DECLARE_INSN(fcmp_ceq_d, OP_FCMP_CEQ_D, MASK_FCMP_CEQ_D) +DECLARE_INSN(fcmp_seq_d, OP_FCMP_SEQ_D, MASK_FCMP_SEQ_D) +DECLARE_INSN(fcmp_cle_d, OP_FCMP_CLE_D, MASK_FCMP_CLE_D) +DECLARE_INSN(fcmp_sle_d, OP_FCMP_SLE_D, MASK_FCMP_SLE_D) +DECLARE_INSN(fcmp_sge_d, OP_FCMP_SGE_D, MASK_FCMP_SGE_D) +DECLARE_INSN(fcmp_cun_d, OP_FCMP_CUN_D, MASK_FCMP_CUN_D) +DECLARE_INSN(fcmp_sun_d, OP_FCMP_SUN_D, MASK_FCMP_SUN_D) +DECLARE_INSN(fcmp_cult_d, OP_FCMP_CULT_D, MASK_FCMP_CULT_D) +DECLARE_INSN(fcmp_cugt_d, OP_FCMP_CUGT_D, MASK_FCMP_CUGT_D) +DECLARE_INSN(fcmp_sult_d, OP_FCMP_SULT_D, MASK_FCMP_SULT_D) +DECLARE_INSN(fcmp_cueq_d, OP_FCMP_CUEQ_D, MASK_FCMP_CUEQ_D) +DECLARE_INSN(fcmp_sueq_d, OP_FCMP_SUEQ_D, MASK_FCMP_SUEQ_D) +DECLARE_INSN(fcmp_cule_d, OP_FCMP_CULE_D, MASK_FCMP_CULE_D) +DECLARE_INSN(fcmp_cuge_d, OP_FCMP_CUGE_D, MASK_FCMP_CUGE_D) +DECLARE_INSN(fcmp_sule_d, OP_FCMP_SULE_D, MASK_FCMP_SULE_D) +DECLARE_INSN(fcmp_cne_d, OP_FCMP_CNE_D, MASK_FCMP_CNE_D) +DECLARE_INSN(fcmp_sne_d, OP_FCMP_SNE_D, MASK_FCMP_SNE_D) +DECLARE_INSN(fcmp_cor_d, OP_FCMP_COR_D, MASK_FCMP_COR_D) +DECLARE_INSN(fcmp_sor_d, OP_FCMP_SOR_D, MASK_FCMP_SOR_D) +DECLARE_INSN(fcmp_cune_d, OP_FCMP_CUNE_D, MASK_FCMP_CUNE_D) +DECLARE_INSN(fcmp_sune_d, OP_FCMP_SUNE_D, MASK_FCMP_SUNE_D) + +/* loongarch load store instruction */ +DECLARE_INSN(ll_w, OP_LL_W, MASK_LL_W) +DECLARE_INSN(sc_w, OP_SC_W, MASK_SC_W) +DECLARE_INSN(ll_d, OP_LL_D, MASK_LL_D) +DECLARE_INSN(sc_d, OP_SC_D, MASK_SC_D) +DECLARE_INSN(ldptr_w, OP_LDPTR_W, MASK_LDPTR_W) +DECLARE_INSN(stptr_w, OP_STPTR_W, MASK_STPTR_W) +DECLARE_INSN(ldptr_d, OP_LDPTR_D, MASK_LDPTR_D) +DECLARE_INSN(stptr_d, OP_STPTR_D, MASK_STPTR_D) +DECLARE_INSN(ld_b, OP_LD_B, MASK_LD_B) +DECLARE_INSN(ld_h, OP_LD_H, MASK_LD_H) +DECLARE_INSN(ld_w, OP_LD_W, MASK_LD_W) +DECLARE_INSN(ld_d, OP_LD_D, MASK_LD_D) +DECLARE_INSN(st_b, OP_ST_B, MASK_ST_B) +DECLARE_INSN(st_h, OP_ST_H, MASK_ST_H) +DECLARE_INSN(st_w, OP_ST_W, MASK_ST_W) +DECLARE_INSN(st_d, OP_ST_D, MASK_ST_D) +DECLARE_INSN(ld_bu, OP_LD_BU, MASK_LD_BU) +DECLARE_INSN(ld_hu, OP_LD_HU, MASK_LD_HU) +DECLARE_INSN(ld_wu, OP_LD_WU, MASK_LD_WU) +DECLARE_INSN(preld, OP_PRELD, MASK_PRELD) +DECLARE_INSN(ldx_b, OP_LDX_B, MASK_LDX_B) +DECLARE_INSN(ldx_h, OP_LDX_H, MASK_LDX_H) +DECLARE_INSN(ldx_w, OP_LDX_W, MASK_LDX_W) +DECLARE_INSN(ldx_d, OP_LDX_D, MASK_LDX_D) +DECLARE_INSN(stx_b, OP_STX_B, MASK_STX_B) +DECLARE_INSN(stx_h, OP_STX_H, MASK_STX_H) +DECLARE_INSN(stx_w, OP_STX_W, MASK_STX_W) +DECLARE_INSN(stx_d, OP_STX_D, MASK_STX_D) +DECLARE_INSN(ldx_bu, OP_LDX_BU, MASK_LDX_BU) +DECLARE_INSN(ldx_hu, OP_LDX_HU, MASK_LDX_HU) +DECLARE_INSN(ldx_wu, OP_LDX_WU, MASK_LDX_WU) +DECLARE_INSN(preldx, OP_PRELDX, MASK_PRELDX) +DECLARE_INSN(sc_q, OP_SC_Q, MASK_SC_Q) +DECLARE_INSN(llacq_w, OP_LLACQ_W, MASK_LLACQ_W) +DECLARE_INSN(screl_w, OP_SCREL_W, MASK_SCREL_W) +DECLARE_INSN(llacq_d, OP_LLACQ_D, MASK_LLACQ_D) +DECLARE_INSN(screl_d, OP_SCREL_D, MASK_LLACQ_D) +DECLARE_INSN(amcas_b, OP_AMCAS_B, MASK_AMCAS_B) +DECLARE_INSN(amcas_h, OP_AMCAS_H, MASK_AMCAS_H) +DECLARE_INSN(amcas_w, OP_AMCAS_W, MASK_AMCAS_W) +DECLARE_INSN(amcas_d, OP_AMCAS_D, MASK_AMCAS_D) +DECLARE_INSN(amcas_db_b, OP_AMCAS_DB_B, MASK_AMCAS_DB_B) +DECLARE_INSN(amcas_db_h, OP_AMCAS_DB_H, MASK_AMCAS_DB_H) +DECLARE_INSN(amcas_db_w, OP_AMCAS_DB_W, MASK_AMCAS_DB_W) +DECLARE_INSN(amcas_db_d, OP_AMCAS_DB_D, MASK_AMCAS_DB_D) +DECLARE_INSN(amswap_b, OP_AMSWAP_B, MASK_AMSWAP_B) +DECLARE_INSN(amswap_h, OP_AMSWAP_H, MASK_AMSWAP_H) +DECLARE_INSN(amadd_b, OP_AMADD_B, MASK_AMADD_B) +DECLARE_INSN(amadd_h, OP_AMADD_H, MASK_AMADD_H) +DECLARE_INSN(amswap_db_b, OP_AMSWAP_DB_B, MASK_AMSWAP_DB_B) +DECLARE_INSN(amswap_db_h, OP_AMSWAP_DB_H, MASK_AMSWAP_DB_H) +DECLARE_INSN(amadd_db_b, OP_AMADD_DB_B, MASK_AMADD_DB_B) +DECLARE_INSN(amadd_db_h, OP_AMADD_DB_H, MASK_AMADD_DB_H) +DECLARE_INSN(amswap_w, OP_AMSWAP_W, MASK_AMSWAP_W) +DECLARE_INSN(amswap_d, OP_AMSWAP_D, MASK_AMSWAP_D) +DECLARE_INSN(amadd_w, OP_AMADD_W, MASK_AMADD_W) +DECLARE_INSN(amadd_d, OP_AMADD_D, MASK_AMADD_D) +DECLARE_INSN(amand_w, OP_AMAND_W, MASK_AMAND_W) +DECLARE_INSN(amand_d, OP_AMAND_D, MASK_AMAND_D) +DECLARE_INSN(amor_w, OP_AMOR_W, MASK_AMOR_W) +DECLARE_INSN(amor_d, OP_AMOR_D, MASK_AMOR_D) +DECLARE_INSN(amxor_w, OP_AMXOR_W, MASK_AMXOR_W) +DECLARE_INSN(amxor_d, OP_AMXOR_D, MASK_AMXOR_D) +DECLARE_INSN(ammax_w, OP_AMMAX_W, MASK_AMMAX_W) +DECLARE_INSN(ammax_d, OP_AMMAX_D, MASK_AMMAX_D) +DECLARE_INSN(ammin_w, OP_AMMIN_W, MASK_AMMIN_W) +DECLARE_INSN(ammin_d, OP_AMMIN_D, MASK_AMMIN_D) +DECLARE_INSN(ammax_wu, OP_AMMAX_WU, MASK_AMMAX_WU) +DECLARE_INSN(ammax_du, OP_AMMAX_DU, MASK_AMMAX_DU) +DECLARE_INSN(ammin_wu, OP_AMMIN_WU, MASK_AMMIN_WU) +DECLARE_INSN(ammin_du, OP_AMMIN_DU, MASK_AMMIN_DU) +DECLARE_INSN(amswap_db_w, OP_AMSWAP_DB_W, MASK_AMSWAP_DB_W) +DECLARE_INSN(amswap_db_d, OP_AMSWAP_DB_D, MASK_AMSWAP_DB_D) +DECLARE_INSN(amadd_db_w, OP_AMADD_DB_W, MASK_AMADD_DB_W) +DECLARE_INSN(amadd_db_d, OP_AMADD_DB_D, MASK_AMADD_DB_D) +DECLARE_INSN(amand_db_w, OP_AMAND_DB_W, MASK_AMAND_DB_W) +DECLARE_INSN(amand_db_d, OP_AMAND_DB_D, MASK_AMAND_DB_D) +DECLARE_INSN(amor_db_w, OP_AMOR_DB_W, MASK_AMOR_DB_W) +DECLARE_INSN(amor_db_d, OP_AMOR_DB_D, MASK_AMOR_DB_D) +DECLARE_INSN(amxor_db_w, OP_AMXOR_DB_W, MASK_AMXOR_DB_W) +DECLARE_INSN(amxor_db_d, OP_AMXOR_DB_D, MASK_AMXOR_DB_D) +DECLARE_INSN(ammax_db_w, OP_AMMAX_DB_W, MASK_AMMAX_DB_W) +DECLARE_INSN(ammax_db_d, OP_AMMAX_DB_D, MASK_AMMAX_DB_D) +DECLARE_INSN(ammin_db_w, OP_AMMIN_DB_W, MASK_AMMIN_DB_W) +DECLARE_INSN(ammin_db_d, OP_AMMIN_DB_D, MASK_AMMIN_DB_D) +DECLARE_INSN(ammax_db_wu, OP_AMMAX_DB_WU, MASK_AMMAX_DB_WU) +DECLARE_INSN(ammax_db_du, OP_AMMAX_DB_DU, MASK_AMMAX_DB_DU) +DECLARE_INSN(ammin_db_wu, OP_AMMIN_DB_WU, MASK_AMMIN_DB_WU) +DECLARE_INSN(ammin_db_du, OP_AMMIN_DB_DU, MASK_AMMIN_DB_DU) +DECLARE_INSN(dbar, OP_DBAR, MASK_DBAR) +DECLARE_INSN(ibar, OP_IBAR, MASK_IBAR) +DECLARE_INSN(ldgt_b, OP_LDGT_B, MASK_LDGT_B) +DECLARE_INSN(ldgt_h, OP_LDGT_H, MASK_LDGT_H) +DECLARE_INSN(ldgt_w, OP_LDGT_W, MASK_LDGT_W) +DECLARE_INSN(ldgt_d, OP_LDGT_D, MASK_LDGT_D) +DECLARE_INSN(ldle_b, OP_LDLE_B, MASK_LDLE_B) +DECLARE_INSN(ldle_h, OP_LDLE_H, MASK_LDLE_H) +DECLARE_INSN(ldle_w, OP_LDLE_W, MASK_LDLE_W) +DECLARE_INSN(ldle_d, OP_LDLE_D, MASK_LDLE_D) +DECLARE_INSN(stgt_b, OP_STGT_B, MASK_STGT_B) +DECLARE_INSN(stgt_h, OP_STGT_H, MASK_STGT_H) +DECLARE_INSN(stgt_w, OP_STGT_W, MASK_STGT_W) +DECLARE_INSN(stgt_d, OP_STGT_D, MASK_STGT_D) +DECLARE_INSN(stle_b, OP_STLE_B, MASK_STLE_B) +DECLARE_INSN(stle_h, OP_STLE_H, MASK_STLE_H) +DECLARE_INSN(stle_w, OP_STLE_W, MASK_STLE_W) +DECLARE_INSN(stle_d, OP_STLE_D, MASK_STLE_D) +DECLARE_INSN(vld, OP_VLD, MASK_VLD) +DECLARE_INSN(vst, OP_VST, MASK_VST) +DECLARE_INSN(xvld, OP_XVLD, MASK_XVLD) +DECLARE_INSN(xvst, OP_XVST, MASK_XVST) + +/* loongarch single float load store instruction */ +DECLARE_INSN(fld_s, OP_FLD_S, MASK_FLD_S) +DECLARE_INSN(fst_s, OP_FST_S, MASK_FST_S) +DECLARE_INSN(fldx_s, OP_FLDX_S, MASK_FLDX_S) +DECLARE_INSN(fstx_s, OP_FSTX_S, MASK_FSTX_S) +DECLARE_INSN(fldgt_s, OP_FLDGT_S, MASK_FLDGT_S) +DECLARE_INSN(fldle_s, OP_FLDLE_S, MASK_FLDLE_S) +DECLARE_INSN(fstgt_s, OP_FSTGT_S, MASK_FSTGT_S) +DECLARE_INSN(fstle_s, OP_FSTLE_S, MASK_FSTLE_S) + +/* loongarch double float load store instruction */ +DECLARE_INSN(fld_d, OP_FLD_D, MASK_FLD_D) +DECLARE_INSN(fst_d, OP_FST_D, MASK_FST_D) +DECLARE_INSN(fldx_d, OP_FLDX_D, MASK_FLDX_D) +DECLARE_INSN(fstx_d, OP_FSTX_D, MASK_FSTX_D) +DECLARE_INSN(fldgt_d, OP_FLDGT_D, MASK_FLDGT_D) +DECLARE_INSN(fldle_d, OP_FLDLE_D, MASK_FLDLE_D) +DECLARE_INSN(fstgt_d, OP_FSTGT_D, MASK_FSTGT_D) +DECLARE_INSN(fstle_d, OP_FSTLE_D, MASK_FSTLE_D) + +/* loongarch float jmp instruction */ +DECLARE_INSN(bceqz, OP_BCEQZ, MASK_BCEQZ) +DECLARE_INSN(bcnez, OP_BCNEZ, MASK_BCNEZ) + +/* loongarch jmp instruction */ +DECLARE_INSN(beqz, OP_BEQZ, MASK_BEQZ) +DECLARE_INSN(bnez, OP_BNEZ, MASK_BNEZ) +DECLARE_INSN(jirl, OP_JIRL, MASK_JIRL) +DECLARE_INSN(b, OP_B, MASK_B) +DECLARE_INSN(bl, OP_BL, MASK_BL) +DECLARE_INSN(beq, OP_BEQ, MASK_BEQ) +DECLARE_INSN(bne, OP_BNE, MASK_BNE) +DECLARE_INSN(blt, OP_BLT, MASK_BLT) +DECLARE_INSN(bge, OP_BGE, MASK_BGE) +DECLARE_INSN(bltu, OP_BLTU, MASK_BLTU) +DECLARE_INSN(bgeu, OP_BGEU, MASK_BGEU) + +#undef DECLARE_INSN + +static inline bool +is_arithmetic_operation_insn (uint32_t insn) +{ + if (is_add_w_insn (insn)) + return true; + else if (is_add_d_insn (insn)) + return true; + else if (is_sub_w_insn (insn)) + return true; + else if (is_sub_d_insn (insn)) + return true; + else if (is_addi_w_insn (insn)) + return true; + else if (is_addi_d_insn (insn)) + return true; + else if (is_addu16i_d_insn (insn)) + return true; + else if (is_alsl_w_insn (insn)) + return true; + else if (is_alsl_wu_insn (insn)) + return true; + else if (is_alsl_d_insn (insn)) + return true; + else if (is_lu12i_w_insn (insn)) + return true; + else if (is_lu32i_d_insn (insn)) + return true; + else if (is_lu52i_d_insn (insn)) + return true; + else if (is_slt_insn (insn)) + return true; + else if (is_sltu_insn (insn)) + return true; + else if (is_slti_insn (insn)) + return true; + else if (is_sltui_insn (insn)) + return true; + else if (is_pcaddi_insn (insn)) + return true; + else if (is_pcaddu12i_insn (insn)) + return true; + else if (is_pcaddu18i_insn (insn)) + return true; + else if (is_pcalau12i_insn (insn)) + return true; + else if (is_and_insn (insn)) + return true; + else if (is_or_insn (insn)) + return true; + else if (is_nor_insn (insn)) + return true; + else if (is_xor_insn (insn)) + return true; + else if (is_andn_insn (insn)) + return true; + else if (is_orn_insn (insn)) + return true; + else if (is_andi_insn (insn)) + return true; + else if (is_ori_insn (insn)) + return true; + else if (is_xori_insn (insn)) + return true; + else if (is_mul_w_insn (insn)) + return true; + else if (is_mul_d_insn (insn)) + return true; + else if (is_mulh_w_insn (insn)) + return true; + else if (is_mulh_wu_insn (insn)) + return true; + else if (is_mulh_d_insn (insn)) + return true; + else if (is_mulh_du_insn (insn)) + return true; + else if (is_mulw_d_w_insn (insn)) + return true; + else if (is_mulw_d_wu_insn (insn)) + return true; + else if (is_div_w_insn (insn)) + return true; + else if (is_div_wu_insn (insn)) + return true; + else if (is_div_d_insn (insn)) + return true; + else if (is_div_du_insn (insn)) + return true; + else if (is_mod_w_insn (insn)) + return true; + else if (is_mod_wu_insn (insn)) + return true; + else if (is_mod_d_insn (insn)) + return true; + else if (is_mod_du_insn (insn)) + return true; + else + return false; +} + +static inline bool +is_bit_shift_insn (uint32_t insn) +{ + if (is_sll_w_insn (insn)) + return true; + else if (is_srl_w_insn (insn)) + return true; + else if (is_sra_w_insn (insn)) + return true; + else if (is_rotr_w_insn (insn)) + return true; + else if (is_slli_w_insn (insn)) + return true; + else if (is_srli_w_insn (insn)) + return true; + else if (is_srai_w_insn (insn)) + return true; + else if (is_rotri_w_insn (insn)) + return true; + else if (is_slli_d_insn (insn)) + return true; + else if (is_srli_d_insn (insn)) + return true; + else if (is_srai_d_insn (insn)) + return true; + else if (is_rotri_d_insn (insn)) + return true; + else if (is_sll_d_insn (insn)) + return true; + else if (is_srl_d_insn (insn)) + return true; + else if (is_sra_d_insn (insn)) + return true; + else if (is_rotr_d_insn (insn)) + return true; + else + return false; +} + +static inline bool +is_bit_manipulation_insn (uint32_t insn) +{ + if (is_clo_w_insn (insn)) + return true; + else if (is_clz_w_insn (insn)) + return true; + else if (is_cto_w_insn (insn)) + return true; + else if (is_ctz_w_insn (insn)) + return true; + else if (is_clo_d_insn (insn)) + return true; + else if (is_clz_d_insn (insn)) + return true; + else if (is_cto_d_insn (insn)) + return true; + else if (is_ctz_d_insn (insn)) + return true; + else if (is_ext_w_h_insn (insn)) + return true; + else if (is_ext_w_b_insn (insn)) + return true; + else if (is_bytepick_w_insn (insn)) + return true; + else if (is_bytepick_d_insn (insn)) + return true; + else if (is_revb_2h_insn (insn)) + return true; + else if (is_revb_4h_insn (insn)) + return true; + else if (is_revb_2w_insn (insn)) + return true; + else if (is_revb_d_insn (insn)) + return true; + else if (is_revh_2w_insn (insn)) + return true; + else if (is_revh_d_insn (insn)) + return true; + else if (is_bitrev_4b_insn (insn)) + return true; + else if (is_bitrev_8b_insn (insn)) + return true; + else if (is_bitrev_w_insn (insn)) + return true; + else if (is_bitrev_d_insn (insn)) + return true; + else if (is_bstrins_w_insn (insn)) + return true; + else if (is_bstrpick_w_insn (insn)) + return true; + else if (is_bstrins_d_insn (insn)) + return true; + else if (is_bstrpick_d_insn (insn)) + return true; + else if (is_maskeqz_insn (insn)) + return true; + else if (is_masknez_insn (insn)) + return true; + else + return false; +} + +static inline bool +is_load_insn (uint32_t insn) +{ + if (is_ld_b_insn (insn)) + return true; + else if (is_ld_h_insn (insn)) + return true; + else if (is_ld_w_insn (insn)) + return true; + else if (is_ld_d_insn (insn)) + return true; + else if (is_ld_bu_insn (insn)) + return true; + else if (is_ld_hu_insn (insn)) + return true; + else if (is_ld_wu_insn (insn)) + return true; + else if (is_ldx_b_insn (insn)) + return true; + else if (is_ldx_h_insn (insn)) + return true; + else if (is_ldx_w_insn (insn)) + return true; + else if (is_ldx_d_insn (insn)) + return true; + else if (is_ldx_bu_insn (insn)) + return true; + else if (is_ldx_hu_insn (insn)) + return true; + else if (is_ldx_wu_insn (insn)) + return true; + else if (is_ldptr_w_insn (insn)) + return true; + else if (is_ldptr_d_insn (insn)) + return true; + else if (is_ll_w_insn (insn)) + return true; + else if (is_ll_d_insn (insn)) + return true; + else if (is_llacq_w_insn (insn)) + return true; + else if (is_llacq_d_insn (insn)) + return true; + else if (is_vld_insn (insn)) + return true; + else if (is_xvld_insn (insn)) + return true; + else + return false; +} + +static inline bool +is_crc_check_insn (uint32_t insn) +{ + if (is_crc_w_b_w_insn (insn)) + return true; + else if (is_crc_w_h_w_insn (insn)) + return true; + else if (is_crc_w_w_w_insn (insn)) + return true; + else if (is_crc_w_d_w_insn (insn)) + return true; + else if (is_crcc_w_b_w_insn (insn)) + return true; + else if (is_crcc_w_h_w_insn (insn)) + return true; + else if (is_crcc_w_w_w_insn (insn)) + return true; + else if (is_crcc_w_d_w_insn (insn)) + return true; + else + return false; +} + +static inline bool +is_fr_to_gr_insn (uint32_t insn) +{ + if (is_movfr2gr_s_insn (insn)) + return true; + else if (is_movfr2gr_d_insn (insn)) + return true; + else if (is_movfrh2gr_s_insn (insn)) + return true; + else if (is_movfcsr2gr_insn (insn)) + return true; + else if (is_movcf2gr_insn (insn)) + return true; + else + return false; +} + +static inline bool +is_data_process_insn (uint32_t insn) +{ + if (is_arithmetic_operation_insn (insn)) + return true; + else if (is_bit_shift_insn (insn)) + return true; + else if (is_bit_manipulation_insn (insn)) + return true; + else if (is_load_insn (insn)) + return true; + else if (is_crc_check_insn (insn)) + return true; + else if (is_fr_to_gr_insn (insn)) + return true; + else if (is_cpucfg_insn (insn)) + return true; + else if (is_lddir_insn (insn)) + return true; + else + return false; +} + +static inline bool +is_read_time_insn (uint32_t insn) +{ + if (is_rdtimel_w_insn (insn)) + return true; + else if (is_rdtimeh_w_insn (insn)) + return true; + else if (is_rdtime_d_insn (insn)) + return true; + else + return false; +} + +static inline bool +is_float_arithmetic_operation_insn (uint32_t insn) +{ + if (is_fadd_s_insn (insn)) + return true; + else if (is_fsub_s_insn (insn)) + return true; + else if (is_fmul_s_insn (insn)) + return true; + else if (is_fdiv_s_insn (insn)) + return true; + else if (is_fadd_d_insn (insn)) + return true; + else if (is_fsub_d_insn (insn)) + return true; + else if (is_fmul_d_insn (insn)) + return true; + else if (is_fdiv_d_insn (insn)) + return true; + else if (is_fmadd_s_insn (insn)) + return true; + else if (is_fmsub_s_insn (insn)) + return true; + else if (is_fnmadd_s_insn (insn)) + return true; + else if (is_fnmsub_s_insn (insn)) + return true; + else if (is_fmadd_d_insn (insn)) + return true; + else if (is_fmsub_d_insn (insn)) + return true; + else if (is_fnmadd_d_insn (insn)) + return true; + else if (is_fnmsub_d_insn (insn)) + return true; + else if (is_fmax_s_insn (insn)) + return true; + else if (is_fmin_s_insn (insn)) + return true; + else if (is_fmax_d_insn (insn)) + return true; + else if (is_fmin_d_insn (insn)) + return true; + else if (is_fmaxa_s_insn (insn)) + return true; + else if (is_fmina_s_insn (insn)) + return true; + else if (is_fmaxa_d_insn (insn)) + return true; + else if (is_fmina_d_insn (insn)) + return true; + else if (is_fabs_s_insn (insn)) + return true; + else if (is_fneg_s_insn (insn)) + return true; + else if (is_fabs_d_insn (insn)) + return true; + else if (is_fneg_d_insn (insn)) + return true; + else if (is_fsqrt_s_insn (insn)) + return true; + else if (is_frecip_s_insn (insn)) + return true; + else if (is_frsqrt_s_insn (insn)) + return true; + else if (is_fsqrt_d_insn (insn)) + return true; + else if (is_frecip_d_insn (insn)) + return true; + else if (is_frsqrt_d_insn (insn)) + return true; + else if (is_fscaleb_s_insn (insn)) + return true; + else if (is_flogb_s_insn (insn)) + return true; + else if (is_fcopysign_s_insn (insn)) + return true; + else if (is_fscaleb_d_insn (insn)) + return true; + else if (is_flogb_d_insn (insn)) + return true; + else if (is_fcopysign_d_insn (insn)) + return true; + else if (is_fclass_s_insn (insn)) + return true; + else if (is_fclass_d_insn (insn)) + return true; + else if (is_frecipe_s_insn (insn)) + return true; + else if (is_frsqrte_s_insn (insn)) + return true; + else if (is_frecipe_d_insn (insn)) + return true; + else if (is_frsqrte_d_insn (insn)) + return true; + else + return false; +} + +static inline bool +is_float_comparison_insn (uint32_t insn) +{ + if (is_fcmp_caf_s_insn (insn)) + return true; + else if (is_fcmp_cun_s_insn (insn)) + return true; + else if (is_fcmp_ceq_s_insn (insn)) + return true; + else if (is_fcmp_cueq_s_insn (insn)) + return true; + else if (is_fcmp_clt_s_insn (insn)) + return true; + else if (is_fcmp_cult_s_insn (insn)) + return true; + else if (is_fcmp_cle_s_insn (insn)) + return true; + else if (is_fcmp_cule_s_insn (insn)) + return true; + else if (is_fcmp_cne_s_insn (insn)) + return true; + else if (is_fcmp_cor_s_insn (insn)) + return true; + else if (is_fcmp_cune_s_insn (insn)) + return true; + else if (is_fcmp_saf_s_insn (insn)) + return true; + else if (is_fcmp_sun_s_insn (insn)) + return true; + else if (is_fcmp_seq_s_insn (insn)) + return true; + else if (is_fcmp_sueq_s_insn (insn)) + return true; + else if (is_fcmp_slt_s_insn (insn)) + return true; + else if (is_fcmp_sult_s_insn (insn)) + return true; + else if (is_fcmp_sle_s_insn (insn)) + return true; + else if (is_fcmp_sule_s_insn (insn)) + return true; + else if (is_fcmp_sne_s_insn (insn)) + return true; + else if (is_fcmp_sor_s_insn (insn)) + return true; + else if (is_fcmp_sune_s_insn (insn)) + return true; + else if (is_fcmp_sgt_s_insn (insn)) + return true; + else if (is_fcmp_sge_s_insn (insn)) + return true; + else if (is_fcmp_cugt_s_insn (insn)) + return true; + else if (is_fcmp_cuge_s_insn (insn)) + return true; + else if (is_fcmp_caf_d_insn (insn)) + return true; + else if (is_fcmp_cun_d_insn (insn)) + return true; + else if (is_fcmp_ceq_d_insn (insn)) + return true; + else if (is_fcmp_cueq_d_insn (insn)) + return true; + else if (is_fcmp_clt_d_insn (insn)) + return true; + else if (is_fcmp_cult_d_insn (insn)) + return true; + else if (is_fcmp_cle_d_insn (insn)) + return true; + else if (is_fcmp_cule_d_insn (insn)) + return true; + else if (is_fcmp_cne_d_insn (insn)) + return true; + else if (is_fcmp_cor_d_insn (insn)) + return true; + else if (is_fcmp_cune_d_insn (insn)) + return true; + else if (is_fcmp_saf_d_insn (insn)) + return true; + else if (is_fcmp_sun_d_insn (insn)) + return true; + else if (is_fcmp_seq_d_insn (insn)) + return true; + else if (is_fcmp_sueq_d_insn (insn)) + return true; + else if (is_fcmp_slt_d_insn (insn)) + return true; + else if (is_fcmp_sult_d_insn (insn)) + return true; + else if (is_fcmp_sle_d_insn (insn)) + return true; + else if (is_fcmp_sule_d_insn (insn)) + return true; + else if (is_fcmp_sne_d_insn (insn)) + return true; + else if (is_fcmp_sor_d_insn (insn)) + return true; + else if (is_fcmp_sune_d_insn (insn)) + return true; + else if (is_fcmp_sgt_d_insn (insn)) + return true; + else if (is_fcmp_sge_d_insn (insn)) + return true; + else if (is_fcmp_cugt_d_insn (insn)) + return true; + else if (is_fcmp_cuge_d_insn (insn)) + return true; + else + return false; +} + +static inline bool +is_float_conversion_insn (uint32_t insn) +{ + if (is_fcvt_s_d_insn (insn)) + return true; + else if (is_fcvt_d_s_insn (insn)) + return true; + else if (is_ffint_s_w_insn (insn)) + return true; + else if (is_ffint_s_l_insn (insn)) + return true; + else if (is_ffint_d_w_insn (insn)) + return true; + else if (is_ffint_d_l_insn (insn)) + return true; + else if (is_ftint_w_s_insn (insn)) + return true; + else if (is_ftint_l_s_insn (insn)) + return true; + else if (is_ftint_w_d_insn (insn)) + return true; + else if (is_ftint_l_d_insn (insn)) + return true; + else if (is_ftintrm_w_s_insn (insn)) + return true; + else if (is_ftintrm_l_s_insn (insn)) + return true; + else if (is_ftintrp_w_s_insn (insn)) + return true; + else if (is_ftintrp_l_s_insn (insn)) + return true; + else if (is_ftintrz_w_s_insn (insn)) + return true; + else if (is_ftintrz_l_s_insn (insn)) + return true; + else if (is_ftintrne_w_s_insn (insn)) + return true; + else if (is_ftintrne_l_s_insn (insn)) + return true; + else if (is_ftintrm_w_d_insn (insn)) + return true; + else if (is_ftintrm_l_d_insn (insn)) + return true; + else if (is_ftintrp_w_d_insn (insn)) + return true; + else if (is_ftintrp_l_d_insn (insn)) + return true; + else if (is_ftintrz_w_d_insn (insn)) + return true; + else if (is_ftintrz_l_d_insn (insn)) + return true; + else if (is_ftintrne_w_d_insn (insn)) + return true; + else if (is_ftintrne_l_d_insn (insn)) + return true; + else if (is_frint_s_insn (insn)) + return true; + else if (is_frint_d_insn (insn)) + return true; + else + return false; +} + +static inline bool +is_float_mov_insn (uint32_t insn) +{ + if (is_fmov_s_insn (insn)) + return true; + else if (is_fmov_d_insn (insn)) + return true; + else if (is_fsel_insn (insn)) + return true; + else if (is_movgr2fr_w_insn (insn)) + return true; + else if (is_movgr2fr_d_insn (insn)) + return true; + else if (is_movgr2frh_w_insn (insn)) + return true; + else if (is_movgr2fcsr_insn (insn)) + return true; + else if (is_movfr2cf_insn (insn)) + return true; + else if (is_movcf2fr_insn (insn)) + return true; + else if (is_movgr2cf_insn (insn)) + return true; + else + return false; +} + +static inline bool +is_float_ld_insn (uint32_t insn) +{ + if (is_fld_s_insn (insn)) + return true; + else if (is_fld_d_insn (insn)) + return true; + else if (is_fldx_s_insn (insn)) + return true; + else if (is_fldx_d_insn (insn)) + return true; + else + return false; +} + +static inline bool +is_mov2cf_insn (uint32_t insn) +{ + if (is_movfr2cf_insn (insn)) + return true; + else if (is_movgr2cf_insn (insn)) + return true; + else if (is_float_comparison_insn (insn)) + return true; + else + return false; +} + +static inline bool +is_float_insn (uint32_t insn) +{ + if (is_float_arithmetic_operation_insn (insn)) + return true; + else if (is_float_conversion_insn (insn)) + return true; + else if (is_float_mov_insn (insn)) + return true; + else if (is_float_ld_insn (insn)) + return true; + else + return false; +} + +static inline bool +is_store_insn (uint32_t insn) +{ + if (is_st_b_insn (insn)) + return true; + else if (is_st_h_insn (insn)) + return true; + else if (is_st_w_insn (insn)) + return true; + else if (is_st_d_insn (insn)) + return true; + else if (is_stx_b_insn (insn)) + return true; + else if (is_stx_h_insn (insn)) + return true; + else if (is_stx_w_insn (insn)) + return true; + else if (is_stx_d_insn (insn)) + return true; + else if (is_stptr_w_insn (insn)) + return true; + else if (is_stptr_d_insn (insn)) + return true; + else if (is_sc_w_insn (insn)) + return true; + else if (is_sc_d_insn (insn)) + return true; + else if (is_sc_q_insn (insn)) + return true; + else if (is_screl_w_insn (insn)) + return true; + else if (is_screl_d_insn (insn)) + return true; + else if (is_fst_s_insn (insn)) + return true; + else if (is_fst_d_insn (insn)) + return true; + else if (is_fstx_s_insn (insn)) + return true; + else if (is_fstx_d_insn (insn)) + return true; + else if (is_vst_insn (insn)) + return true; + else if (is_xvst_insn (insn)) + return true; + else + return false; +} + +static inline bool +is_atomic_access_insn (uint32_t insn) +{ + if (is_amswap_w_insn (insn)) + return true; + else if (is_amswap_d_insn (insn)) + return true; + else if (is_amswap_db_w_insn (insn)) + return true; + else if (is_amswap_db_d_insn (insn)) + return true; + else if (is_amadd_w_insn (insn)) + return true; + else if (is_amadd_d_insn (insn)) + return true; + else if (is_amadd_db_w_insn (insn)) + return true; + else if (is_amadd_db_d_insn (insn)) + return true; + else if (is_amand_w_insn (insn)) + return true; + else if (is_amand_d_insn (insn)) + return true; + else if (is_amand_db_w_insn (insn)) + return true; + else if (is_amand_db_d_insn (insn)) + return true; + else if (is_amor_w_insn (insn)) + return true; + else if (is_amor_d_insn (insn)) + return true; + else if (is_amor_db_w_insn (insn)) + return true; + else if (is_amor_db_d_insn (insn)) + return true; + else if (is_amxor_w_insn (insn)) + return true; + else if (is_amxor_d_insn (insn)) + return true; + else if (is_amxor_db_w_insn (insn)) + return true; + else if (is_amxor_db_d_insn (insn)) + return true; + else if (is_ammax_w_insn (insn)) + return true; + else if (is_ammax_d_insn (insn)) + return true; + else if (is_ammax_db_w_insn (insn)) + return true; + else if (is_ammax_db_d_insn (insn)) + return true; + else if (is_ammin_w_insn (insn)) + return true; + else if (is_ammin_d_insn (insn)) + return true; + else if (is_ammin_db_w_insn (insn)) + return true; + else if (is_ammin_db_d_insn (insn)) + return true; + else if (is_ammax_wu_insn (insn)) + return true; + else if (is_ammax_du_insn (insn)) + return true; + else if (is_ammax_db_du_insn (insn)) + return true; + else if (is_ammin_db_wu_insn (insn)) + return true; + else if (is_ammin_wu_insn (insn)) + return true; + else if (is_ammin_du_insn (insn)) + return true; + else if (is_ammin_db_wu_insn (insn)) + return true; + else if (is_ammin_db_du_insn (insn)) + return true; + else if (is_amswap_b_insn (insn)) + return true; + else if (is_amswap_h_insn (insn)) + return true; + else if (is_amswap_db_b_insn (insn)) + return true; + else if (is_amswap_db_h_insn (insn)) + return true; + else if (is_amadd_b_insn (insn)) + return true; + else if (is_amadd_h_insn (insn)) + return true; + else if (is_amadd_db_b_insn (insn)) + return true; + else if (is_amadd_db_h_insn (insn)) + return true; + else if (is_amcas_b_insn (insn)) + return true; + else if (is_amcas_h_insn (insn)) + return true; + else if (is_amcas_w_insn (insn)) + return true; + else if (is_amcas_d_insn (insn)) + return true; + else if (is_amcas_db_b_insn (insn)) + return true; + else if (is_amcas_db_h_insn (insn)) + return true; + else if (is_amcas_db_w_insn (insn)) + return true; + else if (is_amcas_db_d_insn (insn)) + return true; + else + return false; +} + +static inline bool +is_basic_am_w_d_insn (uint32_t insn) +{ + if (is_amswap_w_insn (insn)) + return true; + else if (is_amswap_d_insn (insn)) + return true; + else if (is_amswap_db_w_insn (insn)) + return true; + else if (is_amswap_db_d_insn (insn)) + return true; + else if (is_amadd_w_insn (insn)) + return true; + else if (is_amadd_d_insn (insn)) + return true; + else if (is_amadd_db_w_insn (insn)) + return true; + else if (is_amadd_db_d_insn (insn)) + return true; + else if (is_amand_w_insn (insn)) + return true; + else if (is_amand_d_insn (insn)) + return true; + else if (is_amand_db_w_insn (insn)) + return true; + else if (is_amand_db_d_insn (insn)) + return true; + else if (is_amor_w_insn (insn)) + return true; + else if (is_amor_d_insn (insn)) + return true; + else if (is_amor_db_w_insn (insn)) + return true; + else if (is_amor_db_d_insn (insn)) + return true; + else if (is_amxor_w_insn (insn)) + return true; + else if (is_amxor_d_insn (insn)) + return true; + else if (is_amxor_db_w_insn (insn)) + return true; + else if (is_amxor_db_d_insn (insn)) + return true; + else if (is_ammax_w_insn (insn)) + return true; + else if (is_ammax_d_insn (insn)) + return true; + else if (is_ammax_db_w_insn (insn)) + return true; + else if (is_ammax_db_d_insn (insn)) + return true; + else if (is_ammin_w_insn (insn)) + return true; + else if (is_ammin_d_insn (insn)) + return true; + else if (is_ammin_db_w_insn (insn)) + return true; + else if (is_ammin_db_d_insn (insn)) + return true; + else if (is_ammax_wu_insn (insn)) + return true; + else if (is_ammax_du_insn (insn)) + return true; + else if (is_ammax_db_du_insn (insn)) + return true; + else if (is_ammin_db_wu_insn (insn)) + return true; + else if (is_ammin_wu_insn (insn)) + return true; + else if (is_ammin_du_insn (insn)) + return true; + else if (is_ammin_db_wu_insn (insn)) + return true; + else if (is_ammin_db_du_insn (insn)) + return true; + else + return false; +} + +static inline bool +is_am_b_h_insn (uint32_t insn) +{ + if (is_amswap_b_insn (insn)) + return true; + else if (is_amswap_h_insn (insn)) + return true; + else if (is_amswap_db_b_insn (insn)) + return true; + else if (is_amswap_db_h_insn (insn)) + return true; + else if (is_amadd_b_insn (insn)) + return true; + else if (is_amadd_h_insn (insn)) + return true; + else if (is_amadd_db_b_insn (insn)) + return true; + else if (is_amadd_db_h_insn (insn)) + return true; + else + return false; +} + +static inline bool +is_amswap_insn (uint32_t insn) +{ + if (is_amswap_w_insn (insn)) + return true; + else if (is_amswap_d_insn (insn)) + return true; + else if (is_amswap_db_w_insn (insn)) + return true; + else if (is_amswap_db_d_insn (insn)) + return true; + else if (is_amswap_b_insn (insn)) + return true; + else if (is_amswap_h_insn (insn)) + return true; + else if (is_amswap_db_b_insn (insn)) + return true; + else if (is_amswap_db_h_insn (insn)) + return true; + else + return false; +} + +static inline bool +is_amcas_insn (uint32_t insn) +{ + if (is_amcas_b_insn (insn)) + return true; + else if (is_amcas_h_insn (insn)) + return true; + else if (is_amcas_w_insn (insn)) + return true; + else if (is_amcas_d_insn (insn)) + return true; + else if (is_amcas_db_b_insn (insn)) + return true; + else if (is_amcas_db_h_insn (insn)) + return true; + else if (is_amcas_db_w_insn (insn)) + return true; + else if (is_amcas_db_d_insn (insn)) + return true; + else + return false; +} + +static inline bool +is_bound_check_load_insn (uint32_t insn) +{ + if (is_ldgt_b_insn (insn)) + return true; + else if (is_ldgt_h_insn (insn)) + return true; + else if (is_ldgt_w_insn (insn)) + return true; + else if (is_ldgt_d_insn (insn)) + return true; + else if (is_ldle_b_insn (insn)) + return true; + else if (is_ldle_h_insn (insn)) + return true; + else if (is_ldle_w_insn (insn)) + return true; + else if (is_ldle_d_insn (insn)) + return true; + else if (is_fldgt_s_insn (insn)) + return true; + else if (is_fldle_s_insn (insn)) + return true; + else if (is_fldgt_d_insn (insn)) + return true; + else if (is_fldle_d_insn (insn)) + return true; + else + return false; +} + +static inline bool +is_bound_check_store_insn (uint32_t insn) +{ + if (is_stgt_b_insn (insn)) + return true; + else if (is_stgt_h_insn (insn)) + return true; + else if (is_stgt_w_insn (insn)) + return true; + else if (is_stgt_d_insn (insn)) + return true; + else if (is_stle_b_insn (insn)) + return true; + else if (is_stle_h_insn (insn)) + return true; + else if (is_stle_w_insn (insn)) + return true; + else if (is_stle_d_insn (insn)) + return true; + else if (is_fstgt_s_insn (insn)) + return true; + else if (is_fstle_s_insn (insn)) + return true; + else if (is_fstgt_d_insn (insn)) + return true; + else if (is_fstle_d_insn (insn)) + return true; + else + return false; +} + +static inline bool +is_ldgt_insn (uint32_t insn) +{ + if (is_ldgt_b_insn (insn)) + return true; + else if (is_ldgt_h_insn (insn)) + return true; + else if (is_ldgt_w_insn (insn)) + return true; + else if (is_ldgt_d_insn (insn)) + return true; + else + return false; +} + +static inline bool +is_ldle_insn (uint32_t insn) +{ + if (is_ldle_b_insn (insn)) + return true; + else if (is_ldle_h_insn (insn)) + return true; + else if (is_ldle_w_insn (insn)) + return true; + else if (is_ldle_d_insn (insn)) + return true; + else + return false; +} + +static inline bool +is_fldgt_insn (uint32_t insn) +{ + if (is_fldgt_s_insn (insn)) + return true; + else if (is_fldgt_d_insn (insn)) + return true; + else + return false; +} + +static inline bool +is_fldle_insn (uint32_t insn) +{ + if (is_fldle_s_insn (insn)) + return true; + else if (is_fldle_d_insn (insn)) + return true; + else + return false; +} + +static inline bool +is_stgt_insn (uint32_t insn) +{ + if (is_stgt_b_insn (insn)) + return true; + else if (is_stgt_h_insn (insn)) + return true; + else if (is_stgt_w_insn (insn)) + return true; + else if (is_stgt_d_insn (insn)) + return true; + else + return false; +} + +static inline bool +is_stle_insn (uint32_t insn) +{ + if (is_stle_b_insn (insn)) + return true; + else if (is_stle_h_insn (insn)) + return true; + else if (is_stle_w_insn (insn)) + return true; + else if (is_stle_d_insn (insn)) + return true; + else + return false; +} + +static inline bool +is_fstgt_insn (uint32_t insn) +{ + if (is_fstgt_s_insn (insn)) + return true; + else if (is_fstgt_d_insn (insn)) + return true; + else + return false; +} + +static inline bool +is_fstle_insn (uint32_t insn) +{ + if (is_fstle_s_insn (insn)) + return true; + else if (is_fstle_d_insn (insn)) + return true; + else + return false; +} + +static inline bool +is_branch_insn (uint32_t insn) +{ + if (is_beqz_insn (insn)) + return true; + else if (is_bnez_insn (insn)) + return true; + else if (is_jirl_insn (insn)) + return true; + else if (is_b_insn (insn)) + return true; + else if (is_bl_insn (insn)) + return true; + else if (is_beq_insn (insn)) + return true; + else if (is_bne_insn (insn)) + return true; + else if (is_blt_insn (insn)) + return true; + else if (is_bge_insn (insn)) + return true; + else if (is_bltu_insn (insn)) + return true; + else if (is_bgeu_insn (insn)) + return true; + else if (is_bceqz_insn (insn)) + return true; + else if (is_bcnez_insn (insn)) + return true; + else + return false; +} + +static inline bool +is_special_insn (uint32_t insn) +{ + if (is_cacop_insn (insn)) + return true; + else if (is_tlbsrch_insn (insn)) + return true; + else if (is_tlbrd_insn (insn)) + return true; + else if (is_tlbwr_insn (insn)) + return true; + else if (is_tlbfill_insn (insn)) + return true; + else if (is_tlbclr_insn (insn)) + return true; + else if (is_tlbflush_insn (insn)) + return true; + else if (is_invtlb_insn (insn)) + return true; + else if (is_ldpte_insn (insn)) + return true; + else if (is_ertn_insn (insn)) + return true; + else if (is_idle_insn (insn)) + return true; + else if (is_dbcl_insn (insn)) + return true; + else if (is_preld_insn (insn)) + return true; + else if (is_preldx_insn (insn)) + return true; + else if (is_dbar_insn (insn)) + return true; + else if (is_ibar_insn (insn)) + return true; + else + return false; +} + +#endif /* ARCH_LOONGARCH_INSN_H */ From patchwork Fri Nov 22 09:06:22 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hui Li X-Patchwork-Id: 101726 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id CD321385702B for ; Fri, 22 Nov 2024 09:07:29 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org CD321385702B X-Original-To: gdb-patches@sourceware.org Delivered-To: gdb-patches@sourceware.org Received: from mail.loongson.cn (mail.loongson.cn [114.242.206.163]) by sourceware.org (Postfix) with ESMTP id 61CB63857C6E for ; Fri, 22 Nov 2024 09:06:31 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 61CB63857C6E Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=loongson.cn Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=loongson.cn ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 61CB63857C6E Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=114.242.206.163 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1732266392; cv=none; b=Sb776tYB49mvzGbGPt5L0eBp7+A1tENsBnMfrX8s3aTWQrjxnekzq2UCKL2M6HpD4ZdrdHATl5fCnMFklc6NzNpxCIo1cRFhCpYtY8D9hmRJCti7RIvY8cJ12BmQN8adQAaWQCGPJHl5xl6h0jqvbMCbs1YbgFCTNMW3xCegbKs= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1732266392; c=relaxed/simple; bh=QxI9D2+GMAZHM5yJTsiejb3sFjQROdj/oKWz1L4O+KI=; h=From:To:Subject:Date:Message-Id:MIME-Version; b=k8jXTLLCZoI6g4N+Q6m5hW7GvFBgEgQvXGeJc2C3gWpeGESQXIxZXi5/ILYkWOmLQeIOxik27sMx5kZkhZdpuWp9wmMap5fTStSZPyTq+LPVObbvR4P+RO+aFhhAZORL4EWr44Dn4NO7+4RkgpyC+/KbJ8CUSi0CB7qdKaZ34t0= ARC-Authentication-Results: i=1; server2.sourceware.org DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 61CB63857C6E Received: from loongson.cn (unknown [113.200.148.30]) by gateway (Coremail) with SMTP id _____8AxquCVSUBnuO9FAA--.6058S3; Fri, 22 Nov 2024 17:06:29 +0800 (CST) Received: from localhost.localdomain (unknown [113.200.148.30]) by front1 (Coremail) with SMTP id qMiowMAxFMCRSUBn8ORiAA--.35644S4; Fri, 22 Nov 2024 17:06:29 +0800 (CST) From: Hui Li To: gdb-patches@sourceware.org Cc: Tiezhu Yang Subject: [PATCH v2 2/4] gdb: LoongArch: Add basic process record/replay support Date: Fri, 22 Nov 2024 17:06:22 +0800 Message-Id: <20241122090624.2355-3-lihui@loongson.cn> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20241122090624.2355-1-lihui@loongson.cn> References: <20241122090624.2355-1-lihui@loongson.cn> MIME-Version: 1.0 X-CM-TRANSID: qMiowMAxFMCRSUBn8ORiAA--.35644S4 X-CM-SenderInfo: 5olk3xo6or00hjvr0hdfq/ X-Coremail-Antispam: 1Uk129KBj9fXoW3CF1UXFW3Cw4fKr47tF4xAFc_yoW8CF4kKo WSkFWUur48Gw1j9F1YqFn5XrWYqF1rCrW5A347Zw1YkayFkr1UXry5Ww45t3yxXwsrX3y0 ka48KF9aqFW7Jr97l-sFpf9Il3svdjkaLaAFLSUrUUUUUb8apTn2vfkv8UJUUUU8wcxFpf 9Il3svdxBIdaVrn0xqx4xG64xvF2IEw4CE5I8CrVC2j2Jv73VFW2AGmfu7bjvjm3AaLaJ3 UjIYCTnIWjp_UUUY87kC6x804xWl14x267AKxVWUJVW8JwAFc2x0x2IEx4CE42xK8VAvwI 8IcIk0rVWrJVCq3wAFIxvE14AKwVWUGVWUXwA2ocxC64kIII0Yj41l84x0c7CEw4AK67xG Y2AK021l84ACjcxK6xIIjxv20xvE14v26r1I6r4UM28EF7xvwVC0I7IYx2IY6xkF7I0E14 v26r1j6r4UM28EF7xvwVC2z280aVAFwI0_Gr1j6F4UJwA2z4x0Y4vEx4A2jsIEc7CjxVAF wI0_Gr1j6F4UJwAS0I0E0xvYzxvE52x082IY62kv0487Mc804VCY07AIYIkI8VC2zVCFFI 0UMc02F40EFcxC0VAKzVAqx4xG6I80ewAv7VC0I7IYx2IY67AKxVWUXVWUAwAv7VC2z280 aVAFwI0_Cr0_Gr1UMcvjeVCFs4IE7xkEbVWUJVW8JwACjcxG0xvY0x0EwIxGrwCF04k20x vY0x0EwIxGrwCFx2IqxVCFs4IE7xkEbVWUJVW8JwC20s026c02F40E14v26r1j6r18MI8I 3I0E7480Y4vE14v26r106r1rMI8E67AF67kF1VAFwI0_Jrv_JF1lIxkGc2Ij64vIr41lIx AIcVC0I7IYx2IY67AKxVWUJVWUCwCI42IY6xIIjxv20xvEc7CjxVAFwI0_Jr0_Gr1lIxAI cVCF04k26cxKx2IYs7xG6r1j6r1xMIIF0xvEx4A2jsIE14v26r1j6r4UMIIF0xvEx4A2js IEc7CjxVAFwI0_Jr0_GrUvcSsGvfC2KfnxnUUI43ZEXa7IU1pVbDUUUUU== X-Spam-Status: No, score=-12.2 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, KAM_SHORT, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gdb-patches-bounces~patchwork=sourceware.org@sourceware.org GDB provides a special process record and replay target that can record a log of the process execution, and replay it later with both forward and reverse execution commands. This patch adds the basic support of process record and replay on LoongArch, it allows users to debug basic LoongArch instructions and provides reverse debugging support. Here is a simple example on LoongArch: $ cat test.c int a = 0; int main() { a = 1; a = 2; return 0; } $ gdb test ... (gdb) start ... Temporary breakpoint 1, main () at test.c:4 4 a = 1; (gdb) record (gdb) p a $1 = 0 (gdb) n 5 a = 2; (gdb) n 6 return 0; (gdb) p a $2 = 2 (gdb) rn 5 a = 2; (gdb) rn Reached end of recorded history; stopping. Backward execution from here not possible. main () at test.c:4 4 a = 1; (gdb) p a $3 = 0 (gdb) record stop Process record is stopped and all execution logs are deleted. (gdb) c Continuing. [Inferior 1 (process 129178) exited normally] Signed-off-by: Hui Li --- gdb/configure.tgt | 2 +- gdb/loongarch-linux-tdep.c | 3 + gdb/loongarch-tdep.c | 495 +++++++++++++++++++++++++++++++++++++ gdb/loongarch-tdep.h | 3 + gdb/testsuite/lib/gdb.exp | 2 + 5 files changed, 504 insertions(+), 1 deletion(-) diff --git a/gdb/configure.tgt b/gdb/configure.tgt index 62df71b13fa..2d78c1182fa 100644 --- a/gdb/configure.tgt +++ b/gdb/configure.tgt @@ -363,7 +363,7 @@ lm32-*-*) loongarch*-*-linux*) # Target: LoongArch running Linux gdb_target_obs="loongarch-linux-tdep.o glibc-tdep.o \ - linux-tdep.o solib-svr4.o" + linux-tdep.o solib-svr4.o linux-record.o" ;; m32c-*-*) diff --git a/gdb/loongarch-linux-tdep.c b/gdb/loongarch-linux-tdep.c index 71578060303..86e7ed8a0bc 100644 --- a/gdb/loongarch-linux-tdep.c +++ b/gdb/loongarch-linux-tdep.c @@ -602,6 +602,9 @@ loongarch_linux_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch) /* Get the syscall number from the arch's register. */ set_gdbarch_get_syscall_number (gdbarch, loongarch_linux_get_syscall_number); + + /* Reversible debugging, process record. */ + set_gdbarch_process_record (gdbarch, loongarch_process_record); } /* Initialize LoongArch Linux target support. */ diff --git a/gdb/loongarch-tdep.c b/gdb/loongarch-tdep.c index c50dd7f4b78..c1b3a1f239c 100644 --- a/gdb/loongarch-tdep.c +++ b/gdb/loongarch-tdep.c @@ -18,12 +18,16 @@ along with this program. If not, see . */ #include "arch-utils.h" +#include "arch/loongarch-insn.h" #include "dwarf2/frame.h" #include "elf-bfd.h" #include "extract-store-integer.h" #include "frame-unwind.h" #include "gdbcore.h" +#include "linux-record.h" #include "loongarch-tdep.h" +#include "record.h" +#include "record-full.h" #include "reggroups.h" #include "target.h" #include "target-descriptions.h" @@ -1889,6 +1893,497 @@ loongarch_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) return gdbarch; } +/* LoongArch record/replay enumerations and structures. */ + +enum loongarch_record_result +{ + LOONGARCH_RECORD_SUCCESS, + LOONGARCH_RECORD_UNSUPPORTED, + LOONGARCH_RECORD_UNKNOWN +}; + +struct loongarch_record_s +{ + struct gdbarch *gdbarch; + struct regcache *regcache; + CORE_ADDR this_addr; /* Addr of insn to be recorded. */ + uint32_t insn; /* Insn to be recorded. */ +}; + +/* Record handler for data processing instructions. */ + +static int +loongarch_record_data_proc_insn (loongarch_record_s *loongarch_record) +{ + int rd_num; + rd_num = loongarch_decode_imm ("0:5", loongarch_record->insn, 0); + if (record_full_arch_list_add_reg (loongarch_record->regcache, rd_num)) + return -1; + + return LOONGARCH_RECORD_SUCCESS; +} + +/* Record handler for read time instructions. */ + +static int +loongarch_record_read_time_insn (loongarch_record_s *loongarch_record) +{ + int rd_num, rj_num; + rd_num = loongarch_decode_imm ("0:5", loongarch_record->insn, 0); + rj_num = loongarch_decode_imm ("5:5", loongarch_record->insn, 0); + if (record_full_arch_list_add_reg (loongarch_record->regcache, rd_num)) + return -1; + if (record_full_arch_list_add_reg (loongarch_record->regcache, rj_num)) + return -1; + + return LOONGARCH_RECORD_SUCCESS; +} + +/* Record handler for branch instructions. */ + +static int +loongarch_record_branch_insn (loongarch_record_s *loongarch_record) +{ + if (is_jirl_insn (loongarch_record->insn)) + { + int rd_num; + rd_num = loongarch_decode_imm ("0:5", loongarch_record->insn, 0); + if (record_full_arch_list_add_reg (loongarch_record->regcache, rd_num)) + return -1; + } + else if (is_bl_insn (loongarch_record->insn)) + { + if (record_full_arch_list_add_reg (loongarch_record->regcache, + LOONGARCH_RA_REGNUM)) + return -1; + } + + return LOONGARCH_RECORD_SUCCESS; +} + +/* Record handler for float data processing instructions. */ + +static int +loongarch_record_float_data_proc_insn (loongarch_record_s *loongarch_record) +{ + int fd_num; + fd_num = loongarch_decode_imm ("0:5", loongarch_record->insn, 0) + + LOONGARCH_FIRST_FP_REGNUM; + + if (record_full_arch_list_add_reg (loongarch_record->regcache, fd_num)) + return -1; + + return LOONGARCH_RECORD_SUCCESS; +} + +/* Record handler for move gr to fcsr instructions. */ + +static int +loongarch_record_movgr2fcsr_insn (loongarch_record_s *loongarch_record) +{ + if (record_full_arch_list_add_reg (loongarch_record->regcache, + LOONGARCH_FCSR_REGNUM)) + return -1; + + return LOONGARCH_RECORD_SUCCESS; +} + +/* Record handler for move gr/fr to fcc instructions. */ + +static int +loongarch_record_mov2cf_insn (loongarch_record_s *loongarch_record) +{ + int cd; + cd = loongarch_decode_imm ("0:3", loongarch_record->insn, 0); + if (record_full_arch_list_add_reg (loongarch_record->regcache, cd)) + return -1; + + return LOONGARCH_RECORD_SUCCESS; +} + +/* Record handler for float instructions. */ + +static unsigned int +loongarch_record_float_insn (loongarch_record_s *loongarch_record) +{ + if (is_movgr2fcsr_insn (loongarch_record->insn)) + return loongarch_record_movgr2fcsr_insn (loongarch_record); + else if (is_mov2cf_insn (loongarch_record->insn)) + return loongarch_record_mov2cf_insn (loongarch_record); + else + return loongarch_record_float_data_proc_insn (loongarch_record); +} + +/* Record handler for store instructions. */ + +static int +loongarch_record_store_insn (loongarch_record_s *loongarch_record) +{ + enum store_types + { + STB, STH, STW, STD, STXB, STXH, STXW, STXD, STPTRW, STPTRD, + SCW, SCD, FSTS, FSTD, FSTXS, FSTXD, VST, XVST, NOT_STORE + }; + int store_type, data_size, rj_num; + uint64_t address, rj_val; + + store_type = is_st_b_insn (loongarch_record->insn) ? STB : + is_st_h_insn (loongarch_record->insn) ? STH : + is_st_w_insn (loongarch_record->insn) ? STW : + is_st_d_insn (loongarch_record->insn) ? STD : + is_stx_b_insn (loongarch_record->insn) ? STXB : + is_stx_h_insn (loongarch_record->insn) ? STXH : + is_stx_w_insn (loongarch_record->insn) ? STXW : + is_stx_d_insn (loongarch_record->insn) ? STXD : + is_stptr_w_insn (loongarch_record->insn) ? STPTRW : + is_stptr_d_insn (loongarch_record->insn) ? STPTRD : + is_sc_w_insn (loongarch_record->insn) ? SCW : + is_sc_d_insn (loongarch_record->insn) ? SCD : + is_fst_s_insn (loongarch_record->insn) ? FSTS : + is_fst_d_insn (loongarch_record->insn) ? FSTD : + is_fstx_s_insn (loongarch_record->insn) ? FSTXS : + is_fstx_d_insn (loongarch_record->insn) ? FSTXD : + is_vst_insn (loongarch_record->insn) ? VST : + is_xvst_insn (loongarch_record->insn) ? XVST : + NOT_STORE; + rj_num = loongarch_decode_imm ("5:5", loongarch_record->insn, 0); + regcache_raw_read_unsigned (loongarch_record->regcache, rj_num, &rj_val); + + if (store_type == STB || store_type == STH || store_type == STW + || store_type == STD || store_type == FSTS || store_type == FSTD + || store_type == VST || store_type == XVST) + { + int imm; + imm = loongarch_decode_imm ("10:12", loongarch_record->insn, 1); + address = rj_val + imm; + switch (store_type) + { + case STB: + data_size = 1; + break; + case STH: + data_size = 2; + break; + case STW: + case FSTS: + data_size = 4; + break; + case STD: + case FSTD: + data_size = 8; + break; + case VST: + data_size = 16; + break; + case XVST: + data_size = 32; + break; + default: + data_size = 0; + break; + } + + if (record_full_arch_list_add_mem (address, data_size)) + return -1; + } + else if (store_type == STXB || store_type == STXH || store_type == STXW + || store_type == STXD || store_type == FSTXS || store_type == FSTXD) + { + int rk_num; + uint64_t rk_val; + rk_num = loongarch_decode_imm ("10:5", loongarch_record->insn, 0); + regcache_raw_read_unsigned (loongarch_record->regcache, rk_num, &rk_val); + address = rj_val + rk_val; + switch (store_type) + { + case STXB: + data_size = 1; + break; + case STXH: + data_size = 2; + break; + case STXW: + case FSTXS: + data_size = 4; + break; + case STXD: + case FSTXD: + data_size = 8; + break; + default: + data_size = 0; + break; + } + + if (record_full_arch_list_add_mem (address, data_size)) + return -1; + } + else if (store_type == STPTRW || store_type == STPTRD || store_type == SCW + || store_type == SCD) + { + int imm; + imm = loongarch_decode_imm ("10:14<<2", loongarch_record->insn, 1); + address = rj_val + imm; + switch (store_type) + { + case STPTRW: + case SCW: + data_size = 4; + break; + case STPTRD: + case SCD: + data_size = 8; + break; + default: + data_size = 0; + break; + } + + if (record_full_arch_list_add_mem (address, data_size)) + return -1; + } + + return LOONGARCH_RECORD_SUCCESS; +} + +/* Record handler for atomic memory access instructions. */ + +static int +loongarch_record_atomic_access_insn (loongarch_record_s *loongarch_record) +{ + int rj_num, rd_num, rk_num, length; + int data_size; + uint64_t address; + rd_num = loongarch_decode_imm ("0:5", loongarch_record->insn, 0); + rj_num = loongarch_decode_imm ("5:5", loongarch_record->insn, 0); + rk_num = loongarch_decode_imm ("10:5", loongarch_record->insn, 0); + regcache_raw_read_unsigned (loongarch_record->regcache, rj_num, &address); + if (is_basic_am_w_d_insn (loongarch_record->insn)) + { + length = loongarch_decode_imm ("15:1", loongarch_record->insn, 0); + data_size = length == 1 ? 8 : 4; + if (record_full_arch_list_add_mem (address, data_size)) + return -1; + } + if (is_am_b_h_insn (loongarch_record->insn)) + { + length = loongarch_decode_imm ("15:1", loongarch_record->insn, 0); + data_size = length == 1 ? 2 : 1; + if (record_full_arch_list_add_mem (address, data_size)) + return -1; + } + if (is_amcas_insn (loongarch_record->insn)) + { + length = loongarch_decode_imm ("15:2", loongarch_record->insn, 0); + switch (length) + { + case 0x0: + data_size = 1; + break; + case 0x1: + data_size = 2; + break; + case 0x2: + data_size = 4; + break; + case 0x3: + data_size = 8; + break; + default: + data_size = 0; + break; + } + if (record_full_arch_list_add_mem (address, data_size)) + return -1; + } + + if (record_full_arch_list_add_reg (loongarch_record->regcache, rd_num)) + return -1; + + if (is_amswap_insn (loongarch_record->insn)) + { + if (record_full_arch_list_add_reg (loongarch_record->regcache, rk_num)) + return -1; + } + + return LOONGARCH_RECORD_SUCCESS; +} + +/* Record handler for bound check load instructions. */ + +static int +loongarch_record_bound_check_load_insn (loongarch_record_s *loongarch_record) +{ + int rd_num, rj_num, rk_num, fd_num; + uint64_t rj_val, rk_val; + rd_num = loongarch_decode_imm ("0:5", loongarch_record->insn, 0); + fd_num = loongarch_decode_imm ("0:5", loongarch_record->insn, 0); + rj_num = loongarch_decode_imm ("5:5", loongarch_record->insn, 0); + rk_num = loongarch_decode_imm ("10:5", loongarch_record->insn, 0); + regcache_raw_read_unsigned (loongarch_record->regcache, rj_num, &rj_val); + regcache_raw_read_unsigned (loongarch_record->regcache, rk_num, &rk_val); + + if ((is_ldgt_insn (loongarch_record->insn) && (rj_val > rk_val)) + || (is_ldle_insn (loongarch_record->insn) && (rj_val <= rk_val))) + { + if (record_full_arch_list_add_reg (loongarch_record->regcache, rd_num)) + return -1; + } + else if ((is_fldgt_insn (loongarch_record->insn) && (rj_val > rk_val)) + || (is_fldle_insn (loongarch_record->insn) && (rj_val <= rk_val))) + { + if (record_full_arch_list_add_reg (loongarch_record->regcache, fd_num)) + return -1; + } + + return LOONGARCH_RECORD_SUCCESS; +} + +/* Record handler for bound check store instructions. */ + +static int +loongarch_record_bound_check_store_insn (loongarch_record_s *loongarch_record) +{ + int rj_num, rk_num; + int data_size; + uint64_t rj_val, rk_val; + uint32_t length_opcode; + rj_num = loongarch_decode_imm ("5:5", loongarch_record->insn, 0); + rk_num = loongarch_decode_imm ("10:5", loongarch_record->insn, 0); + regcache_raw_read_unsigned (loongarch_record->regcache, rj_num, &rj_val); + regcache_raw_read_unsigned (loongarch_record->regcache, rk_num, &rk_val); + + if ((is_stgt_insn (loongarch_record->insn) && (rj_val > rk_val)) + || (is_stle_insn (loongarch_record->insn) && (rj_val <= rk_val))) + { + length_opcode = loongarch_record->insn & 0x00018000; + switch (length_opcode) + { + case 0x00000000: + data_size = 1; + break; + case 0x00008000: + data_size = 2; + break; + case 0x00010000: + data_size = 4; + break; + case 0x00018000: + data_size = 8; + break; + default: + data_size = 0; + break; + } + + if (record_full_arch_list_add_mem (rj_val, data_size)) + return -1; + } + else if ((is_fstgt_insn (loongarch_record->insn) && (rj_val > rk_val)) + || (is_fstle_insn (loongarch_record->insn) && (rj_val <= rk_val))) + { + length_opcode = loongarch_record->insn & 0x00008000; + switch (length_opcode) + { + case 0x00000000: + data_size = 4; + break; + case 0x00008000: + data_size = 8; + break; + default: + data_size = 0; + break; + } + + if (record_full_arch_list_add_mem (rj_val, data_size)) + return -1; + } + + return LOONGARCH_RECORD_SUCCESS; +} + +/* Record handler for special instructions like privilege instructions, + barrier instructions and cache related instructions etc. */ + +static int +loongarch_record_special_insn (loongarch_record_s *loongarch_record) +{ + return LOONGARCH_RECORD_SUCCESS; +} + +/* Decode insns type and invoke its record handler. */ + +static int +loongarch_record_decode_insn_handler (loongarch_record_s *loongarch_record) +{ + if (is_data_process_insn (loongarch_record->insn)) + return loongarch_record_data_proc_insn (loongarch_record); + else if (is_branch_insn (loongarch_record->insn)) + return loongarch_record_branch_insn (loongarch_record); + else if (is_store_insn (loongarch_record->insn)) + return loongarch_record_store_insn (loongarch_record); + else if (is_read_time_insn (loongarch_record->insn)) + return loongarch_record_read_time_insn (loongarch_record); + else if (is_float_insn (loongarch_record->insn)) + return loongarch_record_float_insn (loongarch_record); + else if (is_special_insn (loongarch_record->insn)) + return loongarch_record_special_insn (loongarch_record); + else if (is_atomic_access_insn (loongarch_record->insn)) + return loongarch_record_atomic_access_insn (loongarch_record); + else if (is_bound_check_load_insn (loongarch_record->insn)) + return loongarch_record_bound_check_load_insn (loongarch_record); + else if (is_bound_check_store_insn (loongarch_record->insn)) + return loongarch_record_bound_check_store_insn (loongarch_record); + + return LOONGARCH_RECORD_UNSUPPORTED; +} + +/* Parse the current instruction and record the values of the registers and + memory that will be changed in current instruction to record_arch_list + return -1 if something is wrong. */ + +int +loongarch_process_record (struct gdbarch *gdbarch, struct regcache *regcache, + CORE_ADDR insn_addr) +{ + int ret = 0; + loongarch_record_s loongarch_record; + + /* reset the content of loongarch_record */ + memset (&loongarch_record, 0, sizeof (loongarch_record_s)); + + /* write the loongarch_record */ + loongarch_record.gdbarch = gdbarch; + loongarch_record.regcache = regcache; + loongarch_record.this_addr = insn_addr; + + /* Get the current instruction */ + loongarch_record.insn = (uint32_t) loongarch_fetch_instruction (insn_addr); + ret = loongarch_record_decode_insn_handler (&loongarch_record); + if (ret == LOONGARCH_RECORD_UNSUPPORTED) + { + gdb_printf (gdb_stderr, + _("Process record does not support instruction " + "0x%0x at address %s.\n"), + loongarch_record.insn, + paddress (gdbarch, insn_addr)); + return -1; + } + if (ret == LOONGARCH_RECORD_SUCCESS) + { + /* Record PC registers. */ + if (record_full_arch_list_add_reg (loongarch_record.regcache, + LOONGARCH_PC_REGNUM)) + return -1; + + if (record_full_arch_list_add_end ()) + return -1; + } + + return ret; +} + void _initialize_loongarch_tdep (); void _initialize_loongarch_tdep () diff --git a/gdb/loongarch-tdep.h b/gdb/loongarch-tdep.h index 5c8108182ad..a148363c795 100644 --- a/gdb/loongarch-tdep.h +++ b/gdb/loongarch-tdep.h @@ -44,4 +44,7 @@ struct loongarch_gdbarch_tdep : gdbarch_tdep_base CORE_ADDR (*syscall_next_pc) (const frame_info_ptr &frame) = nullptr; }; +extern int loongarch_process_record (struct gdbarch *gdbarch, + struct regcache *regcache, CORE_ADDR addr); + #endif /* LOONGARCH_TDEP_H */ diff --git a/gdb/testsuite/lib/gdb.exp b/gdb/testsuite/lib/gdb.exp index 2b27d7fc9e7..127ab272100 100644 --- a/gdb/testsuite/lib/gdb.exp +++ b/gdb/testsuite/lib/gdb.exp @@ -3700,6 +3700,7 @@ proc supports_process_record {} { if { [istarget "arm*-*-linux*"] || [istarget "x86_64-*-linux*"] || [istarget "i\[34567\]86-*-linux*"] || [istarget "aarch64*-*-linux*"] + || [istarget "loongarch*-*-linux*"] || [istarget "powerpc*-*-linux*"] || [istarget "s390*-*-linux*"] } { return 1 @@ -3719,6 +3720,7 @@ proc supports_reverse {} { if { [istarget "arm*-*-linux*"] || [istarget "x86_64-*-linux*"] || [istarget "i\[34567\]86-*-linux*"] || [istarget "aarch64*-*-linux*"] + || [istarget "loongarch*-*-linux*"] || [istarget "powerpc*-*-linux*"] || [istarget "s390*-*-linux*"] } { return 1 From patchwork Fri Nov 22 09:06:23 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hui Li X-Patchwork-Id: 101729 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 514CE385702B for ; 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a=rsa-sha256; d=sourceware.org; s=key; t=1732266394; c=relaxed/simple; bh=LsKNA82nqm2Fbex42Pp89RhW5rVfRHOuCe1e29nm1IA=; h=From:To:Subject:Date:Message-Id:MIME-Version; b=pLPn92pBuMcjHSSJh3wpBS5rtdHAj3QkLRMGmmLXnXlhl9vEofX9whWw3MUBX7TV4QZ8u8T2+edjrkN5HYfg2QUT1NvHnXxApEZmO5//MOawSkCAhP/KXlDAeGALcav9zDvkLmBrhYaenFWzZ660cbPcskagngklRotp7f1sm/Q= ARC-Authentication-Results: i=1; server2.sourceware.org DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 54F673857BA7 Received: from loongson.cn (unknown [113.200.148.30]) by gateway (Coremail) with SMTP id _____8DxGeCXSUBnuu9FAA--.5298S3; Fri, 22 Nov 2024 17:06:31 +0800 (CST) Received: from localhost.localdomain (unknown [113.200.148.30]) by front1 (Coremail) with SMTP id qMiowMAxFMCRSUBn8ORiAA--.35644S5; Fri, 22 Nov 2024 17:06:29 +0800 (CST) From: Hui Li To: gdb-patches@sourceware.org Cc: Tiezhu Yang Subject: [PATCH v2 3/4] gdb: LoongArch: Add system call support for process record/replay Date: Fri, 22 Nov 2024 17:06:23 +0800 Message-Id: <20241122090624.2355-4-lihui@loongson.cn> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20241122090624.2355-1-lihui@loongson.cn> References: <20241122090624.2355-1-lihui@loongson.cn> MIME-Version: 1.0 X-CM-TRANSID: qMiowMAxFMCRSUBn8ORiAA--.35644S5 X-CM-SenderInfo: 5olk3xo6or00hjvr0hdfq/ X-Coremail-Antispam: 1Uk129KBj9fXoWftFW7Cr47WrWUGrW3ZrWUtrc_yoWrXrykuo WrAFy3Xr48Gw129r98Kws5XrWrtw1jy3yUAay7Zw4Yka1xGr1jkryUWw1Fyry3Wws2qw4I kFyUKrsxGFW7XF1xl-sFpf9Il3svdjkaLaAFLSUrUUUUUb8apTn2vfkv8UJUUUU8wcxFpf 9Il3svdxBIdaVrn0xqx4xG64xvF2IEw4CE5I8CrVC2j2Jv73VFW2AGmfu7bjvjm3AaLaJ3 UjIYCTnIWjp_UUUY87kC6x804xWl14x267AKxVWUJVW8JwAFc2x0x2IEx4CE42xK8VAvwI 8IcIk0rVWrJVCq3wAFIxvE14AKwVWUJVWUGwA2ocxC64kIII0Yj41l84x0c7CEw4AK67xG Y2AK021l84ACjcxK6xIIjxv20xvE14v26r1I6r4UM28EF7xvwVC0I7IYx2IY6xkF7I0E14 v26r1j6r4UM28EF7xvwVC2z280aVAFwI0_Gr1j6F4UJwA2z4x0Y4vEx4A2jsIEc7CjxVAF wI0_Gr1j6F4UJwAS0I0E0xvYzxvE52x082IY62kv0487Mc804VCY07AIYIkI8VC2zVCFFI 0UMc02F40EFcxC0VAKzVAqx4xG6I80ewAv7VC0I7IYx2IY67AKxVWUXVWUAwAv7VC2z280 aVAFwI0_Cr0_Gr1UMcvjeVCFs4IE7xkEbVWUJVW8JwACjcxG0xvY0x0EwIxGrwCF04k20x vY0x0EwIxGrwCFx2IqxVCFs4IE7xkEbVWUJVW8JwC20s026c02F40E14v26r1j6r18MI8I 3I0E7480Y4vE14v26r106r1rMI8E67AF67kF1VAFwI0_Jrv_JF1lIxkGc2Ij64vIr41lIx AIcVC0I7IYx2IY67AKxVWUJVWUCwCI42IY6xIIjxv20xvEc7CjxVAFwI0_Jr0_Gr1lIxAI cVCF04k26cxKx2IYs7xG6r1j6r1xMIIF0xvEx4A2jsIE14v26r1j6r4UMIIF0xvEx4A2js IEc7CjxVAFwI0_Jr0_GrUvcSsGvfC2KfnxnUUI43ZEXa7IU1UDG7UUUUU== X-Spam-Status: No, score=-12.2 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, KAM_SHORT, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gdb-patches-bounces~patchwork=sourceware.org@sourceware.org The process record and replay function also need record Linux system call instruction. This patch adds LoongArch system call number definitions in gdb/arch/loongarch-syscall.h, and adds loongarch_linux_syscall_record() in gdb/loongarch-linux-tdep.c to record system call execute log. With this patch, the main functions of process record/replay and reverse debugging are implemented. The LoongArch system call numbers definitions are obtained from Linux kernel. https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/include/uapi/asm-generic/unistd.h https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/loongarch/include/asm/unistd.h Signed-off-by: Hui Li Approved-By: Guinevere Larsen (record-full) --- gdb/arch/loongarch-syscall.h | 348 +++++++++++++++++++++ gdb/loongarch-linux-tdep.c | 567 +++++++++++++++++++++++++++++++++++ gdb/loongarch-tdep.c | 18 ++ gdb/loongarch-tdep.h | 4 + 4 files changed, 937 insertions(+) create mode 100644 gdb/arch/loongarch-syscall.h diff --git a/gdb/arch/loongarch-syscall.h b/gdb/arch/loongarch-syscall.h new file mode 100644 index 00000000000..d4b00e4848d --- /dev/null +++ b/gdb/arch/loongarch-syscall.h @@ -0,0 +1,348 @@ +/* Target-dependent code for LoongArch + + Copyright (C) 2024 Free Software Foundation, Inc. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . */ + +/* The syscall number definitions are obtained from Linux kernel header file. + https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/include/uapi/asm-generic/unistd.h + https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/loongarch/include/asm/unistd.h */ + +#ifndef ARCH_LOONGARCH_SYSCALL_H +#define ARCH_LOONGARCH_SYSCALL_H + +enum loongarch_syscall +{ + loongarch_sys_io_setup = 0, + loongarch_sys_io_destroy = 1, + loongarch_sys_io_submit = 2, + loongarch_sys_io_cancel = 3, + loongarch_sys_io_getevents = 4, + loongarch_sys_setxattr = 5, + loongarch_sys_lsetxattr = 6, + loongarch_sys_fsetxattr = 7, + loongarch_sys_getxattr = 8, + loongarch_sys_lgetxattr = 9, + loongarch_sys_fgetxattr = 10, + loongarch_sys_listxattr = 11, + loongarch_sys_llistxattr = 12, + loongarch_sys_flistxattr = 13, + loongarch_sys_removexattr = 14, + loongarch_sys_lremovexattr = 15, + loongarch_sys_fremovexattr = 16, + loongarch_sys_getcwd = 17, + loongarch_sys_lookup_dcookie = 18, + loongarch_sys_eventfd2 = 19, + loongarch_sys_epoll_create1 = 20, + loongarch_sys_epoll_ctl = 21, + loongarch_sys_epoll_pwait = 22, + loongarch_sys_dup = 23, + loongarch_sys_dup3 = 24, + loongarch_sys_fcntl = 25, + loongarch_sys_inotify_init1 = 26, + loongarch_sys_inotify_add_watch = 27, + loongarch_sys_inotify_rm_watch = 28, + loongarch_sys_ioctl = 29, + loongarch_sys_ioprio_set = 30, + loongarch_sys_ioprio_get = 31, + loongarch_sys_flock = 32, + loongarch_sys_mknodat = 33, + loongarch_sys_mkdirat = 34, + loongarch_sys_unlinkat = 35, + loongarch_sys_symlinkat = 36, + loongarch_sys_linkat = 37, + + loongarch_sys_umount2 = 39, + loongarch_sys_mount = 40, + loongarch_sys_pivot_root = 41, + loongarch_sys_nfsservctl = 42, + loongarch_sys_statfs = 43, + loongarch_sys_fstatfs = 44, + loongarch_sys_truncate = 45, + loongarch_sys_ftruncate = 46, + loongarch_sys_fallocate = 47, + loongarch_sys_faccessat = 48, + loongarch_sys_chdir = 49, + loongarch_sys_fchdir = 50, + loongarch_sys_chroot = 51, + loongarch_sys_fchmod = 52, + loongarch_sys_fchmodat = 53, + loongarch_sys_fchownat = 54, + loongarch_sys_fchown = 55, + loongarch_sys_openat = 56, + loongarch_sys_close = 57, + loongarch_sys_vhangup = 58, + loongarch_sys_pipe2 = 59, + loongarch_sys_quotactl = 60, + loongarch_sys_getdents64 = 61, + loongarch_sys_lseek = 62, + loongarch_sys_read = 63, + loongarch_sys_write = 64, + loongarch_sys_readv = 65, + loongarch_sys_writev = 66, + loongarch_sys_pread64 = 67, + loongarch_sys_pwrite64 = 68, + loongarch_sys_preadv = 69, + loongarch_sys_pwritev = 70, + loongarch_sys_sendfile = 71, + loongarch_sys_pselect6 = 72, + loongarch_sys_ppoll = 73, + loongarch_sys_signalfd4 = 74, + loongarch_sys_vmsplice = 75, + loongarch_sys_splice = 76, + loongarch_sys_tee = 77, + loongarch_sys_readlinkat = 78, + loongarch_sys_newfstatat = 79, + loongarch_sys_fstat = 80, + loongarch_sys_sync = 81, + loongarch_sys_fsync = 82, + loongarch_sys_fdatasync = 83, + loongarch_sys_sync_file_range = 84, + loongarch_sys_timerfd_create = 85, + loongarch_sys_timerfd_settime = 86, + loongarch_sys_timerfd_gettime = 87, + loongarch_sys_utimensat = 88, + loongarch_sys_acct = 89, + loongarch_sys_capget = 90, + loongarch_sys_capset = 91, + loongarch_sys_personality = 92, + loongarch_sys_exit = 93, + loongarch_sys_exit_group = 94, + loongarch_sys_waitid = 95, + loongarch_sys_set_tid_address = 96, + loongarch_sys_unshare = 97, + loongarch_sys_futex = 98, + loongarch_sys_set_robust_list = 99, + loongarch_sys_get_robust_list = 100, + loongarch_sys_nanosleep = 101, + loongarch_sys_getitimer = 102, + loongarch_sys_setitimer = 103, + loongarch_sys_kexec_load = 104, + loongarch_sys_init_module = 105, + loongarch_sys_delete_module = 106, + loongarch_sys_timer_create = 107, + loongarch_sys_timer_gettime = 108, + loongarch_sys_timer_getoverrun = 109, + loongarch_sys_timer_settime = 110, + loongarch_sys_timer_delete = 111, + loongarch_sys_clock_settime = 112, + loongarch_sys_clock_gettime = 113, + loongarch_sys_clock_getres = 114, + loongarch_sys_clock_nanosleep = 115, + loongarch_sys_syslog = 116, + loongarch_sys_ptrace = 117, + loongarch_sys_sched_setparam = 118, + loongarch_sys_sched_setscheduler = 119, + loongarch_sys_sched_getscheduler = 120, + loongarch_sys_sched_getparam = 121, + loongarch_sys_sched_setaffinity = 122, + loongarch_sys_sched_getaffinity = 123, + loongarch_sys_sched_yield = 124, + loongarch_sys_sched_get_priority_max = 125, + loongarch_sys_sched_get_priority_min = 126, + loongarch_sys_sched_rr_get_interval = 127, + loongarch_sys_restart_syscall = 128, + loongarch_sys_kill = 129, + loongarch_sys_tkill = 130, + loongarch_sys_tgkill = 131, + loongarch_sys_sigaltstack = 132, + loongarch_sys_rt_sigsuspend = 133, + loongarch_sys_rt_sigaction = 134, + loongarch_sys_rt_sigprocmask = 135, + loongarch_sys_rt_sigpending = 136, + loongarch_sys_rt_sigtimedwait = 137, + loongarch_sys_rt_sigqueueinfo = 138, + loongarch_sys_rt_sigreturn = 139, + loongarch_sys_setpriority = 140, + loongarch_sys_getpriority = 141, + loongarch_sys_reboot = 142, + loongarch_sys_setregid = 143, + loongarch_sys_setgid = 144, + loongarch_sys_setreuid = 145, + loongarch_sys_setuid = 146, + loongarch_sys_setresuid = 147, + loongarch_sys_getresuid = 148, + loongarch_sys_setresgid = 149, + loongarch_sys_getresgid = 150, + loongarch_sys_setfsuid = 151, + loongarch_sys_setfsgid = 152, + loongarch_sys_times = 153, + loongarch_sys_setpgid = 154, + loongarch_sys_getpgid = 155, + loongarch_sys_getsid = 156, + loongarch_sys_setsid = 157, + loongarch_sys_getgroups = 158, + loongarch_sys_setgroups = 159, + loongarch_sys_uname = 160, + loongarch_sys_sethostname = 161, + loongarch_sys_setdomainname = 162, + + loongarch_sys_getrusage = 165, + loongarch_sys_umask = 166, + loongarch_sys_prctl = 167, + loongarch_sys_getcpu = 168, + loongarch_sys_gettimeofday = 169, + loongarch_sys_settimeofday = 170, + loongarch_sys_adjtimex = 171, + loongarch_sys_getpid = 172, + loongarch_sys_getppid = 173, + loongarch_sys_getuid = 174, + loongarch_sys_geteuid = 175, + loongarch_sys_getgid = 176, + loongarch_sys_getegid = 177, + loongarch_sys_gettid = 178, + loongarch_sys_sysinfo = 179, + loongarch_sys_mq_open = 180, + loongarch_sys_mq_unlink = 181, + loongarch_sys_mq_timedsend = 182, + loongarch_sys_mq_timedreceive = 183, + loongarch_sys_mq_notify = 184, + loongarch_sys_mq_getsetattr = 185, + loongarch_sys_msgget = 186, + loongarch_sys_msgctl = 187, + loongarch_sys_msgrcv = 188, + loongarch_sys_msgsnd = 189, + loongarch_sys_semget = 190, + loongarch_sys_semctl = 191, + loongarch_sys_semtimedop = 192, + loongarch_sys_semop = 193, + loongarch_sys_shmget = 194, + loongarch_sys_shmctl = 195, + loongarch_sys_shmat = 196, + loongarch_sys_shmdt = 197, + loongarch_sys_socket = 198, + loongarch_sys_socketpair = 199, + loongarch_sys_bind = 200, + loongarch_sys_listen = 201, + loongarch_sys_accept = 202, + loongarch_sys_connect = 203, + loongarch_sys_getsockname = 204, + loongarch_sys_getpeername = 205, + loongarch_sys_sendto = 206, + loongarch_sys_recvfrom = 207, + loongarch_sys_setsockopt = 208, + loongarch_sys_getsockopt = 209, + loongarch_sys_shutdown = 210, + loongarch_sys_sendmsg = 211, + loongarch_sys_recvmsg = 212, + loongarch_sys_readahead = 213, + loongarch_sys_brk = 214, + loongarch_sys_munmap = 215, + loongarch_sys_mremap = 216, + loongarch_sys_add_key = 217, + loongarch_sys_request_key = 218, + loongarch_sys_keyctl = 219, + loongarch_sys_clone = 220, + loongarch_sys_execve = 221, + loongarch_sys_mmap = 222, + loongarch_sys_fadvise64 = 223, + loongarch_sys_swapon = 224, + loongarch_sys_swapoff = 225, + loongarch_sys_mprotect = 226, + loongarch_sys_msync = 227, + loongarch_sys_mlock = 228, + loongarch_sys_munlock = 229, + loongarch_sys_mlockall = 230, + loongarch_sys_munlockall = 231, + loongarch_sys_mincore = 232, + loongarch_sys_madvise = 233, + loongarch_sys_remap_file_pages = 234, + loongarch_sys_mbind = 235, + loongarch_sys_get_mempolicy = 236, + loongarch_sys_set_mempolicy = 237, + loongarch_sys_migrate_pages = 238, + loongarch_sys_move_pages = 239, + loongarch_sys_rt_tgsigqueueinfo = 240, + loongarch_sys_perf_event_open = 241, + loongarch_sys_accept4 = 242, + loongarch_sys_recvmmsg = 243, + loongarch_sys_wait4 = 260, + loongarch_sys_prlimit64 = 261, + loongarch_sys_fanotify_init = 262, + loongarch_sys_fanotify_mark = 263, + loongarch_sys_name_to_handle_at = 264, + loongarch_sys_open_by_handle_at = 265, + loongarch_sys_clock_adjtime = 266, + loongarch_sys_syncfs = 267, + loongarch_sys_setns = 268, + loongarch_sys_sendmmsg = 269, + loongarch_sys_process_vm_readv = 270, + loongarch_sys_process_vm_writev = 271, + loongarch_sys_kcmp = 272, + loongarch_sys_finit_module = 273, + loongarch_sys_sched_setattr = 274, + loongarch_sys_sched_getattr = 275, + loongarch_sys_renameat2 = 276, + loongarch_sys_seccomp = 277, + loongarch_sys_getrandom = 278, + loongarch_sys_memfd_create = 279, + loongarch_sys_bpf = 280, + loongarch_sys_execveat = 281, + loongarch_sys_userfaultfd = 282, + loongarch_sys_membarrier = 283, + loongarch_sys_mlock2 = 284, + loongarch_sys_copy_file_range = 285, + loongarch_sys_preadv2 = 286, + loongarch_sys_pwritev2 = 287, + loongarch_sys_pkey_mprotect = 288, + loongarch_sys_pkey_alloc = 289, + loongarch_sys_pkey_free = 290, + loongarch_sys_statx = 291, + loongarch_sys_io_pgetevents = 292, + loongarch_sys_rseq = 293, + loongarch_sys_kexec_file_load = 294, + + loongarch_sys_pidfd_send_signal = 424, + loongarch_sys_io_uring_setup = 425, + loongarch_sys_io_uring_enter = 426, + loongarch_sys_io_uring_register = 427, + loongarch_sys_open_tree = 428, + loongarch_sys_move_mount = 429, + loongarch_sys_fsopen = 430, + loongarch_sys_fsconfig = 431, + loongarch_sys_fsmount = 432, + loongarch_sys_fspick = 433, + loongarch_sys_pidfd_open = 434, + loongarch_sys_clone3 = 435, + loongarch_sys_close_range = 436, + loongarch_sys_openat2 = 437, + loongarch_sys_pidfd_getfd = 438, + loongarch_sys_faccessat2 = 439, + loongarch_sys_process_madvise = 440, + loongarch_sys_epoll_pwait2 = 441, + loongarch_sys_mount_setattr = 442, + loongarch_sys_quotactl_fd = 443, + loongarch_sys_landlock_create_ruleset = 444, + loongarch_sys_landlock_add_rule = 445, + loongarch_sys_landlock_restrict_self = 446, + + loongarch_sys_process_mrelease = 448, + loongarch_sys_futex_waitv = 449, + loongarch_sys_set_mempolicy_home_node = 450, + loongarch_sys_cachestat = 451, + loongarch_sys_fchmodat2 = 452, + loongarch_sys_map_shadow_stack = 453, + loongarch_sys_futex_wake = 454, + loongarch_sys_futex_wait = 455, + loongarch_sys_futex_requeue = 456, + loongarch_sys_statmount = 457, + loongarch_sys_listmount = 458, + loongarch_sys_lsm_get_self_attr = 459, + loongarch_sys_lsm_set_self_attr = 460, + loongarch_sys_lsm_list_modules = 461, + loongarch_sys_mseal = 462, + loongarch_sys_syscalls = 463, +}; + +#endif /* ARCH_LOONGARCH_SYSCALL_H */ diff --git a/gdb/loongarch-linux-tdep.c b/gdb/loongarch-linux-tdep.c index 86e7ed8a0bc..b18cacca087 100644 --- a/gdb/loongarch-linux-tdep.c +++ b/gdb/loongarch-linux-tdep.c @@ -18,15 +18,21 @@ You should have received a copy of the GNU General Public License along with this program. If not, see . */ +#include "arch/loongarch-syscall.h" #include "extract-store-integer.h" +#include "gdbarch.h" #include "glibc-tdep.h" #include "inferior.h" +#include "linux-record.h" #include "linux-tdep.h" #include "loongarch-tdep.h" +#include "record-full.h" +#include "regset.h" #include "solib-svr4.h" #include "target-descriptions.h" #include "trad-frame.h" #include "tramp-frame.h" +#include "value.h" #include "xml-syscall.h" /* The syscall's XML filename for LoongArch. */ @@ -566,6 +572,563 @@ loongarch_linux_get_syscall_number (struct gdbarch *gdbarch, thread_info *thread return ret; } +static linux_record_tdep loongarch_linux_record_tdep; + +/* loongarch_canonicalize_syscall maps syscall ids from the native LoongArch + linux set of syscall ids into a canonical set of syscall ids used by + process record. */ + +static enum gdb_syscall +loongarch_canonicalize_syscall (enum loongarch_syscall syscall_number) +{ +#define SYSCALL_MAP(SYSCALL) case loongarch_sys_##SYSCALL: \ + return gdb_sys_##SYSCALL + +#define UNSUPPORTED_SYSCALL_MAP(SYSCALL) case loongarch_sys_##SYSCALL: \ + return gdb_sys_no_syscall + + switch(syscall_number) + { + SYSCALL_MAP (io_setup); + SYSCALL_MAP (io_destroy); + SYSCALL_MAP (io_submit); + SYSCALL_MAP (io_cancel); + SYSCALL_MAP (io_getevents); + SYSCALL_MAP (setxattr); + SYSCALL_MAP (lsetxattr); + SYSCALL_MAP (fsetxattr); + SYSCALL_MAP (getxattr); + SYSCALL_MAP (lgetxattr); + SYSCALL_MAP (fgetxattr); + SYSCALL_MAP (listxattr); + SYSCALL_MAP (llistxattr); + SYSCALL_MAP (flistxattr); + SYSCALL_MAP (removexattr); + SYSCALL_MAP (lremovexattr); + SYSCALL_MAP (fremovexattr); + SYSCALL_MAP (getcwd); + SYSCALL_MAP (lookup_dcookie); + SYSCALL_MAP (eventfd2); + SYSCALL_MAP (epoll_create1); + SYSCALL_MAP (epoll_ctl); + SYSCALL_MAP (epoll_pwait); + SYSCALL_MAP (dup); + SYSCALL_MAP (dup3); + SYSCALL_MAP (fcntl); + SYSCALL_MAP (inotify_init1); + SYSCALL_MAP (inotify_add_watch); + SYSCALL_MAP (inotify_rm_watch); + SYSCALL_MAP (ioctl); + SYSCALL_MAP (ioprio_set); + SYSCALL_MAP (ioprio_get); + SYSCALL_MAP (flock); + SYSCALL_MAP (mknodat); + SYSCALL_MAP (mkdirat); + SYSCALL_MAP (unlinkat); + SYSCALL_MAP (symlinkat); + SYSCALL_MAP (linkat); + UNSUPPORTED_SYSCALL_MAP (umount2); + SYSCALL_MAP (mount); + SYSCALL_MAP (pivot_root); + SYSCALL_MAP (nfsservctl); + SYSCALL_MAP (statfs); + SYSCALL_MAP (truncate); + SYSCALL_MAP (ftruncate); + SYSCALL_MAP (fallocate); + SYSCALL_MAP (faccessat); + SYSCALL_MAP (fchdir); + SYSCALL_MAP (chroot); + SYSCALL_MAP (fchmod); + SYSCALL_MAP (fchmodat); + SYSCALL_MAP (fchownat); + SYSCALL_MAP (fchown); + SYSCALL_MAP (openat); + SYSCALL_MAP (close); + SYSCALL_MAP (vhangup); + SYSCALL_MAP (pipe2); + SYSCALL_MAP (quotactl); + SYSCALL_MAP (getdents64); + SYSCALL_MAP (lseek); + SYSCALL_MAP (read); + SYSCALL_MAP (write); + SYSCALL_MAP (readv); + SYSCALL_MAP (writev); + SYSCALL_MAP (pread64); + SYSCALL_MAP (pwrite64); + UNSUPPORTED_SYSCALL_MAP (preadv); + UNSUPPORTED_SYSCALL_MAP (pwritev); + SYSCALL_MAP (sendfile); + SYSCALL_MAP (pselect6); + SYSCALL_MAP (ppoll); + UNSUPPORTED_SYSCALL_MAP (signalfd4); + SYSCALL_MAP (vmsplice); + SYSCALL_MAP (splice); + SYSCALL_MAP (tee); + SYSCALL_MAP (readlinkat); + SYSCALL_MAP (newfstatat); + SYSCALL_MAP (fstat); + SYSCALL_MAP (sync); + SYSCALL_MAP (fsync); + SYSCALL_MAP (fdatasync); + SYSCALL_MAP (sync_file_range); + UNSUPPORTED_SYSCALL_MAP (timerfd_create); + UNSUPPORTED_SYSCALL_MAP (timerfd_settime); + UNSUPPORTED_SYSCALL_MAP (timerfd_gettime); + UNSUPPORTED_SYSCALL_MAP (utimensat); + SYSCALL_MAP (acct); + SYSCALL_MAP (capget); + SYSCALL_MAP (capset); + SYSCALL_MAP (personality); + SYSCALL_MAP (exit); + SYSCALL_MAP (exit_group); + SYSCALL_MAP (waitid); + SYSCALL_MAP (set_tid_address); + SYSCALL_MAP (unshare); + SYSCALL_MAP (futex); + SYSCALL_MAP (set_robust_list); + SYSCALL_MAP (get_robust_list); + SYSCALL_MAP (nanosleep); + SYSCALL_MAP (getitimer); + SYSCALL_MAP (setitimer); + SYSCALL_MAP (kexec_load); + SYSCALL_MAP (init_module); + SYSCALL_MAP (delete_module); + SYSCALL_MAP (timer_create); + SYSCALL_MAP (timer_settime); + SYSCALL_MAP (timer_gettime); + SYSCALL_MAP (timer_getoverrun); + SYSCALL_MAP (timer_delete); + SYSCALL_MAP (clock_settime); + SYSCALL_MAP (clock_gettime); + SYSCALL_MAP (clock_getres); + SYSCALL_MAP (clock_nanosleep); + SYSCALL_MAP (syslog); + SYSCALL_MAP (ptrace); + SYSCALL_MAP (sched_setparam); + SYSCALL_MAP (sched_setscheduler); + SYSCALL_MAP (sched_getscheduler); + SYSCALL_MAP (sched_getparam); + SYSCALL_MAP (sched_setaffinity); + SYSCALL_MAP (sched_getaffinity); + SYSCALL_MAP (sched_yield); + SYSCALL_MAP (sched_get_priority_max); + SYSCALL_MAP (sched_get_priority_min); + SYSCALL_MAP (sched_rr_get_interval); + SYSCALL_MAP (kill); + SYSCALL_MAP (tkill); + SYSCALL_MAP (tgkill); + SYSCALL_MAP (sigaltstack); + SYSCALL_MAP (rt_sigsuspend); + SYSCALL_MAP (rt_sigaction); + SYSCALL_MAP (rt_sigprocmask); + SYSCALL_MAP (rt_sigpending); + SYSCALL_MAP (rt_sigtimedwait); + SYSCALL_MAP (rt_sigqueueinfo); + SYSCALL_MAP (rt_sigreturn); + SYSCALL_MAP (setpriority); + SYSCALL_MAP (getpriority); + SYSCALL_MAP (reboot); + SYSCALL_MAP (setregid); + SYSCALL_MAP (setgid); + SYSCALL_MAP (setreuid); + SYSCALL_MAP (setuid); + SYSCALL_MAP (setresuid); + SYSCALL_MAP (getresuid); + SYSCALL_MAP (setresgid); + SYSCALL_MAP (getresgid); + SYSCALL_MAP (setfsuid); + SYSCALL_MAP (setfsgid); + SYSCALL_MAP (times); + SYSCALL_MAP (setpgid); + SYSCALL_MAP (getpgid); + SYSCALL_MAP (getsid); + SYSCALL_MAP (setsid); + SYSCALL_MAP (getgroups); + SYSCALL_MAP (setgroups); + SYSCALL_MAP (uname); + SYSCALL_MAP (sethostname); + SYSCALL_MAP (setdomainname); + SYSCALL_MAP (getrusage); + SYSCALL_MAP (umask); + SYSCALL_MAP (prctl); + SYSCALL_MAP (getcpu); + SYSCALL_MAP (gettimeofday); + SYSCALL_MAP (settimeofday); + SYSCALL_MAP (adjtimex); + SYSCALL_MAP (getpid); + SYSCALL_MAP (getppid); + SYSCALL_MAP (getuid); + SYSCALL_MAP (geteuid); + SYSCALL_MAP (getgid); + SYSCALL_MAP (getegid); + SYSCALL_MAP (gettid); + SYSCALL_MAP (sysinfo); + SYSCALL_MAP (mq_open); + SYSCALL_MAP (mq_unlink); + SYSCALL_MAP (mq_timedsend); + SYSCALL_MAP (mq_timedreceive); + SYSCALL_MAP (mq_notify); + SYSCALL_MAP (mq_getsetattr); + SYSCALL_MAP (msgget); + SYSCALL_MAP (msgctl); + SYSCALL_MAP (msgrcv); + SYSCALL_MAP (msgsnd); + SYSCALL_MAP (semget); + SYSCALL_MAP (semctl); + SYSCALL_MAP (semtimedop); + SYSCALL_MAP (semop); + SYSCALL_MAP (shmget); + SYSCALL_MAP (shmctl); + SYSCALL_MAP (shmat); + SYSCALL_MAP (shmdt); + SYSCALL_MAP (socket); + SYSCALL_MAP (socketpair); + SYSCALL_MAP (bind); + SYSCALL_MAP (listen); + SYSCALL_MAP (accept); + SYSCALL_MAP (connect); + SYSCALL_MAP (getsockname); + SYSCALL_MAP (getpeername); + SYSCALL_MAP (sendto); + SYSCALL_MAP (recvfrom); + SYSCALL_MAP (setsockopt); + SYSCALL_MAP (getsockopt); + SYSCALL_MAP (shutdown); + SYSCALL_MAP (sendmsg); + SYSCALL_MAP (recvmsg); + SYSCALL_MAP (readahead); + SYSCALL_MAP (brk); + SYSCALL_MAP (munmap); + SYSCALL_MAP (mremap); + SYSCALL_MAP (add_key); + SYSCALL_MAP (request_key); + SYSCALL_MAP (keyctl); + SYSCALL_MAP (clone); + SYSCALL_MAP (execve); + + case loongarch_sys_mmap: + return gdb_sys_mmap2; + + SYSCALL_MAP (fadvise64); + SYSCALL_MAP (swapon); + SYSCALL_MAP (swapoff); + SYSCALL_MAP (mprotect); + SYSCALL_MAP (msync); + SYSCALL_MAP (mlock); + SYSCALL_MAP (munlock); + SYSCALL_MAP (mlockall); + SYSCALL_MAP (munlockall); + SYSCALL_MAP (mincore); + SYSCALL_MAP (madvise); + SYSCALL_MAP (remap_file_pages); + SYSCALL_MAP (mbind); + SYSCALL_MAP (get_mempolicy); + SYSCALL_MAP (set_mempolicy); + SYSCALL_MAP (migrate_pages); + SYSCALL_MAP (move_pages); + UNSUPPORTED_SYSCALL_MAP (rt_tgsigqueueinfo); + UNSUPPORTED_SYSCALL_MAP (perf_event_open); + UNSUPPORTED_SYSCALL_MAP (accept4); + UNSUPPORTED_SYSCALL_MAP (recvmmsg); + SYSCALL_MAP (wait4); + UNSUPPORTED_SYSCALL_MAP (prlimit64); + UNSUPPORTED_SYSCALL_MAP (fanotify_init); + UNSUPPORTED_SYSCALL_MAP (fanotify_mark); + UNSUPPORTED_SYSCALL_MAP (name_to_handle_at); + UNSUPPORTED_SYSCALL_MAP (open_by_handle_at); + UNSUPPORTED_SYSCALL_MAP (clock_adjtime); + UNSUPPORTED_SYSCALL_MAP (syncfs); + UNSUPPORTED_SYSCALL_MAP (setns); + UNSUPPORTED_SYSCALL_MAP (sendmmsg); + UNSUPPORTED_SYSCALL_MAP (process_vm_readv); + UNSUPPORTED_SYSCALL_MAP (process_vm_writev); + UNSUPPORTED_SYSCALL_MAP (kcmp); + UNSUPPORTED_SYSCALL_MAP (finit_module); + UNSUPPORTED_SYSCALL_MAP (sched_setattr); + UNSUPPORTED_SYSCALL_MAP (sched_getattr); + UNSUPPORTED_SYSCALL_MAP (renameat2); + UNSUPPORTED_SYSCALL_MAP (seccomp); + SYSCALL_MAP (getrandom); + UNSUPPORTED_SYSCALL_MAP (memfd_create); + UNSUPPORTED_SYSCALL_MAP (bpf); + UNSUPPORTED_SYSCALL_MAP (execveat); + UNSUPPORTED_SYSCALL_MAP (userfaultfd); + UNSUPPORTED_SYSCALL_MAP (membarrier); + UNSUPPORTED_SYSCALL_MAP (mlock2); + UNSUPPORTED_SYSCALL_MAP (copy_file_range); + UNSUPPORTED_SYSCALL_MAP (preadv2); + UNSUPPORTED_SYSCALL_MAP (pwritev2); + UNSUPPORTED_SYSCALL_MAP (pkey_mprotect); + UNSUPPORTED_SYSCALL_MAP (pkey_alloc); + UNSUPPORTED_SYSCALL_MAP (pkey_free); + SYSCALL_MAP (statx); + UNSUPPORTED_SYSCALL_MAP (io_pgetevents); + UNSUPPORTED_SYSCALL_MAP (rseq); + UNSUPPORTED_SYSCALL_MAP (kexec_file_load); + UNSUPPORTED_SYSCALL_MAP (pidfd_send_signal); + UNSUPPORTED_SYSCALL_MAP (io_uring_setup); + UNSUPPORTED_SYSCALL_MAP (io_uring_enter); + UNSUPPORTED_SYSCALL_MAP (io_uring_register); + UNSUPPORTED_SYSCALL_MAP (open_tree); + UNSUPPORTED_SYSCALL_MAP (move_mount); + UNSUPPORTED_SYSCALL_MAP (fsopen); + UNSUPPORTED_SYSCALL_MAP (fsconfig); + UNSUPPORTED_SYSCALL_MAP (fsmount); + UNSUPPORTED_SYSCALL_MAP (fspick); + UNSUPPORTED_SYSCALL_MAP (pidfd_open); + UNSUPPORTED_SYSCALL_MAP (clone3); + UNSUPPORTED_SYSCALL_MAP (close_range); + UNSUPPORTED_SYSCALL_MAP (openat2); + UNSUPPORTED_SYSCALL_MAP (pidfd_getfd); + UNSUPPORTED_SYSCALL_MAP (faccessat2); + UNSUPPORTED_SYSCALL_MAP (process_madvise); + UNSUPPORTED_SYSCALL_MAP (epoll_pwait2); + UNSUPPORTED_SYSCALL_MAP (mount_setattr); + UNSUPPORTED_SYSCALL_MAP (quotactl_fd); + UNSUPPORTED_SYSCALL_MAP (landlock_create_ruleset); + UNSUPPORTED_SYSCALL_MAP (landlock_add_rule); + UNSUPPORTED_SYSCALL_MAP (landlock_restrict_self); + UNSUPPORTED_SYSCALL_MAP (process_mrelease); + UNSUPPORTED_SYSCALL_MAP (futex_waitv); + UNSUPPORTED_SYSCALL_MAP (set_mempolicy_home_node); + UNSUPPORTED_SYSCALL_MAP (cachestat); + UNSUPPORTED_SYSCALL_MAP (fchmodat2); + UNSUPPORTED_SYSCALL_MAP (map_shadow_stack); + UNSUPPORTED_SYSCALL_MAP (futex_wake); + UNSUPPORTED_SYSCALL_MAP (futex_wait); + UNSUPPORTED_SYSCALL_MAP (futex_requeue); + UNSUPPORTED_SYSCALL_MAP (statmount); + UNSUPPORTED_SYSCALL_MAP (listmount); + UNSUPPORTED_SYSCALL_MAP (lsm_get_self_attr); + UNSUPPORTED_SYSCALL_MAP (lsm_set_self_attr); + UNSUPPORTED_SYSCALL_MAP (lsm_list_modules); + UNSUPPORTED_SYSCALL_MAP (mseal); + UNSUPPORTED_SYSCALL_MAP (syscalls); + default: + return gdb_sys_no_syscall; + } +#undef SYSCALL_MAP +#undef UNSUPPORTED_SYSCALL_MAP +} + +static int +loongarch_record_all_but_pc_registers (struct regcache *regcache) +{ + + /* Record General purpose Registers. */ + for (int i = 0; i < 32; ++i) + if (record_full_arch_list_add_reg (regcache, i)) + return -1; + + /* Record orig_a0 */ + if (record_full_arch_list_add_reg (regcache, LOONGARCH_ORIG_A0_REGNUM)) + return -1; + + /* Record badvaddr */ + if (record_full_arch_list_add_reg (regcache, LOONGARCH_BADV_REGNUM)) + return -1; + + return 0; +} + +/* Handler for LoongArch architechture system call instruction recording. */ + +static int +loongarch_linux_syscall_record (struct regcache *regcache, + unsigned long syscall_number) +{ + int ret = 0; + enum gdb_syscall syscall_gdb; + + syscall_gdb = + loongarch_canonicalize_syscall ((enum loongarch_syscall) syscall_number); + + if (syscall_gdb < 0) + { + gdb_printf (gdb_stderr, + _("Process record and replay target doesn't " + "support syscall number %s\n"), plongest (syscall_number)); + return -1; + } + + if (syscall_gdb == gdb_sys_sigreturn || syscall_gdb == gdb_sys_rt_sigreturn) + return loongarch_record_all_but_pc_registers (regcache); + + ret = record_linux_system_call (syscall_gdb, regcache, + &loongarch_linux_record_tdep); + + if (ret != 0) + return ret; + + /* Record the return value of the system call. */ + if (record_full_arch_list_add_reg (regcache, LOONGARCH_A0_REGNUM)) + return -1; + + return 0; +} + +/* Initialize the loongarch_linux_record_tdep. These values are the size + of the type that will be used in a system call. They are obtained from + Linux Kernel source. */ + +static void +init_loongarch_linux_record_tdep (struct gdbarch *gdbarch) +{ + loongarch_linux_record_tdep.size_pointer + = gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT; + loongarch_linux_record_tdep.size_tms = 32; + loongarch_linux_record_tdep.size_loff_t = 8; + loongarch_linux_record_tdep.size_flock = 32; + loongarch_linux_record_tdep.size_oldold_utsname = 45; + loongarch_linux_record_tdep.size_ustat = 32; + loongarch_linux_record_tdep.size_old_sigaction = 32; + loongarch_linux_record_tdep.size_old_sigset_t = 8; + loongarch_linux_record_tdep.size_rlimit = 16; + loongarch_linux_record_tdep.size_rusage = 144; + loongarch_linux_record_tdep.size_timeval = 16; + loongarch_linux_record_tdep.size_timezone = 8; + loongarch_linux_record_tdep.size_old_gid_t = 4; + loongarch_linux_record_tdep.size_old_uid_t = 4; + loongarch_linux_record_tdep.size_fd_set = 128; + loongarch_linux_record_tdep.size_old_dirent = 280; + loongarch_linux_record_tdep.size_statfs = 120; + loongarch_linux_record_tdep.size_statfs64 = 120; + loongarch_linux_record_tdep.size_sockaddr = 16; + loongarch_linux_record_tdep.size_int + = gdbarch_int_bit (gdbarch) / TARGET_CHAR_BIT; + loongarch_linux_record_tdep.size_long + = gdbarch_long_bit (gdbarch) / TARGET_CHAR_BIT; + loongarch_linux_record_tdep.size_ulong + = gdbarch_long_bit (gdbarch) / TARGET_CHAR_BIT; + loongarch_linux_record_tdep.size_msghdr = 56; + loongarch_linux_record_tdep.size_itimerval = 32; + loongarch_linux_record_tdep.size_stat = 144; + loongarch_linux_record_tdep.size_old_utsname = 325; + loongarch_linux_record_tdep.size_sysinfo = 112; + loongarch_linux_record_tdep.size_msqid_ds = 120; + loongarch_linux_record_tdep.size_shmid_ds = 112; + loongarch_linux_record_tdep.size_new_utsname = 390; + loongarch_linux_record_tdep.size_timex = 208; + loongarch_linux_record_tdep.size_mem_dqinfo = 72; + loongarch_linux_record_tdep.size_if_dqblk = 72; + loongarch_linux_record_tdep.size_fs_quota_stat = 80; + loongarch_linux_record_tdep.size_timespec = 16; + loongarch_linux_record_tdep.size_pollfd = 8; + loongarch_linux_record_tdep.size_NFS_FHSIZE = 32; + loongarch_linux_record_tdep.size_knfsd_fh = 132; + loongarch_linux_record_tdep.size_TASK_COMM_LEN = 16; + loongarch_linux_record_tdep.size_sigaction = 24; + loongarch_linux_record_tdep.size_sigset_t = 8; + loongarch_linux_record_tdep.size_siginfo_t = 128; + loongarch_linux_record_tdep.size_cap_user_data_t = 8; + loongarch_linux_record_tdep.size_stack_t = 24; + loongarch_linux_record_tdep.size_off_t = 8; + loongarch_linux_record_tdep.size_stat64 = 144; + loongarch_linux_record_tdep.size_gid_t = 4; + loongarch_linux_record_tdep.size_uid_t = 4; + loongarch_linux_record_tdep.size_PAGE_SIZE = 0x4000; + loongarch_linux_record_tdep.size_flock64 = 32; + loongarch_linux_record_tdep.size_user_desc = 16; + loongarch_linux_record_tdep.size_io_event = 32; + loongarch_linux_record_tdep.size_iocb = 64; + loongarch_linux_record_tdep.size_epoll_event = 12; + loongarch_linux_record_tdep.size_itimerspec = 32; + loongarch_linux_record_tdep.size_mq_attr = 64; + loongarch_linux_record_tdep.size_termios = 36; + loongarch_linux_record_tdep.size_termios2 = 44; + loongarch_linux_record_tdep.size_pid_t = 4; + loongarch_linux_record_tdep.size_winsize = 8; + loongarch_linux_record_tdep.size_serial_struct = 72; + loongarch_linux_record_tdep.size_serial_icounter_struct = 80; + loongarch_linux_record_tdep.size_hayes_esp_config = 12; + loongarch_linux_record_tdep.size_size_t = 8; + loongarch_linux_record_tdep.size_iovec = 16; + loongarch_linux_record_tdep.size_time_t = 8; + + /* These values are the second argument of system call "sys_ioctl". + They are obtained from Linux Kernel source. */ + loongarch_linux_record_tdep.ioctl_TCGETS = 0x5401; + loongarch_linux_record_tdep.ioctl_TCSETS = 0x5402; + loongarch_linux_record_tdep.ioctl_TCSETSW = 0x5403; + loongarch_linux_record_tdep.ioctl_TCSETSF = 0x5404; + loongarch_linux_record_tdep.ioctl_TCGETA = 0x5405; + loongarch_linux_record_tdep.ioctl_TCSETA = 0x5406; + loongarch_linux_record_tdep.ioctl_TCSETAW = 0x5407; + loongarch_linux_record_tdep.ioctl_TCSETAF = 0x5408; + loongarch_linux_record_tdep.ioctl_TCSBRK = 0x5409; + loongarch_linux_record_tdep.ioctl_TCXONC = 0x540a; + loongarch_linux_record_tdep.ioctl_TCFLSH = 0x540b; + loongarch_linux_record_tdep.ioctl_TIOCEXCL = 0x540c; + loongarch_linux_record_tdep.ioctl_TIOCNXCL = 0x540d; + loongarch_linux_record_tdep.ioctl_TIOCSCTTY = 0x540e; + loongarch_linux_record_tdep.ioctl_TIOCGPGRP = 0x540f; + loongarch_linux_record_tdep.ioctl_TIOCSPGRP = 0x5410; + loongarch_linux_record_tdep.ioctl_TIOCOUTQ = 0x5411; + loongarch_linux_record_tdep.ioctl_TIOCSTI = 0x5412; + loongarch_linux_record_tdep.ioctl_TIOCGWINSZ = 0x5413; + loongarch_linux_record_tdep.ioctl_TIOCSWINSZ = 0x5414; + loongarch_linux_record_tdep.ioctl_TIOCMGET = 0x5415; + loongarch_linux_record_tdep.ioctl_TIOCMBIS = 0x5416; + loongarch_linux_record_tdep.ioctl_TIOCMBIC = 0x5417; + loongarch_linux_record_tdep.ioctl_TIOCMSET = 0x5418; + loongarch_linux_record_tdep.ioctl_TIOCGSOFTCAR = 0x5419; + loongarch_linux_record_tdep.ioctl_TIOCSSOFTCAR = 0x541a; + loongarch_linux_record_tdep.ioctl_FIONREAD = 0x541b; + loongarch_linux_record_tdep.ioctl_TIOCINQ = 0x541b; + loongarch_linux_record_tdep.ioctl_TIOCLINUX = 0x541c; + loongarch_linux_record_tdep.ioctl_TIOCCONS = 0x541d; + loongarch_linux_record_tdep.ioctl_TIOCGSERIAL = 0x541e; + loongarch_linux_record_tdep.ioctl_TIOCSSERIAL = 0x541f; + loongarch_linux_record_tdep.ioctl_TIOCPKT = 0x5420; + loongarch_linux_record_tdep.ioctl_FIONBIO = 0x5421; + loongarch_linux_record_tdep.ioctl_TIOCNOTTY = 0x5422; + loongarch_linux_record_tdep.ioctl_TIOCSETD = 0x5423; + loongarch_linux_record_tdep.ioctl_TIOCGETD = 0x5424; + loongarch_linux_record_tdep.ioctl_TCSBRKP = 0x5425; + loongarch_linux_record_tdep.ioctl_TIOCTTYGSTRUCT = 0x5426; + loongarch_linux_record_tdep.ioctl_TIOCSBRK = 0x5427; + loongarch_linux_record_tdep.ioctl_TIOCCBRK = 0x5428; + loongarch_linux_record_tdep.ioctl_TIOCGSID = 0x5429; + loongarch_linux_record_tdep.ioctl_TCGETS2 = 0x802c542a; + loongarch_linux_record_tdep.ioctl_TCSETS2 = 0x402c542b; + loongarch_linux_record_tdep.ioctl_TCSETSW2 = 0x402c542c; + loongarch_linux_record_tdep.ioctl_TCSETSF2 = 0x402c542d; + loongarch_linux_record_tdep.ioctl_TIOCGPTN = 0x80045430; + loongarch_linux_record_tdep.ioctl_TIOCSPTLCK = 0x40045431; + loongarch_linux_record_tdep.ioctl_FIONCLEX = 0x5450; + loongarch_linux_record_tdep.ioctl_FIOCLEX = 0x5451; + loongarch_linux_record_tdep.ioctl_FIOASYNC = 0x5452; + loongarch_linux_record_tdep.ioctl_TIOCSERCONFIG = 0x5453; + loongarch_linux_record_tdep.ioctl_TIOCSERGWILD = 0x5454; + loongarch_linux_record_tdep.ioctl_TIOCSERSWILD = 0x5455; + loongarch_linux_record_tdep.ioctl_TIOCGLCKTRMIOS = 0x5456; + loongarch_linux_record_tdep.ioctl_TIOCSLCKTRMIOS = 0x5457; + loongarch_linux_record_tdep.ioctl_TIOCSERGSTRUCT = 0x5458; + loongarch_linux_record_tdep.ioctl_TIOCSERGETLSR = 0x5459; + loongarch_linux_record_tdep.ioctl_TIOCSERGETMULTI = 0x545a; + loongarch_linux_record_tdep.ioctl_TIOCSERSETMULTI = 0x545b; + loongarch_linux_record_tdep.ioctl_TIOCMIWAIT = 0x545c; + loongarch_linux_record_tdep.ioctl_TIOCGICOUNT = 0x545d; + loongarch_linux_record_tdep.ioctl_TIOCGHAYESESP = 0x545e; + loongarch_linux_record_tdep.ioctl_TIOCSHAYESESP = 0x545f; + loongarch_linux_record_tdep.ioctl_FIOQSIZE = 0x5460; + + /* These values are the second argument of system call "sys_fcntl" + and "sys_fcntl64". They are obtained from Linux Kernel source. */ + loongarch_linux_record_tdep.fcntl_F_GETLK = 5; + loongarch_linux_record_tdep.fcntl_F_GETLK64 = 12; + loongarch_linux_record_tdep.fcntl_F_SETLK64 = 13; + loongarch_linux_record_tdep.fcntl_F_SETLKW64 = 14; + + loongarch_linux_record_tdep.arg1 = LOONGARCH_A0_REGNUM + 0; + loongarch_linux_record_tdep.arg2 = LOONGARCH_A0_REGNUM + 1; + loongarch_linux_record_tdep.arg3 = LOONGARCH_A0_REGNUM + 2; + loongarch_linux_record_tdep.arg4 = LOONGARCH_A0_REGNUM + 3; + loongarch_linux_record_tdep.arg5 = LOONGARCH_A0_REGNUM + 4; + loongarch_linux_record_tdep.arg6 = LOONGARCH_A0_REGNUM + 5; + loongarch_linux_record_tdep.arg7 = LOONGARCH_A0_REGNUM + 6; +} + /* Initialize LoongArch Linux ABI info. */ static void @@ -605,6 +1168,10 @@ loongarch_linux_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch) /* Reversible debugging, process record. */ set_gdbarch_process_record (gdbarch, loongarch_process_record); + + /* Syscall record. */ + tdep->loongarch_syscall_record = loongarch_linux_syscall_record; + init_loongarch_linux_record_tdep (gdbarch); } /* Initialize LoongArch Linux target support. */ diff --git a/gdb/loongarch-tdep.c b/gdb/loongarch-tdep.c index c1b3a1f239c..e91a69b73b9 100644 --- a/gdb/loongarch-tdep.c +++ b/gdb/loongarch-tdep.c @@ -2312,6 +2312,22 @@ loongarch_record_special_insn (loongarch_record_s *loongarch_record) return LOONGARCH_RECORD_SUCCESS; } +/* Record handler for syscall instructions. */ + +static int +loongarch_record_syscall_insn (loongarch_record_s *loongarch_record) +{ + uint64_t syscall_number; + struct loongarch_gdbarch_tdep *tdep + = gdbarch_tdep (loongarch_record->gdbarch); + + regcache_raw_read_unsigned (loongarch_record->regcache, LOONGARCH_A7_REGNUM, + &syscall_number); + + return tdep->loongarch_syscall_record (loongarch_record->regcache, + syscall_number); +} + /* Decode insns type and invoke its record handler. */ static int @@ -2335,6 +2351,8 @@ loongarch_record_decode_insn_handler (loongarch_record_s *loongarch_record) return loongarch_record_bound_check_load_insn (loongarch_record); else if (is_bound_check_store_insn (loongarch_record->insn)) return loongarch_record_bound_check_store_insn (loongarch_record); + else if (is_syscall_insn (loongarch_record->insn)) + return loongarch_record_syscall_insn (loongarch_record); return LOONGARCH_RECORD_UNSUPPORTED; } diff --git a/gdb/loongarch-tdep.h b/gdb/loongarch-tdep.h index a148363c795..62f7edc1c45 100644 --- a/gdb/loongarch-tdep.h +++ b/gdb/loongarch-tdep.h @@ -40,6 +40,10 @@ struct loongarch_gdbarch_tdep : gdbarch_tdep_base /* Features about the abi that impact how the gdbarch is configured. */ struct loongarch_gdbarch_features abi_features; + /* syscall record. */ + int (*loongarch_syscall_record) (struct regcache *regcache, + unsigned long syscall_number) = nullptr; + /* Return the expected next PC if FRAME is stopped at a syscall instruction. */ CORE_ADDR (*syscall_next_pc) (const frame_info_ptr &frame) = nullptr; }; From patchwork Fri Nov 22 09:06:24 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hui Li X-Patchwork-Id: 101725 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id AB8FD3857001 for ; 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a=rsa-sha256; d=sourceware.org; s=key; t=1732266394; c=relaxed/simple; bh=YFR26ExuN1HLvav8yI8eEphX4BGNWe8DXEOaieyJuLw=; h=From:To:Subject:Date:Message-Id:MIME-Version; b=BsVWLc7PaPkCzs7yuou4MWfcLu7Oic9r3TtOiSQ9KqFe4FoDVaJXFmb9N0IZ6i1Ma+pxoSKh6+YqndSgHbM7GSfXk10jaGVGE0QcrR78k6itFPJt/U2hKbU42Kl/SeWMzg85r+kzORTf2gZi0HVqKyrx63QGIiv5lv5crkx9kBE= ARC-Authentication-Results: i=1; server2.sourceware.org DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 9F1F3385780C Received: from loongson.cn (unknown [113.200.148.30]) by gateway (Coremail) with SMTP id _____8CxPuOYSUBnu+9FAA--.5163S3; Fri, 22 Nov 2024 17:06:32 +0800 (CST) Received: from localhost.localdomain (unknown [113.200.148.30]) by front1 (Coremail) with SMTP id qMiowMAxFMCRSUBn8ORiAA--.35644S6; Fri, 22 Nov 2024 17:06:31 +0800 (CST) From: Hui Li To: gdb-patches@sourceware.org Cc: Tiezhu Yang Subject: [PATCH v2 4/4] gdb: Add LoongArch process record/replay support in NEWS and doc Date: Fri, 22 Nov 2024 17:06:24 +0800 Message-Id: <20241122090624.2355-5-lihui@loongson.cn> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20241122090624.2355-1-lihui@loongson.cn> References: <20241122090624.2355-1-lihui@loongson.cn> MIME-Version: 1.0 X-CM-TRANSID: qMiowMAxFMCRSUBn8ORiAA--.35644S6 X-CM-SenderInfo: 5olk3xo6or00hjvr0hdfq/ X-Coremail-Antispam: 1Uk129KBj93XoW7CF4DGryUtr18JF1fZr1kWFX_yoW8GF1fpa yxGw1fGrWkt3sI9rn5J3ykX3WaqryfGrW7Gaya9a45Grs5Ja4jq348Kw1YvwnxXF4Ska1a q3ZrJr4fWa9rXacCm3ZEXasCq-sJn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7ZEXa sCq-sGcSsGvfJ3Ic02F40EFcxC0VAKzVAqx4xG6I80ebIjqfuFe4nvWSU5nxnvy29KBjDU 0xBIdaVrnRJUUUk2b4IE77IF4wAFF20E14v26r1j6r4UM7CY07I20VC2zVCF04k26cxKx2 IYs7xG6rWj6s0DM7CIcVAFz4kK6r1j6r18M28lY4IEw2IIxxk0rwA2F7IY1VAKz4vEj48v e4kI8wA2z4x0Y4vE2Ix0cI8IcVAFwI0_JFI_Gr1l84ACjcxK6xIIjxv20xvEc7CjxVAFwI 0_Jr0_Gr1l84ACjcxK6I8E87Iv67AKxVW8Jr0_Cr1UM28EF7xvwVC2z280aVCY1x0267AK xVW8Jr0_Cr1UM2AIxVAIcxkEcVAq07x20xvEncxIr21l57IF6xkI12xvs2x26I8E6xACxx 1l5I8CrVACY4xI64kE6c02F40Ex7xfMcIj6xIIjxv20xvE14v26r126r1DMcIj6I8E87Iv 67AKxVWxJVW8Jr1lOx8S6xCaFVCjc4AY6r1j6r4UM4x0Y48IcxkI7VAKI48JMxAIw28Icx kI7VAKI48JMxC20s026xCaFVCjc4AY6r1j6r4UMI8I3I0E5I8CrVAFwI0_Jr0_Jr4lx2Iq xVCjr7xvwVAFwI0_JrI_JrWlx4CE17CEb7AF67AKxVWUXVWUAwCIc40Y0x0EwIxGrwCI42 IY6xIIjxv20xvE14v26r1j6r1xMIIF0xvE2Ix0cI8IcVCY1x0267AKxVWUJVW8JwCI42IY 6xAIw20EY4v20xvaj40_Jr0_JF4lIxAIcVC2z280aVAFwI0_Jr0_Gr1lIxAIcVC2z280aV CY1x0267AKxVWUJVW8JbIYCTnIWIevJa73UjIFyTuYvjxUrxhLUUUUU X-Spam-Status: No, score=-12.2 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gdb-patches-bounces~patchwork=sourceware.org@sourceware.org At present, process record/replay and reverse debugging has been implemented on LoongArch. Update the NEWS and doc to record this new change. Signed-off-by: Hui Li Reviewed-By: Eli Zaretskii --- gdb/NEWS | 3 +++ gdb/doc/gdb.texinfo | 2 +- 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/gdb/NEWS b/gdb/NEWS index f3c5d720b15..6009ee8d6ce 100644 --- a/gdb/NEWS +++ b/gdb/NEWS @@ -56,6 +56,9 @@ * The Ada 'Object_Size attribute is now supported. +* Support for process record/replay and reverse debugging on loongarch*-linux* + targets has been added. + * Python API ** Added gdb.record.clear. Clears the trace data of the current recording. diff --git a/gdb/doc/gdb.texinfo b/gdb/doc/gdb.texinfo index b91b5d693ed..dc2933f213e 100644 --- a/gdb/doc/gdb.texinfo +++ b/gdb/doc/gdb.texinfo @@ -7759,7 +7759,7 @@ previous instruction; otherwise, it will work in record mode, if the platform supports reverse execution, or stop if not. Currently, process record and replay is supported on ARM, Aarch64, -Moxie, PowerPC, PowerPC64, S/390, and x86 (i386/amd64) running +LoongArch, Moxie, PowerPC, PowerPC64, S/390, and x86 (i386/amd64) running GNU/Linux. Process record and replay can be used both when native debugging, and when remote debugging via @code{gdbserver}.