From patchwork Tue Oct 29 08:25:17 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Li, Pan2" X-Patchwork-Id: 99745 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id DD50D3858404 for ; Tue, 29 Oct 2024 08:28:19 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.18]) by sourceware.org (Postfix) with ESMTPS id EF64A3858C98 for ; Tue, 29 Oct 2024 08:27:15 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org EF64A3858C98 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=intel.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org EF64A3858C98 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=198.175.65.18 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1730190446; cv=none; b=luumO256vUp8LFVN7UaBUpOGefmGUCyOikJ27Xb+YYv3h7bCqs1yNTb1Kfz34wIzJHmOanaeFi5ox+8x0BtYG8LERl2c/XV1OjZUbd8UVW6lQwM7m20+OMs+LtTSoC5kGils7kda2c42HE0gv8y21ONQBGSVeAuqtU+/F623AVI= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1730190446; c=relaxed/simple; bh=fowuDC1MeZgEv91YRV/9WKd3a53HfXqLOQVyHhxDtK0=; h=DKIM-Signature:From:To:Subject:Date:Message-ID:MIME-Version; b=Hm5pIwGQVIlUeB77t7dD9rab33RbNEFBOuAQh15HTGn/Gxej26+I5Bc/+ZUC/qzWE4jvyMOaAaTI6yG/9KsVJCIefEt1cl0L1gxF8f6PATFZO9SyFSS86rhJavmSQdgGvI6DLHtOg+a2NNWcaGOAcpP6VM+rL0piho1ohw6E/Q0= ARC-Authentication-Results: i=1; server2.sourceware.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1730190436; x=1761726436; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=fowuDC1MeZgEv91YRV/9WKd3a53HfXqLOQVyHhxDtK0=; b=hQK/LCPnPreuKBhoDt+u6XFhw9FDx5pyFdJ2as325XCusrMfZNV8vnhR mLFg0zbxsK0X/erHx+2nQsEZgy6tISL3mfii/afUVANqau266rAQ4t8qs QYb4ySzqGPlbTXKn8Wk9ovwT4gIUrWRvBdP+1HihABAy2QicEX7+ez3ku LS+z46LELtufkYiSk3FJqA5QH3/3cJCzn7zlLrTKOFn/9LH+wbQy92Cx+ 1I95u8NPpWAUNZ3L+AGatKmgc+BgsSDDYGaIjRGsQU1tdfLOwOQKlw6xs C43unehtgcd3KORlrH4rs7KheN733PDToWxFMAZl2j0qD2nRx0gNjMXS0 w==; X-CSE-ConnectionGUID: Uh2RPhbISua8ZqFuJZOfng== X-CSE-MsgGUID: g9ToRBYCQoOuv7LWCZNhSA== X-IronPort-AV: E=McAfee;i="6700,10204,11222"; a="30002088" X-IronPort-AV: E=Sophos;i="6.11,199,1725346800"; d="scan'208";a="30002088" Received: from orviesa005.jf.intel.com ([10.64.159.145]) by orvoesa110.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Oct 2024 01:27:14 -0700 X-CSE-ConnectionGUID: 7zjXNZ4LSomW2VvL/uu34A== X-CSE-MsgGUID: HJafZU3NRZOKs67Uqbjm2Q== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,241,1725346800"; d="scan'208";a="86652623" Received: from panli.sh.intel.com ([10.239.154.73]) by orviesa005.jf.intel.com with ESMTP; 29 Oct 2024 01:27:12 -0700 From: pan2.li@intel.com To: gcc-patches@gcc.gnu.org Cc: richard.guenther@gmail.com, Tamar.Christina@arm.com, juzhe.zhong@rivai.ai, kito.cheng@gmail.com, jeffreyalaw@gmail.com, rdapp.gcc@gmail.com, Pan Li Subject: [PATCH 1/5] Match: Simplify branch form 4 of unsigned SAT_ADD into branchless Date: Tue, 29 Oct 2024 16:25:17 +0800 Message-ID: <20241029082521.3638409-1-pan2.li@intel.com> X-Mailer: git-send-email 2.43.0 MIME-Version: 1.0 X-Spam-Status: No, score=-11.7 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces~patchwork=sourceware.org@gcc.gnu.org From: Pan Li There are sorts of forms for the unsigned SAT_ADD. Some of them are complicated while others are cheap. This patch would like to simplify the complicated form into the cheap ones. For example as below: From the form 4 (branch): SAT_U_ADD = (X + Y) < x ? -1 : (X + Y). To (branchless): SAT_U_ADD = (X + Y) | - ((X + Y) < X). #define T uint8_t T sat_add_u_1 (T x, T y) { return (T)(x + y) < x ? -1 : (x + y); } Before this patch: 1 │ uint8_t sat_add_u_1 (uint8_t x, uint8_t y) 2 │ { 3 │ uint8_t D.2809; 4 │ 5 │ _1 = x + y; 6 │ if (x <= _1) goto ; else goto ; 7 │ : 8 │ D.2809 = x + y; 9 │ goto ; 10 │ : 11 │ D.2809 = 255; 12 │ : 13 │ return D.2809; 14 │ } After this patch: 1 │ uint8_t sat_add_u_1 (uint8_t x, uint8_t y) 2 │ { 3 │ uint8_t D.2809; 4 │ 5 │ _1 = x + y; 6 │ _2 = x + y; 7 │ _3 = x > _2; 8 │ _4 = (unsigned char) _3; 9 │ _5 = -_4; 10 │ D.2809 = _1 | _5; 11 │ return D.2809; 12 │ } The below test suites are passed for this patch. * The rv64gcv fully regression test. * The x86 bootstrap test. * The x86 fully regression test. gcc/ChangeLog: * match.pd: Remove unsigned branch form 4 for SAT_ADD, and add simplify to branchless instead. gcc/testsuite/ChangeLog: * gcc.dg/tree-ssa/sat_u_add-simplify-2-u16.c: New test. * gcc.dg/tree-ssa/sat_u_add-simplify-2-u32.c: New test. * gcc.dg/tree-ssa/sat_u_add-simplify-2-u64.c: New test. * gcc.dg/tree-ssa/sat_u_add-simplify-2-u8.c: New test. Signed-off-by: Pan Li --- gcc/match.pd | 11 +++++++---- .../gcc.dg/tree-ssa/sat_u_add-simplify-2-u16.c | 15 +++++++++++++++ .../gcc.dg/tree-ssa/sat_u_add-simplify-2-u32.c | 15 +++++++++++++++ .../gcc.dg/tree-ssa/sat_u_add-simplify-2-u64.c | 15 +++++++++++++++ .../gcc.dg/tree-ssa/sat_u_add-simplify-2-u8.c | 15 +++++++++++++++ 5 files changed, 67 insertions(+), 4 deletions(-) create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/sat_u_add-simplify-2-u16.c create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/sat_u_add-simplify-2-u32.c create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/sat_u_add-simplify-2-u64.c create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/sat_u_add-simplify-2-u8.c diff --git a/gcc/match.pd b/gcc/match.pd index 809c717bc86..4d1143b6ec3 100644 --- a/gcc/match.pd +++ b/gcc/match.pd @@ -3154,10 +3154,13 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT) && types_match (type, @0, @1)) (bit_ior @2 (negate (convert (lt @2 @0)))))) -/* Unsigned saturation add, case 4 (branch with lt): - SAT_U_ADD = (X + Y) < x ? -1 : (X + Y). */ -(match (unsigned_integer_sat_add @0 @1) - (cond^ (lt (usadd_left_part_1@2 @0 @1) @0) integer_minus_onep @2)) +/* Simplify SAT_U_ADD to the cheap form + From: SAT_U_ADD = (X + Y) < x ? -1 : (X + Y). + To: SAT_U_ADD = (X + Y) | - ((X + Y) < X). */ +(simplify (cond (lt (plus:c@2 @0 @1) @0) integer_minus_onep @2) + (if (INTEGRAL_TYPE_P (type) && TYPE_UNSIGNED (type) + && types_match (type, @0, @1)) + (bit_ior @2 (negate (convert (lt @2 @0)))))) /* Unsigned saturation add, case 5 (branch with eq .ADD_OVERFLOW): SAT_U_ADD = REALPART_EXPR <.ADD_OVERFLOW> == 0 ? .ADD_OVERFLOW : -1. */ diff --git a/gcc/testsuite/gcc.dg/tree-ssa/sat_u_add-simplify-2-u16.c b/gcc/testsuite/gcc.dg/tree-ssa/sat_u_add-simplify-2-u16.c new file mode 100644 index 00000000000..6e327f58d46 --- /dev/null +++ b/gcc/testsuite/gcc.dg/tree-ssa/sat_u_add-simplify-2-u16.c @@ -0,0 +1,15 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -fdump-tree-gimple-details" } */ + +#include + +#define T uint16_t + +T sat_add_u_1 (T x, T y) +{ + return (T)(x + y) < x ? -1 : (x + y); +} + +/* { dg-final { scan-tree-dump-not " if " "gimple" } } */ +/* { dg-final { scan-tree-dump-not " else " "gimple" } } */ +/* { dg-final { scan-tree-dump-not " goto " "gimple" } } */ diff --git a/gcc/testsuite/gcc.dg/tree-ssa/sat_u_add-simplify-2-u32.c b/gcc/testsuite/gcc.dg/tree-ssa/sat_u_add-simplify-2-u32.c new file mode 100644 index 00000000000..17b09396b69 --- /dev/null +++ b/gcc/testsuite/gcc.dg/tree-ssa/sat_u_add-simplify-2-u32.c @@ -0,0 +1,15 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -fdump-tree-gimple-details" } */ + +#include + +#define T uint32_t + +T sat_add_u_1 (T x, T y) +{ + return (T)(x + y) < x ? -1 : (x + y); +} + +/* { dg-final { scan-tree-dump-not " if " "gimple" } } */ +/* { dg-final { scan-tree-dump-not " else " "gimple" } } */ +/* { dg-final { scan-tree-dump-not " goto " "gimple" } } */ diff --git a/gcc/testsuite/gcc.dg/tree-ssa/sat_u_add-simplify-2-u64.c b/gcc/testsuite/gcc.dg/tree-ssa/sat_u_add-simplify-2-u64.c new file mode 100644 index 00000000000..8db9b427a65 --- /dev/null +++ b/gcc/testsuite/gcc.dg/tree-ssa/sat_u_add-simplify-2-u64.c @@ -0,0 +1,15 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -fdump-tree-gimple-details" } */ + +#include + +#define T uint64_t + +T sat_add_u_1 (T x, T y) +{ + return (T)(x + y) < x ? -1 : (x + y); +} + +/* { dg-final { scan-tree-dump-not " if " "gimple" } } */ +/* { dg-final { scan-tree-dump-not " else " "gimple" } } */ +/* { dg-final { scan-tree-dump-not " goto " "gimple" } } */ diff --git a/gcc/testsuite/gcc.dg/tree-ssa/sat_u_add-simplify-2-u8.c b/gcc/testsuite/gcc.dg/tree-ssa/sat_u_add-simplify-2-u8.c new file mode 100644 index 00000000000..4e86ef9a5fd --- /dev/null +++ b/gcc/testsuite/gcc.dg/tree-ssa/sat_u_add-simplify-2-u8.c @@ -0,0 +1,15 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -fdump-tree-gimple-details" } */ + +#include + +#define T uint8_t + +T sat_add_u_1 (T x, T y) +{ + return (T)(x + y) < x ? -1 : (x + y); +} + +/* { dg-final { scan-tree-dump-not " if " "gimple" } } */ +/* { dg-final { scan-tree-dump-not " else " "gimple" } } */ +/* { dg-final { scan-tree-dump-not " goto " "gimple" } } */ From patchwork Tue Oct 29 08:25:18 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Li, Pan2" X-Patchwork-Id: 99744 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id ADADA3858289 for ; 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a="30002097" X-IronPort-AV: E=Sophos;i="6.11,199,1725346800"; d="scan'208";a="30002097" Received: from orviesa005.jf.intel.com ([10.64.159.145]) by orvoesa110.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Oct 2024 01:27:16 -0700 X-CSE-ConnectionGUID: zKeP2iq/Rp61HtqAFao+GQ== X-CSE-MsgGUID: vaSQ36vxQ8K6Vm8kdFHjog== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,241,1725346800"; d="scan'208";a="86652630" Received: from panli.sh.intel.com ([10.239.154.73]) by orviesa005.jf.intel.com with ESMTP; 29 Oct 2024 01:27:15 -0700 From: pan2.li@intel.com To: gcc-patches@gcc.gnu.org Cc: richard.guenther@gmail.com, Tamar.Christina@arm.com, juzhe.zhong@rivai.ai, kito.cheng@gmail.com, jeffreyalaw@gmail.com, rdapp.gcc@gmail.com, Pan Li Subject: [PATCH 2/5] Match: Simplify branch form 7 of unsigned SAT_ADD into branchless Date: Tue, 29 Oct 2024 16:25:18 +0800 Message-ID: <20241029082521.3638409-2-pan2.li@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20241029082521.3638409-1-pan2.li@intel.com> References: <20241029082521.3638409-1-pan2.li@intel.com> MIME-Version: 1.0 X-Spam-Status: No, score=-11.6 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces~patchwork=sourceware.org@gcc.gnu.org From: Pan Li There are sorts of forms for the unsigned SAT_ADD. Some of them are complicated while others are cheap. This patch would like to simplify the complicated form into the cheap ones. For example as below: From the form 7 (branch): SAT_U_ADD = x <= (T)(x + y) ? (x + y) : -1. To (branchless): SAT_U_ADD = (X + Y) | - ((X + Y) < X). #define T uint8_t T sat_add_u_1 (T x, T y) { return x <= (T)(x + y) ? (x + y) : -1; } Before this patch: 1 │ uint8_t sat_add_u_1 (uint8_t x, uint8_t y) 2 │ { 3 │ uint8_t D.2809; 4 │ 5 │ _1 = x + y; 6 │ if (x <= _1) goto ; else goto ; 7 │ : 8 │ D.2809 = x + y; 9 │ goto ; 10 │ : 11 │ D.2809 = 255; 12 │ : 13 │ return D.2809; 14 │ } After this patch: 1 │ uint8_t sat_add_u_1 (uint8_t x, uint8_t y) 2 │ { 3 │ uint8_t D.2809; 4 │ 5 │ _1 = x + y; 6 │ _2 = x + y; 7 │ _3 = x > _2; 8 │ _4 = (unsigned char) _3; 9 │ _5 = -_4; 10 │ D.2809 = _1 | _5; 11 │ return D.2809; 12 │ } The simplify doesn't need to check if target support the SAT_ADD, it is somehow the optimization in gimple level. The below test suites are passed for this patch. * The rv64gcv fully regression test. * The x86 bootstrap test. * The x86 fully regression test. gcc/ChangeLog: * match.pd: Remove unsigned branch form 7 for SAT_ADD, and add simplify to branchless instead. gcc/testsuite/ChangeLog: * gcc.dg/tree-ssa/sat_u_add-simplify-3-u16.c: New test. * gcc.dg/tree-ssa/sat_u_add-simplify-3-u32.c: New test. * gcc.dg/tree-ssa/sat_u_add-simplify-3-u64.c: New test. * gcc.dg/tree-ssa/sat_u_add-simplify-3-u8.c: New test. Signed-off-by: Pan Li --- gcc/match.pd | 13 ++++++++----- .../gcc.dg/tree-ssa/sat_u_add-simplify-3-u16.c | 15 +++++++++++++++ .../gcc.dg/tree-ssa/sat_u_add-simplify-3-u32.c | 15 +++++++++++++++ .../gcc.dg/tree-ssa/sat_u_add-simplify-3-u64.c | 15 +++++++++++++++ .../gcc.dg/tree-ssa/sat_u_add-simplify-3-u8.c | 15 +++++++++++++++ 5 files changed, 68 insertions(+), 5 deletions(-) create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/sat_u_add-simplify-3-u16.c create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/sat_u_add-simplify-3-u32.c create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/sat_u_add-simplify-3-u64.c create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/sat_u_add-simplify-3-u8.c diff --git a/gcc/match.pd b/gcc/match.pd index 4d1143b6ec3..d871fb8c24e 100644 --- a/gcc/match.pd +++ b/gcc/match.pd @@ -3154,6 +3154,14 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT) && types_match (type, @0, @1)) (bit_ior @2 (negate (convert (lt @2 @0)))))) +/* Simplify SAT_U_ADD to the cheap form + From: SAT_U_ADD = x <= (X + Y) ? (X + Y) : -1. + To: SAT_U_ADD = (X + Y) | - ((X + Y) < X). */ +(simplify (cond (le @0 (plus:c@2 @0 @1)) @2 integer_minus_onep) + (if (INTEGRAL_TYPE_P (type) && TYPE_UNSIGNED (type) + && types_match (type, @0, @1)) + (bit_ior @2 (negate (convert (lt @2 @0)))))) + /* Simplify SAT_U_ADD to the cheap form From: SAT_U_ADD = (X + Y) < x ? -1 : (X + Y). To: SAT_U_ADD = (X + Y) | - ((X + Y) < X). */ @@ -3174,11 +3182,6 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT) (cond^ (ne (imagpart (IFN_ADD_OVERFLOW:c @0 @1)) integer_zerop) integer_minus_onep (usadd_left_part_2 @0 @1))) -/* Unsigned saturation add, case 7 (branch with le): - SAT_ADD = x <= (X + Y) ? (X + Y) : -1. */ -(match (unsigned_integer_sat_add @0 @1) - (cond^ (le @0 (usadd_left_part_1@2 @0 @1)) @2 integer_minus_onep)) - /* Unsigned saturation add, case 8 (branch with gt): SAT_ADD = x > (X + Y) ? -1 : (X + Y). */ (match (unsigned_integer_sat_add @0 @1) diff --git a/gcc/testsuite/gcc.dg/tree-ssa/sat_u_add-simplify-3-u16.c b/gcc/testsuite/gcc.dg/tree-ssa/sat_u_add-simplify-3-u16.c new file mode 100644 index 00000000000..81ebd090a69 --- /dev/null +++ b/gcc/testsuite/gcc.dg/tree-ssa/sat_u_add-simplify-3-u16.c @@ -0,0 +1,15 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -fdump-tree-gimple-details" } */ + +#include + +#define T uint16_t + +T sat_add_u_1 (T x, T y) +{ + return x <= (T)(x + y) ? (x + y) : -1; +} + +/* { dg-final { scan-tree-dump-not " if " "gimple" } } */ +/* { dg-final { scan-tree-dump-not " else " "gimple" } } */ +/* { dg-final { scan-tree-dump-not " goto " "gimple" } } */ diff --git a/gcc/testsuite/gcc.dg/tree-ssa/sat_u_add-simplify-3-u32.c b/gcc/testsuite/gcc.dg/tree-ssa/sat_u_add-simplify-3-u32.c new file mode 100644 index 00000000000..bb026d28219 --- /dev/null +++ b/gcc/testsuite/gcc.dg/tree-ssa/sat_u_add-simplify-3-u32.c @@ -0,0 +1,15 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -fdump-tree-gimple-details" } */ + +#include + +#define T uint32_t + +T sat_add_u_1 (T x, T y) +{ + return x <= (T)(x + y) ? (x + y) : -1; +} + +/* { dg-final { scan-tree-dump-not " if " "gimple" } } */ +/* { dg-final { scan-tree-dump-not " else " "gimple" } } */ +/* { dg-final { scan-tree-dump-not " goto " "gimple" } } */ diff --git a/gcc/testsuite/gcc.dg/tree-ssa/sat_u_add-simplify-3-u64.c b/gcc/testsuite/gcc.dg/tree-ssa/sat_u_add-simplify-3-u64.c new file mode 100644 index 00000000000..bb026d28219 --- /dev/null +++ b/gcc/testsuite/gcc.dg/tree-ssa/sat_u_add-simplify-3-u64.c @@ -0,0 +1,15 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -fdump-tree-gimple-details" } */ + +#include + +#define T uint32_t + +T sat_add_u_1 (T x, T y) +{ + return x <= (T)(x + y) ? (x + y) : -1; +} + +/* { dg-final { scan-tree-dump-not " if " "gimple" } } */ +/* { dg-final { scan-tree-dump-not " else " "gimple" } } */ +/* { dg-final { scan-tree-dump-not " goto " "gimple" } } */ diff --git a/gcc/testsuite/gcc.dg/tree-ssa/sat_u_add-simplify-3-u8.c b/gcc/testsuite/gcc.dg/tree-ssa/sat_u_add-simplify-3-u8.c new file mode 100644 index 00000000000..77f1332be57 --- /dev/null +++ b/gcc/testsuite/gcc.dg/tree-ssa/sat_u_add-simplify-3-u8.c @@ -0,0 +1,15 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -fdump-tree-gimple-details" } */ + +#include + +#define T uint8_t + +T sat_add_u_1 (T x, T y) +{ + return x <= (T)(x + y) ? (x + y) : -1; +} + +/* { dg-final { scan-tree-dump-not " if " "gimple" } } */ +/* { dg-final { scan-tree-dump-not " else " "gimple" } } */ +/* { dg-final { scan-tree-dump-not " goto " "gimple" } } */ From patchwork Tue Oct 29 08:25:19 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Li, Pan2" X-Patchwork-Id: 99746 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 624773858C52 for ; Tue, 29 Oct 2024 08:28:30 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.18]) by sourceware.org (Postfix) with ESMTPS id 907763858D34 for ; Tue, 29 Oct 2024 08:27:19 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 907763858D34 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=intel.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 907763858D34 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=198.175.65.18 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1730190450; cv=none; b=vcHx0f+d7QBZTtX0PJivhN/TjpY45zI4aoMfme//fI80lGjL+mUJ3FUFRgm0M/6uvdZ3cDSUAhMCCeh6gHFewFkFz4/6q2RKtHsRyxg3o1UeX6uFPFHV4Go1c+Phc5Zj/fHqAHg5zHt8sUgoMgPlnWZC/JjuhS4jcQBziP/wmPo= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1730190450; c=relaxed/simple; bh=5EcTHf1NSNnE9KEEKGfuv3OioLSFFVguUjGicWlX/yg=; h=DKIM-Signature:From:To:Subject:Date:Message-ID:MIME-Version; b=JnNHOyxGcJHB77Co2xFteP9l3bRuFoU+B1Y/uGW3n+xClTwJTGVzmFHP/XiOAxpFMlxXLpg1ElvFt5g+7JcPlnnPlLJfk73NZnwGtGyuObB/On4HS82dQMBtwvtxe9tI4Z9pCERHpN7oYCDMNP+hBoC0sTn5WBN5bugMBURo8zM= ARC-Authentication-Results: i=1; server2.sourceware.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1730190439; x=1761726439; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=5EcTHf1NSNnE9KEEKGfuv3OioLSFFVguUjGicWlX/yg=; b=F61ocRBl7boUR38/PSpwyPJSIhGiG5hW+JOfHNofwgUDTNK29VI4A2es 27Grwlcu6+c5w30/fnBdBUUL9qVnaiX0vAEZy2/VollgKhBqz9QOfMRes WOIyQiIXs70AuK65YjNgKxwjjiqWrc3PFxRgVX4rSyEpFbF4GsN7Vt/mk 9aNJE83T7rsQWXpTCaeT88nozeUpalQJ2ThjisFt4mlROd4T9Fgj1ulc0 dpT7ak+nkZ7M4L29EIJ5RCc6oPHcg3pARsmI/++XvtGV4DvUMgZvJnAf8 k+z+viR1c6u9ybDSzSEaCvrz7gULoBhB5V9B+i3uA50HKESO59InvipNB w==; X-CSE-ConnectionGUID: /hhZ+kUCQBOMVTmQCzGT+g== X-CSE-MsgGUID: F/d0mjkPTIaUEJ0AmcDzgA== X-IronPort-AV: E=McAfee;i="6700,10204,11222"; a="30002101" X-IronPort-AV: E=Sophos;i="6.11,199,1725346800"; d="scan'208";a="30002101" Received: from orviesa005.jf.intel.com ([10.64.159.145]) by orvoesa110.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Oct 2024 01:27:18 -0700 X-CSE-ConnectionGUID: HAj3LC/5T6GxhHm78vGT0g== X-CSE-MsgGUID: BatcQ8gfT7Wtm4LN7JMeTw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,241,1725346800"; d="scan'208";a="86652636" Received: from panli.sh.intel.com ([10.239.154.73]) by orviesa005.jf.intel.com with ESMTP; 29 Oct 2024 01:27:17 -0700 From: pan2.li@intel.com To: gcc-patches@gcc.gnu.org Cc: richard.guenther@gmail.com, Tamar.Christina@arm.com, juzhe.zhong@rivai.ai, kito.cheng@gmail.com, jeffreyalaw@gmail.com, rdapp.gcc@gmail.com, Pan Li Subject: [PATCH 3/5] Match: Simplify branch form 8 of unsigned SAT_ADD into branchless Date: Tue, 29 Oct 2024 16:25:19 +0800 Message-ID: <20241029082521.3638409-3-pan2.li@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20241029082521.3638409-1-pan2.li@intel.com> References: <20241029082521.3638409-1-pan2.li@intel.com> MIME-Version: 1.0 X-Spam-Status: No, score=-11.7 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces~patchwork=sourceware.org@gcc.gnu.org From: Pan Li There are sorts of forms for the unsigned SAT_ADD. Some of them are complicated while others are cheap. This patch would like to simplify the complicated form into the cheap ones. For example as below: From the form 8 (branch): SAT_U_ADD = x > (T)(x + y) ? -1 : (x + y). To (branchless): SAT_U_ADD = (X + Y) | - ((X + Y) < X). #define T uint8_t T sat_add_u_1 (T x, T y) { return x > (T)(x + y) ? -1 : (x + y); } Before this patch: 1 │ uint8_t sat_add_u_1 (uint8_t x, uint8_t y) 2 │ { 3 │ uint8_t D.2809; 4 │ 5 │ _1 = x + y; 6 │ if (x <= _1) goto ; else goto ; 7 │ : 8 │ D.2809 = x + y; 9 │ goto ; 10 │ : 11 │ D.2809 = 255; 12 │ : 13 │ return D.2809; 14 │ } After this patch: 1 │ uint8_t sat_add_u_1 (uint8_t x, uint8_t y) 2 │ { 3 │ uint8_t D.2809; 4 │ 5 │ _1 = x + y; 6 │ _2 = x + y; 7 │ _3 = x > _2; 8 │ _4 = (unsigned char) _3; 9 │ _5 = -_4; 10 │ D.2809 = _1 | _5; 11 │ return D.2809; 12 │ } The simplify doesn't need to check if target support the SAT_ADD, it is somehow the optimization in gimple level. The below test suites are passed for this patch. * The rv64gcv fully regression test. * The x86 bootstrap test. * The x86 fully regression test. gcc/ChangeLog: * match.pd: Remove unsigned branch form 8 for SAT_ADD, and add simplify to branchless instead. gcc/testsuite/ChangeLog: * gcc.dg/tree-ssa/sat_u_add-simplify-4-u16.c: New test. * gcc.dg/tree-ssa/sat_u_add-simplify-4-u32.c: New test. * gcc.dg/tree-ssa/sat_u_add-simplify-4-u64.c: New test. * gcc.dg/tree-ssa/sat_u_add-simplify-4-u8.c: New test. Signed-off-by: Pan Li --- gcc/match.pd | 13 ++++++++----- .../gcc.dg/tree-ssa/sat_u_add-simplify-4-u16.c | 15 +++++++++++++++ .../gcc.dg/tree-ssa/sat_u_add-simplify-4-u32.c | 15 +++++++++++++++ .../gcc.dg/tree-ssa/sat_u_add-simplify-4-u64.c | 15 +++++++++++++++ .../gcc.dg/tree-ssa/sat_u_add-simplify-4-u8.c | 15 +++++++++++++++ 5 files changed, 68 insertions(+), 5 deletions(-) create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/sat_u_add-simplify-4-u16.c create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/sat_u_add-simplify-4-u32.c create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/sat_u_add-simplify-4-u64.c create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/sat_u_add-simplify-4-u8.c diff --git a/gcc/match.pd b/gcc/match.pd index d871fb8c24e..7105aedb40c 100644 --- a/gcc/match.pd +++ b/gcc/match.pd @@ -3170,6 +3170,14 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT) && types_match (type, @0, @1)) (bit_ior @2 (negate (convert (lt @2 @0)))))) +/* Simplify SAT_U_ADD to the cheap form + From: SAT_U_ADD = x > (X + Y) ? -1 : (X + Y). + To: SAT_U_ADD = (X + Y) | - ((X + Y) < X). */ +(simplify (cond (gt @0 (plus:c@2 @0 @1)) integer_minus_onep @2) + (if (INTEGRAL_TYPE_P (type) && TYPE_UNSIGNED (type) + && types_match (type, @0, @1)) + (bit_ior @2 (negate (convert (lt @2 @0)))))) + /* Unsigned saturation add, case 5 (branch with eq .ADD_OVERFLOW): SAT_U_ADD = REALPART_EXPR <.ADD_OVERFLOW> == 0 ? .ADD_OVERFLOW : -1. */ (match (unsigned_integer_sat_add @0 @1) @@ -3182,11 +3190,6 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT) (cond^ (ne (imagpart (IFN_ADD_OVERFLOW:c @0 @1)) integer_zerop) integer_minus_onep (usadd_left_part_2 @0 @1))) -/* Unsigned saturation add, case 8 (branch with gt): - SAT_ADD = x > (X + Y) ? -1 : (X + Y). */ -(match (unsigned_integer_sat_add @0 @1) - (cond^ (gt @0 (usadd_left_part_1@2 @0 @1)) integer_minus_onep @2)) - /* Unsigned saturation add, case 9 (one op is imm): SAT_U_ADD = (X + 3) >= x ? (X + 3) : -1. */ (match (unsigned_integer_sat_add @0 @1) diff --git a/gcc/testsuite/gcc.dg/tree-ssa/sat_u_add-simplify-4-u16.c b/gcc/testsuite/gcc.dg/tree-ssa/sat_u_add-simplify-4-u16.c new file mode 100644 index 00000000000..bc899715dd6 --- /dev/null +++ b/gcc/testsuite/gcc.dg/tree-ssa/sat_u_add-simplify-4-u16.c @@ -0,0 +1,15 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -fdump-tree-gimple-details" } */ + +#include + +#define T uint16_t + +T sat_add_u_1 (T x, T y) +{ + return x > (T)(x + y) ? -1 : (x + y); +} + +/* { dg-final { scan-tree-dump-not " if " "gimple" } } */ +/* { dg-final { scan-tree-dump-not " else " "gimple" } } */ +/* { dg-final { scan-tree-dump-not " goto " "gimple" } } */ diff --git a/gcc/testsuite/gcc.dg/tree-ssa/sat_u_add-simplify-4-u32.c b/gcc/testsuite/gcc.dg/tree-ssa/sat_u_add-simplify-4-u32.c new file mode 100644 index 00000000000..53d6033563a --- /dev/null +++ b/gcc/testsuite/gcc.dg/tree-ssa/sat_u_add-simplify-4-u32.c @@ -0,0 +1,15 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -fdump-tree-gimple-details" } */ + +#include + +#define T uint32_t + +T sat_add_u_1 (T x, T y) +{ + return x > (T)(x + y) ? -1 : (x + y); +} + +/* { dg-final { scan-tree-dump-not " if " "gimple" } } */ +/* { dg-final { scan-tree-dump-not " else " "gimple" } } */ +/* { dg-final { scan-tree-dump-not " goto " "gimple" } } */ diff --git a/gcc/testsuite/gcc.dg/tree-ssa/sat_u_add-simplify-4-u64.c b/gcc/testsuite/gcc.dg/tree-ssa/sat_u_add-simplify-4-u64.c new file mode 100644 index 00000000000..772f64a9bae --- /dev/null +++ b/gcc/testsuite/gcc.dg/tree-ssa/sat_u_add-simplify-4-u64.c @@ -0,0 +1,15 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -fdump-tree-gimple-details" } */ + +#include + +#define T uint64_t + +T sat_add_u_1 (T x, T y) +{ + return x > (T)(x + y) ? -1 : (x + y); +} + +/* { dg-final { scan-tree-dump-not " if " "gimple" } } */ +/* { dg-final { scan-tree-dump-not " else " "gimple" } } */ +/* { dg-final { scan-tree-dump-not " goto " "gimple" } } */ diff --git a/gcc/testsuite/gcc.dg/tree-ssa/sat_u_add-simplify-4-u8.c b/gcc/testsuite/gcc.dg/tree-ssa/sat_u_add-simplify-4-u8.c new file mode 100644 index 00000000000..6c91fe7ec5d --- /dev/null +++ b/gcc/testsuite/gcc.dg/tree-ssa/sat_u_add-simplify-4-u8.c @@ -0,0 +1,15 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -fdump-tree-gimple-details" } */ + +#include + +#define T uint8_t + +T sat_add_u_1 (T x, T y) +{ + return x > (T)(x + y) ? -1 : (x + y); +} + +/* { dg-final { scan-tree-dump-not " if " "gimple" } } */ +/* { dg-final { scan-tree-dump-not " else " "gimple" } } */ +/* { dg-final { scan-tree-dump-not " goto " "gimple" } } */ From patchwork Tue Oct 29 08:25:20 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Li, Pan2" X-Patchwork-Id: 99748 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 83DE13858C33 for ; Tue, 29 Oct 2024 08:29:48 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.18]) by sourceware.org (Postfix) with ESMTPS id 01C3F3858C51 for ; Tue, 29 Oct 2024 08:27:23 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 01C3F3858C51 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=intel.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 01C3F3858C51 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=198.175.65.18 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1730190453; cv=none; b=sodvZinlcjojJmGM2mpSBncR4LI/hBDM0Hn61/GIt0zam53N6/i1RgVOVQEC3cw4DtNMbzofRqeW7Pke+/dTglpJDTyG+DEy+XnOUgNrREuLFbQb0berXHRSmc3PqQ+Vs7cjtC7kvZlcW8c3xG6LDDC2guGmhgW/usrOyFj+FfM= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1730190453; c=relaxed/simple; bh=FxkCLABUypA2GiqvKgoilKJU2drFkC8WhAdhMDnte/Y=; h=DKIM-Signature:From:To:Subject:Date:Message-ID:MIME-Version; b=LkBaJjCwZVGaPElAVc1H1K40uzec23LuTfomUlsH6er4WzjAcD7g2IW85bd+1+X3aMdnduibU47Yu+MCGkXZFGbq1KHhe6I7gk4fEOx1p/PjiId7iXXMGnDq2PfqED2i6nIBo3PO05xz1U06l7c17lZG3C1j1NlswcFd9FG1eq8= ARC-Authentication-Results: i=1; server2.sourceware.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1730190444; x=1761726444; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=FxkCLABUypA2GiqvKgoilKJU2drFkC8WhAdhMDnte/Y=; b=ePoAZzpyxXyKDBJ0D0/pRumLAc2wz4ZCIOzA/11rwMp/+XfsYs+4b/Me SYRspsold9sPynX7+xZZRdMx/frmEjN9YBvdeoE+1Xm0EgcIEkumrudmM KJruEKdDUhiAxvvJ5tFVxQUa/VU0LWkCRao99A7OuLKfHnM37A/TzQuyY 2WM60HtwLyjlYULRcDUwt3SyJQognO7iY2l5otSu8U7VJDOhusBxD6/uv ZwP0JW/ZlagdRp5ON1SXngOg1jgnsUBQctQaVc9ptA+EUsn1Gs/kVermY l3GDKxud93T+yK1DKr2Yh10j+yBK1OjEh9a7ya8gG3tvzWA2PvLPVx25c A==; X-CSE-ConnectionGUID: 4OLX0wgZTgS5y60Yq9q43A== X-CSE-MsgGUID: cJbdkyVwQl+qQ9o4C1R4eA== X-IronPort-AV: E=McAfee;i="6700,10204,11222"; a="30002106" X-IronPort-AV: E=Sophos;i="6.11,199,1725346800"; d="scan'208";a="30002106" Received: from orviesa005.jf.intel.com ([10.64.159.145]) by orvoesa110.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Oct 2024 01:27:21 -0700 X-CSE-ConnectionGUID: z1pV54BUQLqUcXJAw1KJ3w== X-CSE-MsgGUID: NudhPVMJTPK11ypCBOIc4A== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,241,1725346800"; d="scan'208";a="86652644" Received: from panli.sh.intel.com ([10.239.154.73]) by orviesa005.jf.intel.com with ESMTP; 29 Oct 2024 01:27:19 -0700 From: pan2.li@intel.com To: gcc-patches@gcc.gnu.org Cc: richard.guenther@gmail.com, Tamar.Christina@arm.com, juzhe.zhong@rivai.ai, kito.cheng@gmail.com, jeffreyalaw@gmail.com, rdapp.gcc@gmail.com, Pan Li Subject: [PATCH 4/5] Match: Remove usadd_left_part_1 as it has only one reference [NFC] Date: Tue, 29 Oct 2024 16:25:20 +0800 Message-ID: <20241029082521.3638409-4-pan2.li@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20241029082521.3638409-1-pan2.li@intel.com> References: <20241029082521.3638409-1-pan2.li@intel.com> MIME-Version: 1.0 X-Spam-Status: No, score=-11.7 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces~patchwork=sourceware.org@gcc.gnu.org From: Pan Li In previous, we extract matching usadd_left_part_1 to avoid duplication. After we simplify some usadd patterns into cheap form, there will be only one reference to this matching. Thus, remove this matching pattern and unfold it to the reference place. The below test suites are passed for this patch: 1. The rv64gcv fully regression tests. 2. The x86 bootstrap tests. 3. The x86 fully regression tests. gcc/ChangeLog: * match.pd: Remove matching usadd_left_part_1 and unfold it at its reference place Signed-off-by: Pan Li --- gcc/match.pd | 14 +++----------- 1 file changed, 3 insertions(+), 11 deletions(-) diff --git a/gcc/match.pd b/gcc/match.pd index 7105aedb40c..a804d9c58fc 100644 --- a/gcc/match.pd +++ b/gcc/match.pd @@ -3086,14 +3086,6 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT) || POINTER_TYPE_P (itype)) && wi::eq_p (wi::to_wide (int_cst), wi::max_value (itype)))))) -/* Unsigned Saturation Add */ -/* SAT_ADD = usadd_left_part_1 | usadd_right_part_1, aka: - SAT_ADD = (X + Y) | -((X + Y) < X) */ -(match (usadd_left_part_1 @0 @1) - (plus:c @0 @1) - (if (INTEGRAL_TYPE_P (type) && TYPE_UNSIGNED (type) - && types_match (type, @0, @1)))) - /* SAT_ADD = usadd_left_part_2 | usadd_right_part_2, aka: SAT_ADD = REALPART_EXPR <.ADD_OVERFLOW> | (IMAGPART_EXPR <.ADD_OVERFLOW> != 0) */ (match (usadd_left_part_2 @0 @1) @@ -3101,7 +3093,7 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT) (if (INTEGRAL_TYPE_P (type) && TYPE_UNSIGNED (type) && types_match (type, @0, @1)))) -/* SAT_ADD = usadd_left_part_1 | usadd_right_part_1, aka: +/* SAT_ADD = (X + Y) | usadd_right_part_1, aka: SAT_ADD = (X + Y) | -((type)(X + Y) < X) */ (match (usadd_right_part_1 @0 @1) (negate (convert (lt (plus:c @0 @1) @0))) @@ -3129,7 +3121,7 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT) (if (INTEGRAL_TYPE_P (type) && TYPE_UNSIGNED (type) && types_match (type, @0, @1)))) -/* We cannot merge or overload usadd_left_part_1 and usadd_left_part_2 +/* We cannot merge or overload (X + Y) and usadd_left_part_2 because the sub part of left_part_2 cannot work with right_part_1. For example, left_part_2 pattern focus one .ADD_OVERFLOW but the right_part_1 has nothing to do with .ADD_OVERFLOW. */ @@ -3138,7 +3130,7 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT) SAT_U_ADD = (X + Y) | - ((X + Y) < X) or SAT_U_ADD = (X + Y) | - (X > (X + Y)). */ (match (unsigned_integer_sat_add @0 @1) - (bit_ior:c (usadd_left_part_1 @0 @1) (usadd_right_part_1 @0 @1))) + (bit_ior:c (plus:c @0 @1) (usadd_right_part_1 @0 @1))) /* Unsigned saturation add, case 2 (branchless with .ADD_OVERFLOW): SAT_ADD = REALPART_EXPR <.ADD_OVERFLOW> | -IMAGPART_EXPR <.ADD_OVERFLOW> or From patchwork Tue Oct 29 08:25:21 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Li, Pan2" X-Patchwork-Id: 99747 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 59BBF385841E for ; Tue, 29 Oct 2024 08:29:41 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.18]) by sourceware.org (Postfix) with ESMTPS id 5A21E3858C42 for ; Tue, 29 Oct 2024 08:27:30 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 5A21E3858C42 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=intel.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 5A21E3858C42 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=198.175.65.18 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1730190454; cv=none; b=xAuC+7XAzjJTG+CObcLbiliqDwWIwq6dA0y0+k9akYg85SuknfOQho1tShW7bXLPcS3U14E7sqk9JOsw9OqnC/BacxCPckstSRvuLF1jcmTBOnrw6lgwqTdcKgDeF5CY1tXV5f03mImtYXY/5IJKbG+PlxtUdG7rYYdAnRmNM5M= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1730190454; c=relaxed/simple; bh=zOlRv/lDR3T0ag+jHPYFaE/rb4xka82NpKMHvnfeZLQ=; h=DKIM-Signature:From:To:Subject:Date:Message-ID:MIME-Version; b=ba3NfSK2p2ZQrtGT2GWkuSNhmfaNv1Vj5EIbod56AIFhUT/KAWEJS4MFaARjdwCdVIHs6BWMHxve3RugELdrShjLRSEQKwFzsRMZ8rrTjfEnKev3PsFEGy0bUwnz2l18rGrDxbK5AOI+h3AkKw0Hk5hIYplwScx9szlhVbchl64= ARC-Authentication-Results: i=1; server2.sourceware.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1730190451; x=1761726451; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=zOlRv/lDR3T0ag+jHPYFaE/rb4xka82NpKMHvnfeZLQ=; b=W+L5hR/XNLCO6Yf/gwax0OKSwXn4Lu4GATf1Ah7s+r1/pebcH5Lb6mFr EsmSSFRIRYVO2OMLULDTO908vvS+dTS8A6glbwYX9EMi9uc4IrWWO57c7 DQeeh/aYe4JbljsmDbd3rOewMoypv6H6UmLiHNIa6YonWOpoqgk5X/gHy GNlCMTRUyYxti3wQxZBWowfPLchJ8ILFjHtZZDxUd2m0TPhekc2msXi53 0gkKbTAENGl7Ip2bD3gScCBZR1eo17gTkRXxNaXvJT8/fvnQJ/jeKoVeZ 2s0Gp9v3yz8so3kZFAqIDnS1a3NWjtkwYIzJ34wjlTUhpIWytOe69IRQl w==; X-CSE-ConnectionGUID: lFIj9mZgTsKcEaNL5tW9WA== X-CSE-MsgGUID: 7crgbVv8RbGNuWoDIhVaKA== X-IronPort-AV: E=McAfee;i="6700,10204,11222"; a="30002116" X-IronPort-AV: E=Sophos;i="6.11,199,1725346800"; d="scan'208";a="30002116" Received: from orviesa005.jf.intel.com ([10.64.159.145]) by orvoesa110.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Oct 2024 01:27:23 -0700 X-CSE-ConnectionGUID: OFAc2mWgQdO1g3X+8/jPGQ== X-CSE-MsgGUID: rL3vfp5VR52ht8AkHVABrw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,241,1725346800"; d="scan'208";a="86652651" Received: from panli.sh.intel.com ([10.239.154.73]) by orviesa005.jf.intel.com with ESMTP; 29 Oct 2024 01:27:21 -0700 From: pan2.li@intel.com To: gcc-patches@gcc.gnu.org Cc: richard.guenther@gmail.com, Tamar.Christina@arm.com, juzhe.zhong@rivai.ai, kito.cheng@gmail.com, jeffreyalaw@gmail.com, rdapp.gcc@gmail.com, Pan Li Subject: [PATCH 5/5] Match: Update the comments of unsigned integer SAT_ADD [NFC] Date: Tue, 29 Oct 2024 16:25:21 +0800 Message-ID: <20241029082521.3638409-5-pan2.li@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20241029082521.3638409-1-pan2.li@intel.com> References: <20241029082521.3638409-1-pan2.li@intel.com> MIME-Version: 1.0 X-Spam-Status: No, score=-11.7 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces~patchwork=sourceware.org@gcc.gnu.org From: Pan Li Sorts of comments of unsigned integer SAT_ADD matching is not updated to date. This patch would like to refine it. The below test suites are passed for this patch: 1. The rv64gcv fully regression tests. 2. The x86 bootstrap tests. 3. The x86 fully regression tests. gcc/ChangeLog: * match.pd: Update the comments of unsigned integer SAT_ADD. Signed-off-by: Pan Li --- gcc/match.pd | 37 ++++++++++++++++++++++--------------- 1 file changed, 22 insertions(+), 15 deletions(-) diff --git a/gcc/match.pd b/gcc/match.pd index a804d9c58fc..8dd7f9af62e 100644 --- a/gcc/match.pd +++ b/gcc/match.pd @@ -3086,36 +3086,39 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT) || POINTER_TYPE_P (itype)) && wi::eq_p (wi::to_wide (int_cst), wi::max_value (itype)))))) -/* SAT_ADD = usadd_left_part_2 | usadd_right_part_2, aka: - SAT_ADD = REALPART_EXPR <.ADD_OVERFLOW> | (IMAGPART_EXPR <.ADD_OVERFLOW> != 0) */ +/* SAT_U_ADD = usadd_left_part_2 | usadd_right_part_2, aka: + SUM = ADD_OVERFLOW (X, Y) + SAT_U_ADD = REALPART_EXPR (SUM) | (IMAGPART_EXPR (SUM) != 0) */ (match (usadd_left_part_2 @0 @1) (realpart (IFN_ADD_OVERFLOW:c @0 @1)) (if (INTEGRAL_TYPE_P (type) && TYPE_UNSIGNED (type) && types_match (type, @0, @1)))) -/* SAT_ADD = (X + Y) | usadd_right_part_1, aka: - SAT_ADD = (X + Y) | -((type)(X + Y) < X) */ +/* SAT_U_ADD = (X + Y) | usadd_right_part_1, aka: + SAT_U_ADD = (X + Y) | -((type)(X + Y) < X) */ (match (usadd_right_part_1 @0 @1) (negate (convert (lt (plus:c @0 @1) @0))) (if (INTEGRAL_TYPE_P (type) && TYPE_UNSIGNED (type) && types_match (type, @0, @1)))) -/* SAT_ADD = usadd_left_part_1 | usadd_right_part_1, aka: - SAT_ADD = (X + Y) | -(X > (X + Y)) */ +/* SAT_U_ADD = usadd_left_part_1 | usadd_right_part_1, aka: + SAT_U_ADD = (X + Y) | -(X > (X + Y)) */ (match (usadd_right_part_1 @0 @1) (negate (convert (gt @0 (plus:c @0 @1)))) (if (INTEGRAL_TYPE_P (type) && TYPE_UNSIGNED (type) && types_match (type, @0, @1)))) -/* SAT_ADD = usadd_left_part_2 | usadd_right_part_2, aka: - SAT_ADD = REALPART_EXPR <.ADD_OVERFLOW> | (IMAGPART_EXPR <.ADD_OVERFLOW> != 0) */ +/* SAT_U_ADD = usadd_left_part_2 | usadd_right_part_2, aka: + SUM = ADD_OVERFLOW (X, Y) + SAT_U_ADD = REALPART_EXPR (SUM) | (IMAGPART_EXPR (SUM) != 0) */ (match (usadd_right_part_2 @0 @1) (negate (convert (ne (imagpart (IFN_ADD_OVERFLOW:c @0 @1)) integer_zerop))) (if (INTEGRAL_TYPE_P (type) && TYPE_UNSIGNED (type) && types_match (type, @0, @1)))) -/* SAT_ADD = usadd_left_part_2 | usadd_right_part_2, aka: - SAT_ADD = REALPART_EXPR <.ADD_OVERFLOW> | -IMAGPART_EXPR <.ADD_OVERFLOW> */ +/* SAT_U_ADD = usadd_left_part_2 | usadd_right_part_2, aka: + SUM = ADD_OVERFLOW (X, Y) + SAT_U_ADD = REALPART_EXPR (SUM) | -IMAGPART_EXPR (SUM) */ (match (usadd_right_part_2 @0 @1) (negate (imagpart (IFN_ADD_OVERFLOW:c @0 @1))) (if (INTEGRAL_TYPE_P (type) && TYPE_UNSIGNED (type) @@ -3133,8 +3136,9 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT) (bit_ior:c (plus:c @0 @1) (usadd_right_part_1 @0 @1))) /* Unsigned saturation add, case 2 (branchless with .ADD_OVERFLOW): - SAT_ADD = REALPART_EXPR <.ADD_OVERFLOW> | -IMAGPART_EXPR <.ADD_OVERFLOW> or - SAT_ADD = REALPART_EXPR <.ADD_OVERFLOW> | (IMAGPART_EXPR <.ADD_OVERFLOW> != 0) */ + SUM = ADD_OVERFLOW (X, Y) + SAT_U_ADD = REALPART_EXPR (SUM) | -IMAGPART_EXPR (SUM) or + SAT_U_ADD = REALPART_EXPR (SUM) | (IMAGPART_EXPR (SUM) != 0) */ (match (unsigned_integer_sat_add @0 @1) (bit_ior:c (usadd_left_part_2 @0 @1) (usadd_right_part_2 @0 @1))) @@ -3171,13 +3175,15 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT) (bit_ior @2 (negate (convert (lt @2 @0)))))) /* Unsigned saturation add, case 5 (branch with eq .ADD_OVERFLOW): - SAT_U_ADD = REALPART_EXPR <.ADD_OVERFLOW> == 0 ? .ADD_OVERFLOW : -1. */ + SUM = ADD_OVERFLOW (X, Y) + SAT_U_ADD = IMAGPART_EXPR (SUM) == 0 ? REALPART_EXPR (SUM) : -1. */ (match (unsigned_integer_sat_add @0 @1) (cond^ (eq (imagpart (IFN_ADD_OVERFLOW:c @0 @1)) integer_zerop) (usadd_left_part_2 @0 @1) integer_minus_onep)) /* Unsigned saturation add, case 6 (branch with ne .ADD_OVERFLOW): - SAT_U_ADD = REALPART_EXPR <.ADD_OVERFLOW> != 0 ? -1 : .ADD_OVERFLOW. */ + SUM = ADD_OVERFLOW (X, Y) + SAT_U_ADD = IMAGPART_EXPR (SUM) != 0 ? -1 : REALPART_EXPR (SUM). */ (match (unsigned_integer_sat_add @0 @1) (cond^ (ne (imagpart (IFN_ADD_OVERFLOW:c @0 @1)) integer_zerop) integer_minus_onep (usadd_left_part_2 @0 @1))) @@ -3199,7 +3205,8 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT) (if (wi::eq_p (max, sum)))))) /* Unsigned saturation add, case 10 (one op is imm): - SAT_U_ADD = __builtin_add_overflow (X, 3, &ret) == 0 ? ret : -1. */ + SUM = ADD_OVERFLOW (X, IMM) + SAT_U_ADD = IMAGPART_EXPR (SUM) == 0 ? REALPART_EXPR (SUM) : -1. */ (match (unsigned_integer_sat_add @0 @1) (cond^ (ne (imagpart (IFN_ADD_OVERFLOW@2 @0 INTEGER_CST@1)) integer_zerop) integer_minus_onep (realpart @2))